projects / thirdparty / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| b7b31114 SG |
1 | /* |
| 2 | * This file is part of SIS. | |
| 3 | * | |
| 4 | * ERC32SIM, SPARC instruction simulator. Copyright (C) 1995 Jiri Gaisler, | |
| 5 | * European Space Agency | |
| 6 | * | |
| 7 | * This program is free software; you can redistribute it and/or modify it under | |
| 8 | * the terms of the GNU General Public License as published by the Free | |
| 9 | * Software Foundation; either version 2 of the License, or (at your option) | |
| 10 | * any later version. | |
| 11 | * | |
| 12 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
| 13 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 14 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
| 15 | * more details. | |
| 16 | * | |
| 17 | * You should have received a copy of the GNU General Public License along with | |
| 18 | * this program; if not, write to the Free Software Foundation, Inc., 675 | |
| 19 | * Mass Ave, Cambridge, MA 02139, USA. | |
| 20 | * | |
| 21 | */ | |
| 22 | ||
| 23 | #include "end.h" | |
| 24 | ||
| 25 | #define I_ACC_EXC 1 | |
| 26 | ||
| 27 | /* Maximum events in event queue */ | |
| 28 | #define EVENT_MAX 256 | |
| 29 | ||
| 30 | /* Maximum # of floating point queue */ | |
| 31 | #define FPUQN 1 | |
| 32 | ||
| 33 | /* Maximum # of breakpoints */ | |
| 34 | #define BPT_MAX 256 | |
| 35 | ||
| 36 | struct histype { | |
| 37 | unsigned addr; | |
| 38 | unsigned time; | |
| 39 | }; | |
| 40 | ||
| 41 | /* type definitions */ | |
| 42 | ||
| 43 | typedef short int int16; /* 16-bit signed int */ | |
| 44 | typedef unsigned short int uint16; /* 16-bit unsigned int */ | |
| 45 | typedef int int32; /* 32-bit signed int */ | |
| 46 | typedef unsigned int uint32; /* 32-bit unsigned int */ | |
| 47 | typedef float float32; /* 32-bit float */ | |
| 48 | typedef double float64; /* 64-bit float */ | |
| 49 | ||
| 50 | struct pstate { | |
| 51 | ||
| 52 | float64 fd[16]; /* FPU registers */ | |
| 53 | #ifdef HOST_LITTLE_ENDIAN_FLOAT | |
| 54 | float32 fs[32]; | |
| 55 | float32 *fdp; | |
| 56 | #else | |
| 57 | float32 *fs; | |
| 58 | #endif | |
| 59 | int32 *fsi; | |
| 60 | uint32 fsr; | |
| 61 | int32 fpstate; | |
| 62 | uint32 fpq[FPUQN * 2]; | |
| 63 | uint32 fpqn; | |
| 64 | uint32 ftime; | |
| 65 | uint32 flrd; | |
| 66 | uint32 frd; | |
| 67 | uint32 frs1; | |
| 68 | uint32 frs2; | |
| 69 | uint32 fpu_pres; /* FPU present (0 = No, 1 = Yes) */ | |
| 70 | ||
| 71 | uint32 psr; /* IU registers */ | |
| 72 | uint32 tbr; | |
| 73 | uint32 wim; | |
| 74 | uint32 g[8]; | |
| 75 | uint32 r[128]; | |
| 76 | uint32 y; | |
| 77 | uint32 pc, npc; | |
| 78 | ||
| 79 | ||
| 80 | uint32 trap; /* Current trap type */ | |
| 81 | uint32 annul; /* Instruction annul */ | |
| 82 | uint32 data; /* Loaded data */ | |
| 83 | uint32 inst; /* Current instruction */ | |
| 84 | uint32 asi; /* Current ASI */ | |
| 85 | uint32 err_mode; /* IU error mode */ | |
| 86 | uint32 breakpoint; | |
| 87 | uint32 bptnum; | |
| 88 | uint32 bphit; | |
| 89 | uint32 bpts[BPT_MAX]; /* Breakpoints */ | |
| 90 | ||
| 91 | uint32 ltime; /* Load interlock time */ | |
| 92 | uint32 hold; /* IU hold cycles in current inst */ | |
| 93 | uint32 fhold; /* FPU hold cycles in current inst */ | |
| 94 | uint32 icnt; /* Instruction cycles in curr inst */ | |
| 95 | ||
| 96 | uint32 histlen; /* Trace history management */ | |
| 97 | uint32 histind; | |
| 98 | struct histype *histbuf; | |
| 99 | float32 freq; /* Simulated processor frequency */ | |
| 100 | ||
| 101 | ||
| 102 | uint32 tottime; | |
| 103 | uint32 ninst; | |
| 104 | uint32 fholdt; | |
| 105 | uint32 holdt; | |
| 106 | uint32 icntt; | |
| 107 | uint32 finst; | |
| 108 | uint32 simstart; | |
| 109 | uint32 starttime; | |
| 110 | uint32 pwdtime; /* Cycles in power-down mode */ | |
| 111 | uint32 nstore; /* Number of load instructions */ | |
| 112 | uint32 nload; /* Number of store instructions */ | |
| 113 | uint32 nannul; /* Number of annuled instructions */ | |
| 114 | uint32 nbranch; /* Number of branch instructions */ | |
| 115 | uint32 ildreg; /* Destination of last load instruction */ | |
| 116 | uint32 ildtime; /* Last time point for load dependency */ | |
| 117 | ||
| 118 | int rett_err; /* IU in jmpl/restore error state (Rev.0) */ | |
| 119 | int jmpltime; | |
| 120 | }; | |
| 121 | ||
| 122 | struct evcell { | |
| 123 | void (*cfunc) (); | |
| 124 | int32 arg; | |
| 125 | uint32 time; | |
| 126 | struct evcell *nxt; | |
| 127 | }; | |
| 128 | ||
| 129 | struct estate { | |
| 130 | struct evcell eq; | |
| 131 | struct evcell *freeq; | |
| 132 | uint32 simtime; | |
| 133 | }; | |
| 134 | ||
| 135 | struct irqcell { | |
| 136 | void (*callback) (); | |
| 137 | int32 arg; | |
| 138 | }; | |
| 139 | ||
| 140 | ||
| 141 | #define OK 0 | |
| 142 | #define TIME_OUT 1 | |
| 143 | #define BPT_HIT 2 | |
| 144 | #define ERROR 3 | |
| 145 | #define CTRL_C 4 |