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Commit | Line | Data |
---|---|---|
2b193c4a MK |
1 | 2005-03-23 Mark Kettenis <kettenis@gnu.org> |
2 | ||
3 | * configure: Regenerate. | |
4 | ||
edece237 CV |
5 | 2005-02-21 Corinna Vinschen <vinschen@redhat.com> |
6 | ||
7 | * iq2000.c: Eliminate need to include gdb/sim-iq2000.h. | |
8 | ||
9 | 2005-02-18 Corinna Vinschen <vinschen@redhat.com> | |
10 | ||
11 | * configure.ac: Rename from configure.in and pull up to autoconf 2.59. | |
12 | * configure: Regenerate. | |
13 | ||
14 | 2002-03-18 Jeff Johnston <jjohnstn@redhat.com> | |
15 | ||
16 | * sem-switch.c: Regenerated. | |
17 | * sem.c: Ditto. | |
18 | ||
19 | 2002-01-28 Jeff Johnston <jjohnstn@redhat.com> | |
20 | ||
21 | * arch.c: Regenerated. | |
22 | * arch.h: Ditto. | |
23 | * cpu.c: Ditto. | |
24 | * cpu.h: Ditto. | |
25 | * cpuall.h: Ditto. | |
26 | * decode.c: Ditto. | |
27 | * decode.h: Ditto. | |
28 | * model.c: Ditto. | |
29 | * sem-switch.c: Ditto. | |
30 | * sem.c: Ditto. | |
31 | ||
32 | 2001-11-16 Jeff Johnston <jjohnstn@redhat.com> | |
33 | ||
34 | * decode.c: Regenerated after putting orui into machine-specific | |
35 | files. | |
36 | * decode.h: Ditto. | |
37 | * model.c: Ditto. | |
38 | * sem-switch.c: Ditto. | |
39 | * sem.c: Ditto. | |
40 | ||
41 | 2001-11-13 Jeff Johnston <jjohnstn@redhat.com> | |
42 | ||
43 | * cpu.h: Regenerated after changing jump and branch operands | |
44 | so that no bit masking is performed. | |
45 | * decode.c: Ditto. | |
46 | * iq2000.c (get_h_pc): Change to return h_pc directly. | |
47 | (set_h_pc): Change to always set the insn mask bit. | |
48 | * sim-if.c (iq2000bf_disassemble_insn): Change to pass the | |
49 | pc untouched. | |
50 | (sim_create_inferior): Changed so starting address is taken | |
51 | directly from link. If not specified, start address is | |
52 | 0 with insn mask set on. | |
53 | ||
54 | 2001-11-08 Jeff Johnston <jjohnstn@redhat.com> | |
55 | ||
56 | * cpu.h: Regenerated after making jump operand UINT. | |
57 | * decode.c: Ditto. | |
58 | ||
59 | 2001-10-31 Jeff Johnston <jjohnstn@redhat.com> | |
60 | ||
61 | * sem-switch.c: Regenerated after fixing lb, lbu, lh, lw, | |
62 | sb, sh, and sw insns handling of offset operand. | |
63 | * sem.c: Ditto. | |
64 | ||
65 | 2001-10-30 Jeff Johnston <jjohnstn@redhat.com> | |
66 | ||
67 | * cpu.c: Regenerated. | |
68 | * cpu.h: Ditto. | |
69 | * decode.c: Ditto. | |
70 | * sem-switch.c: Ditto. | |
71 | * sem.c: Ditto. | |
72 | * iq2000.c (get_h_pc): New routine. | |
73 | (set_h_pc): Ditto. | |
74 | (fetch_str): Translate cpu data addresses to data area. | |
75 | (do_syscall): Ditto. | |
76 | (iq2000bf_fetch_register): Use get_h_pc. | |
77 | (iq2000bf_store_register): Use set_h_pc. | |
78 | * mloop.in: Change all calls to GETIMEMxxx to use CPU2INSN | |
79 | on the pc value passed first. | |
80 | * sim-if.c (iq2000bf_disassemble_insn): New function. | |
81 | (sim_open): Add extra memory region for insn memory vs data memory. | |
82 | Also change disassembler to be iq2000bf_disassemble_insn. | |
83 | (sim_create_inferior): Translate start address using INSN2CPU macro. | |
84 | * sim-main.h (CPU2INSN, CPU2DATA, INSN2CPU, DATA2CPU): New macros | |
85 | to translate between Harvard and cpu addresses. | |
86 | ||
87 | 2001-10-26 Jeff Johnston <jjohnstn@redhat.com> | |
88 | ||
89 | * sem-switch.c: Regenerated after reverting addiu | |
90 | change. | |
91 | * sem.c: Ditto. | |
92 | ||
93 | 2001-10-25 Jeff Johnston <jjohnstn@redhat.com> | |
94 | ||
95 | * Makefile.in: Add -UHAVE_CPU_IQ10 for time-being until | |
96 | iq10 simulator merged here. | |
97 | * cpu.h: Regenerated after fixing addiu insn. | |
98 | * cpuall.h: Ditto. | |
99 | * decode.c: Ditto. | |
100 | * decode.h: Ditto. | |
101 | * model.c: Ditto. | |
102 | * sem-switch.c: Ditto. | |
103 | * sem.c: Ditto. | |
104 | ||
105 | 2001-09-12 Stan Cox <scox@redhat.com> | |
106 | ||
107 | * iq2000/{cpu.c, cpu.h, decode.c, decode.h, model.c, sem-switch.c, | |
108 | sem.c}: Regen'd. | |
109 | * iq2000.c (do_syscall): Support system traps. | |
110 | ||
111 | 2001-07-05 Ben Elliston <bje@redhat.com> | |
112 | ||
113 | * Makefile.in (stamp-arch): Use $(CGEN_CPU_DIR). | |
114 | (stamp-cpu): Likewise. | |
115 | ||
116 | 2001-04-02 Ben Elliston <bje@redhat.com> | |
117 | ||
118 | * arch.c, arch.h: Regnerate to track recent cgen improvements. | |
119 | * cpu.c, cpu.h, cpuall.h, decode.c, decode.h: Likewise. | |
120 | * model.c, sem-switch.c, sem.c: Likewise. | |
121 | ||
122 | 2001-01-22 Ben Elliston <bje@redhat.com> | |
123 | ||
124 | * cpu.h, decode.c, decode.h, model.c: Regenerate. | |
125 | * sem.c, sem-switch.c: Likewise. | |
126 | ||
127 | * arch.c, arch.h, cpu.c, cpu.h, cpuall.h: Regenerate. | |
128 | * decode.c, decode.h, model.c, sem.c, sem-switch.c: Likewise. | |
129 | ||
130 | 2000-07-05 Ben Elliston <bje@redhat.com> | |
131 | ||
132 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
133 | ||
134 | 2000-07-04 Ben Elliston <bje@redhat.com> | |
135 | ||
136 | * sem.c, sem-switch.c: Regenerate. | |
137 | ||
138 | * iq2000.c (do_break): Use sim_engine_halt (). | |
139 | * arch.c, decode.c, decode.h, sem.c, sem-switch.c: Regenerate. | |
140 | ||
141 | 2000-07-03 Ben Elliston <bje@redhat.com> | |
142 | ||
143 | * iq2000.c (do_syscall): Examine syscall register (nominally %11). | |
144 | (do_break): Handle breakpoints. | |
145 | * tconfig.in (SIM_HAVE_BREAKPOINTS): Define. | |
146 | (SIM_BREAKPOINT, SIM_BREAKPOINT_SIZE): Likewise. | |
147 | ||
148 | 2000-06-29 Andrew Cagney <cagney@redhat.com> | |
149 | ||
150 | * iq2000.c (iq2000bf_fetch_register): Implement. | |
151 | (iq2000bf_store_register): Ditto. | |
152 | ||
153 | 2000-05-17 Ben Elliston <bje@redhat.com> | |
154 | ||
155 | * mloop.in (extract-simple, extract-scache): Use SEM_SKIP_COMPILE | |
156 | to set the skip count for the (skip ..) rtx. | |
157 | (extract-pbb): Likewise. | |
158 | (extract-pbb): Include the delay slot instruction of all CTI | |
159 | instructions in the pbb, not just those that may nullify their | |
160 | delay slot (eg. likely branches). | |
161 | ||
162 | * sem.c, sem-switch.c: Regenerate. | |
163 | ||
164 | 2000-05-16 Ben Elliston <bje@redhat.com> | |
165 | ||
166 | * arch.c, cpu.c, cpu.h, decode.c, decode.h: Regenerate. | |
167 | * sem.c, sem-switch.c: Likewise. | |
168 | * mloop.in (extract-pbb): Prohibit branch instructions in the | |
169 | delay slot of branch likely instructions. | |
170 | ||
171 | 2000-05-16 Ben Elliston <bje@redhat.com> | |
172 | ||
173 | * Makefile.in: New file. | |
174 | * configure.in: Ditto. | |
175 | * acconfig.h: Ditto. | |
176 | * config.in, configure: Generate. | |
177 | * arch.c, arch.h, cpu.c, cpu.h, cpuall.h: Ditto. | |
178 | * decode.c, decode.h: Ditto. | |
179 | * model.c, sem-switch.c, sem.c: Ditto. | |
180 | * mloop.in: New file. | |
181 | * iq2000.c: Ditto. | |
182 | * iq2000-sim.h: Ditto. | |
183 | * sim-if.c: Ditto. | |
184 | * sim-main.h: Ditto. | |
185 | * tconfig.in: Ditto |