projects / thirdparty / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| edece237 CV |
1 | |
| 2 | /* Main header for the Vitesse IQ2000. */ | |
| 3 | ||
| 4 | #ifndef SIM_MAIN_H | |
| 5 | #define SIM_MAIN_H | |
| 6 | ||
| edece237 CV |
7 | /* sim-basics.h includes config.h but cgen-types.h must be included before |
| 8 | sim-basics.h and cgen-types.h needs config.h. */ | |
| 9 | #include "config.h" | |
| 10 | ||
| f0c1b768 MF |
11 | /* This is a global setting. Different cpu families can't mix-n-match -scache |
| 12 | and -pbb. However some cpu families may use -simple while others use | |
| 13 | one of -scache/-pbb. ???? */ | |
| 14 | #define WITH_SCACHE_PBB 1 | |
| 15 | ||
| edece237 CV |
16 | #include "symcat.h" |
| 17 | #include "sim-basics.h" | |
| 18 | #include "cgen-types.h" | |
| 19 | #include "iq2000-desc.h" | |
| 20 | #include "iq2000-opc.h" | |
| 21 | #include "arch.h" | |
| 22 | ||
| 23 | /* Pull in IQ2000_{DATA,INSN}_{MASK,VALUE}. */ | |
| 24 | #include "elf/iq2000.h" | |
| 25 | ||
| edece237 CV |
26 | #include "sim-base.h" |
| 27 | #include "cgen-sim.h" | |
| edece237 CV |
28 | \f |
| 29 | /* The _sim_cpu struct. */ | |
| 30 | ||
| 31 | struct _sim_cpu { | |
| 32 | /* sim/common cpu base. */ | |
| 33 | sim_cpu_base base; | |
| 34 | ||
| 35 | /* Static parts of cgen. */ | |
| 36 | CGEN_CPU cgen_cpu; | |
| 37 | ||
| 38 | /* CPU specific parts go here. | |
| 39 | Note that in files that don't need to access these pieces WANT_CPU_FOO | |
| 40 | won't be defined and thus these parts won't appear. This is ok in the | |
| 41 | sense that things work. It is a source of bugs though. | |
| 42 | One has to of course be careful to not take the size of this | |
| 43 | struct and no structure members accessed in non-cpu specific files can | |
| 44 | go after here. Oh for a better language. */ | |
| 45 | #if defined (WANT_CPU_IQ2000BF) | |
| 46 | IQ2000BF_CPU_DATA cpu_data; | |
| 47 | #endif | |
| 48 | }; | |
| 49 | \f | |
| 50 | /* The sim_state struct. */ | |
| 51 | ||
| 52 | struct sim_state { | |
| f95f4ed2 | 53 | sim_cpu *cpu[MAX_NR_PROCESSORS]; |
| edece237 CV |
54 | |
| 55 | CGEN_STATE cgen_state; | |
| 56 | ||
| 57 | sim_state_base base; | |
| 58 | }; | |
| 59 | \f | |
| 60 | /* Misc. */ | |
| 61 | ||
| 62 | /* Catch address exceptions. */ | |
| 63 | extern SIM_CORE_SIGNAL_FN iq2000_core_signal; | |
| 64 | #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \ | |
| 65 | iq2000_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \ | |
| 66 | (TRANSFER), (ERROR)) | |
| 67 | ||
| 68 | /* Convert between CPU-internal addresses and sim_core addresses. */ | |
| 69 | #define CPU2DATA(addr) (IQ2000_DATA_VALUE + (addr)) | |
| 70 | #define DATA2CPU(addr) ((addr) - IQ2000_DATA_VALUE) | |
| 71 | #define CPU2INSN(addr) (IQ2000_INSN_VALUE + ((addr) & ~IQ2000_INSN_MASK)) | |
| 72 | #define INSN2CPU(addr) ((addr) - IQ2000_INSN_VALUE) | |
| 73 | #define IQ2000_INSN_MEM_SIZE (CPU2INSN(0x800000) - CPU2INSN(0x0000)) | |
| 74 | #define IQ2000_DATA_MEM_SIZE (CPU2DATA(0x800000) - CPU2DATA(0x0000)) | |
| 75 | ||
| 76 | #endif /* SIM_MAIN_H */ |