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c906108c 1/* Main simulator entry points specific to the M32R.
3666a048 2 Copyright (C) 1996-2021 Free Software Foundation, Inc.
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3 Contributed by Cygnus Support.
4
16b47b25 5 This file is part of GDB, the GNU debugger.
c906108c 6
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7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
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9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
c906108c 11
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12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
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17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
c906108c 19
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20/* This must come before any other includes. */
21#include "defs.h"
22
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23#include "sim-main.h"
24#include "sim-options.h"
25#include "libiberty.h"
26#include "bfd.h"
27
c906108c 28#include <string.h>
c906108c 29#include <stdlib.h>
c906108c 30
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31#include "dv-m32r_uart.h"
32
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33#define M32R_DEFAULT_MEM_SIZE 0x2000000 /* 32M */
34
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35static void free_state (SIM_DESC);
36static void print_m32r_misc_cpu (SIM_CPU *cpu, int verbose);
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37\f
38/* Cover function of sim_state_free to free the cpu buffers as well. */
39
40static void
41free_state (SIM_DESC sd)
42{
43 if (STATE_MODULES (sd) != NULL)
44 sim_module_uninstall (sd);
45 sim_cpu_free_all (sd);
46 sim_state_free (sd);
47}
48
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49extern const SIM_MACH * const m32r_sim_machs[];
50
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51/* Create an instance of the simulator. */
52
53SIM_DESC
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54sim_open (SIM_OPEN_KIND kind, host_callback *callback, struct bfd *abfd,
55 char * const *argv)
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56{
57 SIM_DESC sd = sim_state_alloc (kind, callback);
58 char c;
59 int i;
60
ba307cdd 61 /* Set default options before parsing user options. */
1c636da0 62 STATE_MACHS (sd) = m32r_sim_machs;
d414eb3e 63 STATE_MODEL_NAME (sd) = "m32r/d";
ba307cdd 64 current_alignment = STRICT_ALIGNMENT;
f9a4d543 65 current_target_byte_order = BFD_ENDIAN_BIG;
ba307cdd 66
c906108c 67 /* The cpu data is kept in a separately allocated chunk of memory. */
d5a71b11 68 if (sim_cpu_alloc_all (sd, 1) != SIM_RC_OK)
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69 {
70 free_state (sd);
71 return 0;
72 }
73
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74 if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
75 {
76 free_state (sd);
77 return 0;
78 }
79
77cf2ef5 80 /* The parser will print an error message for us, so we silently return. */
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81 if (sim_parse_args (sd, argv) != SIM_RC_OK)
82 {
83 free_state (sd);
84 return 0;
85 }
86
87 /* Allocate a handler for the control registers and other devices
88 if no memory for that range has been allocated by the user.
89 All are allocated in one chunk to keep things from being
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90 unnecessarily complicated.
91 TODO: Move these to the sim-model framework. */
92 sim_hw_parse (sd, "/core/%s/reg %#x %i", "m32r_uart", UART_BASE_ADDR, 0x100);
93 sim_hw_parse (sd, "/core/%s/reg %#x %i", "m32r_cache", 0xfffffff0, 0x10);
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94
95 /* Allocate core managed memory if none specified by user.
96 Use address 4 here in case the user wanted address 0 unmapped. */
97 if (sim_core_read_buffer (sd, NULL, read_map, &c, 4, 1) == 0)
98 sim_do_commandf (sd, "memory region 0,0x%x", M32R_DEFAULT_MEM_SIZE);
99
100 /* check for/establish the reference program image */
e8f20a28 101 if (sim_analyze_program (sd, STATE_PROG_FILE (sd), abfd) != SIM_RC_OK)
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102 {
103 free_state (sd);
104 return 0;
105 }
106
107 /* Establish any remaining configuration options. */
108 if (sim_config (sd) != SIM_RC_OK)
109 {
110 free_state (sd);
111 return 0;
112 }
113
114 if (sim_post_argv_init (sd) != SIM_RC_OK)
115 {
116 free_state (sd);
117 return 0;
118 }
119
120 /* Open a copy of the cpu descriptor table. */
121 {
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122 CGEN_CPU_DESC cd = m32r_cgen_cpu_open_1 (STATE_ARCHITECTURE (sd)->printable_name,
123 CGEN_ENDIAN_BIG);
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124 for (i = 0; i < MAX_NR_PROCESSORS; ++i)
125 {
126 SIM_CPU *cpu = STATE_CPU (sd, i);
127 CPU_CPU_DESC (cpu) = cd;
128 CPU_DISASSEMBLER (cpu) = sim_cgen_disassemble_insn;
129 }
130 m32r_cgen_init_dis (cd);
131 }
132
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133 for (c = 0; c < MAX_NR_PROCESSORS; ++c)
134 {
135 /* Only needed for profiling, but the structure member is small. */
136 memset (CPU_M32R_MISC_PROFILE (STATE_CPU (sd, i)), 0,
137 sizeof (* CPU_M32R_MISC_PROFILE (STATE_CPU (sd, i))));
138 /* Hook in callback for reporting these stats */
139 PROFILE_INFO_CPU_CALLBACK (CPU_PROFILE_DATA (STATE_CPU (sd, i)))
140 = print_m32r_misc_cpu;
141 }
142
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143 return sd;
144}
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145\f
146SIM_RC
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147sim_create_inferior (SIM_DESC sd, struct bfd *abfd, char * const *argv,
148 char * const *envp)
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149{
150 SIM_CPU *current_cpu = STATE_CPU (sd, 0);
151 SIM_ADDR addr;
152
153 if (abfd != NULL)
154 addr = bfd_get_start_address (abfd);
155 else
156 addr = 0;
157 sim_pc_set (current_cpu, addr);
158
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159 if (STATE_ENVIRONMENT (sd) == USER_ENVIRONMENT)
160 {
161 m32rbf_h_cr_set (current_cpu,
162 m32r_decode_gdb_ctrl_regnum(SPI_REGNUM), 0x1f00000);
163 m32rbf_h_cr_set (current_cpu,
164 m32r_decode_gdb_ctrl_regnum(SPU_REGNUM), 0x1f00000);
165 }
6edf0760 166
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167 /* Standalone mode (i.e. `run`) will take care of the argv for us in
168 sim_open() -> sim_parse_args(). But in debug mode (i.e. 'target sim'
169 with `gdb`), we need to handle it because the user can change the
170 argv on the fly via gdb's 'run'. */
171 if (STATE_PROG_ARGV (sd) != argv)
172 {
173 freeargv (STATE_PROG_ARGV (sd));
174 STATE_PROG_ARGV (sd) = dupargv (argv);
175 }
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176
177 return SIM_RC_OK;
178}
179
180/* PROFILE_CPU_CALLBACK */
181
182static void
183print_m32r_misc_cpu (SIM_CPU *cpu, int verbose)
184{
185 SIM_DESC sd = CPU_STATE (cpu);
186 char buf[20];
187
188 if (CPU_PROFILE_FLAGS (cpu) [PROFILE_INSN_IDX])
189 {
190 sim_io_printf (sd, "Miscellaneous Statistics\n\n");
191 sim_io_printf (sd, " %-*s %s\n\n",
192 PROFILE_LABEL_WIDTH, "Fill nops:",
193 sim_add_commas (buf, sizeof (buf),
194 CPU_M32R_MISC_PROFILE (cpu)->fillnop_count));
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195 if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_m32rx)
196 sim_io_printf (sd, " %-*s %s\n\n",
197 PROFILE_LABEL_WIDTH, "Parallel insns:",
198 sim_add_commas (buf, sizeof (buf),
199 CPU_M32R_MISC_PROFILE (cpu)->parallel_count));
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200 if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_m32r2)
201 sim_io_printf (sd, " %-*s %s\n\n",
202 PROFILE_LABEL_WIDTH, "Parallel insns:",
203 sim_add_commas (buf, sizeof (buf),
204 CPU_M32R_MISC_PROFILE (cpu)->parallel_count));
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205 }
206}