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Commit | Line | Data |
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369fba30 DE |
1 | /* Main header for the m32r. */ |
2 | ||
3 | #define USING_SIM_BASE_H /* FIXME: quick hack */ | |
4 | ||
5 | struct _sim_cpu; /* FIXME: should be in sim-basics.h */ | |
6 | typedef struct _sim_cpu SIM_CPU; | |
7 | ||
8 | /* sim-basics.h includes config.h but cgen-types.h must be included before | |
9 | sim-basics.h and cgen-types.h needs config.h. */ | |
10 | #include "config.h" | |
11 | ||
b8a9943d | 12 | #include "ansidecl.h" |
7e927218 | 13 | #include "symcat.h" |
369fba30 | 14 | #include "cgen-types.h" |
ea32bce7 | 15 | #include "arch.h" |
369fba30 DE |
16 | #include "sim-basics.h" |
17 | ||
18 | /* These must be defined before sim-base.h. */ | |
7e927218 | 19 | typedef USI sim_cia; |
02e565a2 DE |
20 | #define CIA_GET(cpu) 0 /* FIXME:(CPU_CGEN_HW (cpu)->h_pc) */ |
21 | #define CIA_SET(cpu,val) 0 /* FIXME:(CPU_CGEN_HW (cpu)->h_pc = (val)) */ | |
369fba30 DE |
22 | |
23 | /* FIXME: Shouldn't be required to define these this early. */ | |
24 | #define SIM_ENGINE_HALT_HOOK(SD, LAST_CPU, CIA) | |
25 | #define SIM_ENGINE_RESTART_HOOK(SD, LAST_CPU, CIA) | |
26 | ||
7e927218 DE |
27 | /* Catch address exceptions. */ |
28 | #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \ | |
29 | m32r_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \ | |
30 | (TRANSFER), (ERROR)) | |
31 | ||
369fba30 DE |
32 | #include "sim-base.h" |
33 | #include "cgen-sim.h" | |
34 | /*#include "cgen-mem.h"*/ | |
35 | #include "cgen-trace.h" | |
369fba30 DE |
36 | #include "cpu-sim.h" |
37 | ||
7e927218 DE |
38 | /* Function to catch address exceptions. */ |
39 | extern SIM_CORE_SIGNAL_FN m32r_core_signal; | |
40 | ||
369fba30 | 41 | #ifdef WANT_CPU_M32R |
ea32bce7 DE |
42 | #include "cpu.h" |
43 | #include "decode.h" | |
369fba30 DE |
44 | #endif |
45 | /* start-sanitize-m32rx */ | |
46 | #ifdef WANT_CPU_M32RX | |
ea32bce7 DE |
47 | #include "cpux.h" |
48 | #include "decodex.h" | |
369fba30 DE |
49 | #endif |
50 | /* end-sanitize-m32rx */ | |
ea32bce7 | 51 | #include "cpuall.h" |
7e927218 DE |
52 | \f |
53 | /* The _sim_cpu struct. */ | |
369fba30 DE |
54 | |
55 | struct _sim_cpu { | |
56 | sim_cpu_base base; | |
57 | ||
ea32bce7 | 58 | /* Static parts of cgen. */ |
369fba30 DE |
59 | CGEN_CPU cgen_cpu; |
60 | ||
7e927218 DE |
61 | M32R_MISC_PROFILE m32r_misc_profile; |
62 | #define CPU_M32R_MISC_PROFILE(cpu) ((cpu)->m32r_misc_profile) | |
63 | ||
ea32bce7 | 64 | /* CPU specific parts go here. |
369fba30 DE |
65 | Note that in files that don't need to access these pieces WANT_CPU_FOO |
66 | won't be defined and thus these parts won't appear. This is ok. | |
67 | One has to of course be careful to not take the size of this | |
7e927218 DE |
68 | struct and no structure members accessed in non-cpu specific files can |
69 | go after here. */ | |
369fba30 DE |
70 | #if defined (WANT_CPU_M32R) |
71 | M32R_CPU_DATA cpu_data; | |
ea32bce7 | 72 | /* start-sanitize-m32rx */ |
369fba30 DE |
73 | #elif defined (WANT_CPU_M32RX) |
74 | M32RX_CPU_DATA cpu_data; | |
ea32bce7 | 75 | /* end-sanitize-m32rx */ |
369fba30 | 76 | #endif |
369fba30 | 77 | }; |
7e927218 DE |
78 | \f |
79 | /* The sim_state struct. */ | |
369fba30 DE |
80 | |
81 | struct sim_state { | |
82 | sim_cpu *cpu; | |
83 | #define STATE_CPU(sd, n) (/*&*/ (sd)->cpu) | |
84 | ||
85 | CGEN_STATE cgen_state; | |
86 | ||
87 | sim_state_base base; | |
88 | }; | |
7e927218 DE |
89 | \f |
90 | /* Misc. */ | |
369fba30 DE |
91 | |
92 | /* Default memory size. */ | |
93 | #define M32R_DEFAULT_MEM_SIZE 0x800000 /* 8M */ | |
7e927218 DE |
94 | |
95 | /* Register access fns. These look up the current mach and call the | |
96 | appropriate handler. */ | |
97 | SI h_gr_get (SIM_CPU *, UINT); | |
98 | void h_gr_set (SIM_CPU *, UINT, SI); |