]> git.ipfire.org Git - thirdparty/binutils-gdb.git/blame - sim/mips/configure.ac
sim: move -Werror disabling to Makefile
[thirdparty/binutils-gdb.git] / sim / mips / configure.ac
CommitLineData
c906108c 1dnl Process this file with autoconf to produce a configure script.
c906108c 2AC_INIT(Makefile.in)
760b3e8b 3AC_CONFIG_MACRO_DIRS([../m4 ../.. ../../config])
c906108c 4
6ffe910a 5SIM_AC_COMMON
35695fd6 6
c906108c 7dnl Options available in this module
e6c674b8 8SIM_AC_OPTION_RESERVED_BITS(1)
c906108c
SS
9
10# DEPRECATED
11#
12# Instead of defining a `subtarget' macro, code should be checking
13# the value of {STATE,CPU}_ARCHITECTURE to identify the architecture
14# in question.
15#
16case "${target}" in
4c54fc26 17 mips64vr*-*-*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1" ;;
c906108c 18 mips*tx39*) SIM_SUBTARGET="-DSUBTARGET_R3900=1";;
109ad085 19 mips*-sde-elf*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
cc220243 20 mips*-mti-elf*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
1e799e28
CD
21 mipsisa32*-*-*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
22 mipsisa64*-*-*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";;
c906108c
SS
23 *) SIM_SUBTARGET="";;
24esac
25AC_SUBST(SIM_SUBTARGET)
26
27
28
c906108c
SS
29#
30# Select the bitsize of the target
31#
32mips_addr_bitsize=
33case "${target}" in
4b5d35ee 34 mips*-sde-elf*) mips_bitsize=64 ; mips_msb=63 ;;
cc220243 35 mips*-mti-elf*) mips_bitsize=64 ; mips_msb=63 ;;
c906108c
SS
36 mips64*-*-*) mips_bitsize=64 ; mips_msb=63 ;;
37 mips16*-*-*) mips_bitsize=64 ; mips_msb=63 ;;
1e799e28
CD
38 mipsisa32*-*-*) mips_bitsize=32 ; mips_msb=31 ;;
39 mipsisa64*-*-*) mips_bitsize=64 ; mips_msb=63 ;;
c906108c
SS
40 mips*-*-*) mips_bitsize=32 ; mips_msb=31 ;;
41 *) mips_bitsize=64 ; mips_msb=63 ;;
42esac
43SIM_AC_OPTION_BITSIZE($mips_bitsize,$mips_msb,$mips_addr_bitsize)
44
45
46
47#
48# Select the floating hardware support of the target
49#
50mips_fpu=HARDWARE_FLOATING_POINT
51mips_fpu_bitsize=
52case "${target}" in
4b5d35ee
TS
53 mips*tx39*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=32 ;;
54 mips*-sde-elf*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
cc220243 55 mips*-mti-elf*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
c906108c
SS
56 mips64*-*-*) mips_fpu=HARD_FLOATING_POINT ;;
57 mips16*-*-*) mips_fpu=HARD_FLOATING_POINT ;;
1e799e28
CD
58 mipsisa32*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
59 mipsisa64*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;;
c906108c
SS
60 mips*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=32 ;;
61 *) mips_fpu=HARD_FLOATING_POINT ;;
62esac
63SIM_AC_OPTION_FLOAT($mips_fpu,$mips_fpu_bitsize)
64
65
66
c906108c
SS
67#
68# Select the IGEN architecture
69#
70sim_gen=IGEN
71sim_igen_machine="-M mipsIV"
139181c8 72sim_m16_machine="-M mips16,mipsIII"
c906108c
SS
73sim_igen_filter="32,64,f"
74sim_m16_filter="16"
4c54fc26
CD
75sim_mach_default="mips8000"
76
c906108c
SS
77case "${target}" in
78 mips*tx39*) sim_gen=IGEN
79 sim_igen_filter="32,f"
80 sim_igen_machine="-M r3900"
81 ;;
82 mips64vr43*-*-*) sim_gen=IGEN
83 sim_igen_machine="-M mipsIV"
4c54fc26 84 sim_mach_default="mips8000"
c906108c
SS
85 ;;
86 mips64vr5*-*-*) sim_gen=IGEN
87 sim_igen_machine="-M vr5000"
4c54fc26 88 sim_mach_default="mips5000"
c906108c
SS
89 ;;
90 mips64vr41*) sim_gen=M16
91 sim_igen_machine="-M vr4100"
92 sim_m16_machine="-M vr4100"
93 sim_igen_filter="32,64,f"
94 sim_m16_filter="16"
4c54fc26 95 sim_mach_default="mips4100"
c906108c 96 ;;
4c54fc26
CD
97 mips64vr-*-* | mips64vrel-*-*)
98 sim_gen=MULTI
99 sim_multi_configs="\
100 vr4100:mipsIII,mips16,vr4100:32,64:mips4100,mips4111\
101 vr4120:mipsIII,mips16,vr4120:32,64:mips4120\
102 vr5000:mipsIV:32,64,f:mips4300,mips5000\
103 vr5400:mipsIV,vr5400:32,64,f:mips5400\
104 vr5500:mipsIV,vr5500:32,64,f:mips5500"
105 sim_multi_default=mips5000
106 ;;
cc220243 107 mips*-sde-elf* | mips*-mti-elf*)
8e394ffc
AB
108 sim_gen=MULTI
109 sim_multi_configs="\
110 micromips:micromips64,micromipsdsp:32,64,f:mips_micromips\
111 mips64r2:mips64r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2,smartmips:32,64,f:mipsisa64r2"
112 sim_multi_default=mipsisa64r2
3669427c 113 ;;
c906108c
SS
114 mips64*-*-*) sim_igen_filter="32,64,f"
115 sim_gen=IGEN
116 ;;
117 mips16*-*-*) sim_gen=M16
118 sim_igen_filter="32,64,f"
119 sim_m16_filter="16"
120 ;;
8e394ffc
AB
121 mipsisa32r2*-*-*) sim_gen=MULTI
122 sim_multi_configs="\
123 micromips:micromips32,micromipsdsp:32,f:mips_micromips\
124 mips32r2:mips32r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2,smartmips:32,f:mipsisa32r2"
125 sim_multi_default=mipsisa32r2
e70cb6cd 126 ;;
d5fb0879
RS
127 mipsisa32*-*-*) sim_gen=M16
128 sim_igen_machine="-M mips32,mips16,mips16e,smartmips"
129 sim_m16_machine="-M mips16,mips16e,mips32"
130 sim_igen_filter="32,f"
131 sim_mach_default="mipsisa32"
1e799e28 132 ;;
d5fb0879
RS
133 mipsisa64r2*-*-*) sim_gen=M16
134 sim_igen_machine="-M mips64r2,mips3d,mips16,mips16e,mdmx,dsp,dsp2"
135 sim_m16_machine="-M mips16,mips16e,mips64r2"
136 sim_igen_filter="32,64,f"
137 sim_mach_default="mipsisa64r2"
e70cb6cd 138 ;;
7cbea089 139 mipsisa64sb1*-*-*) sim_gen=IGEN
109ad085 140 sim_igen_machine="-M mips64,mips3d,sb1"
7cbea089 141 sim_igen_filter="32,64,f"
4c54fc26 142 sim_mach_default="mips_sb1"
7cbea089 143 ;;
d5fb0879
RS
144 mipsisa64*-*-*) sim_gen=M16
145 sim_igen_machine="-M mips64,mips3d,mips16,mips16e,mdmx"
146 sim_m16_machine="-M mips16,mips16e,mips64"
147 sim_igen_filter="32,64,f"
148 sim_mach_default="mipsisa64"
1e799e28 149 ;;
109ad085 150 mips*lsi*) sim_gen=M16
c906108c
SS
151 sim_igen_machine="-M mipsIII,mips16"
152 sim_m16_machine="-M mips16,mipsIII"
153 sim_igen_filter="32,f"
154 sim_m16_filter="16"
4c54fc26 155 sim_mach_default="mips4000"
109ad085 156 ;;
c906108c
SS
157 mips*-*-*) sim_gen=IGEN
158 sim_igen_filter="32,f"
159 ;;
160esac
4c54fc26
CD
161
162# The MULTI generator can combine several simulation engines into one.
163# executable. A configuration which uses the MULTI should set two
164# variables: ${sim_multi_configs} and ${sim_multi_default}.
165#
166# ${sim_multi_configs} is the list of engines to build. Each
167# space-separated entry has the form NAME:MACHINE:FILTER:BFDMACHS,
168# where:
169#
170# - NAME is a C-compatible prefix for the engine,
171# - MACHINE is a -M argument,
172# - FILTER is a -F argument, and
173# - BFDMACHS is a comma-separated list of bfd machines that the
174# simulator can run.
175#
176# Each entry will have a separate simulation engine whose prefix is
177# m32<NAME>. If the machine list includes "mips16", there will also
178# be a mips16 engine, prefix m16<NAME>. The mips16 engine will be
179# generated using the same machine list as the 32-bit version,
180# but the filter will be "16" instead of FILTER.
181#
182# The simulator compares the bfd mach against BFDMACHS to decide
183# which engine to use. Entries in BFDMACHS should be bfd_mach
184# values with "bfd_mach_" removed. ${sim_multi_default} says
185# which entry should be the default.
186if test ${sim_gen} = MULTI; then
187
188 # Simple sanity check.
189 if test -z "${sim_multi_configs}" || test -z "${sim_multi_default}"; then
306f4178 190 AC_MSG_ERROR(Error in configure.ac: MULTI simulator not set up correctly)
4c54fc26
CD
191 fi
192
193 # Start in a known state.
194 rm -f multi-include.h multi-run.c
195 sim_multi_flags=
196 sim_multi_src=
8e394ffc 197 sim_multi_obj=
4c54fc26
CD
198 sim_multi_igen_configs=
199 sim_seen_default=no
200
201 cat << __EOF__ > multi-run.c
202/* Main entry point for MULTI simulators.
3666a048 203 Copyright (C) 2003-2021 Free Software Foundation, Inc.
4c54fc26
CD
204
205 This program is free software; you can redistribute it and/or modify
206 it under the terms of the GNU General Public License as published by
35ee6e1e 207 the Free Software Foundation; either version 3 of the License, or
4c54fc26
CD
208 (at your option) any later version.
209
210 This program is distributed in the hope that it will be useful,
211 but WITHOUT ANY WARRANTY; without even the implied warranty of
212 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
213 GNU General Public License for more details.
214
215 You should have received a copy of the GNU General Public License
35ee6e1e 216 along with this program. If not, see <http://www.gnu.org/licenses/>.
4c54fc26
CD
217
218 --
219
220 This file was generated by sim/mips/configure. */
221
222#include "sim-main.h"
223#include "multi-include.h"
8e394ffc
AB
224#include "elf-bfd.h"
225#include "elf/mips.h"
4c54fc26
CD
226
227#define SD sd
228#define CPU cpu
229
230void
231sim_engine_run (SIM_DESC sd,
232 int next_cpu_nr,
233 int nr_cpus,
234 int signal) /* ignore */
235{
236 int mach;
237
238 if (STATE_ARCHITECTURE (sd) == NULL)
239 mach = bfd_mach_${sim_multi_default};
1554f758 240 else if (elf_elfheader (STATE_PROG_BFD (sd))->e_flags
8e394ffc
AB
241 & EF_MIPS_ARCH_ASE_MICROMIPS)
242 mach = bfd_mach_mips_micromips;
4c54fc26
CD
243 else
244 mach = STATE_ARCHITECTURE (SD)->mach;
245
246 switch (mach)
247 {
248__EOF__
249
250 for fc in ${sim_multi_configs}; do
251
252 # Split up the entry. ${c} contains the first three elements.
253 # Note: outer sqaure brackets are m4 quotes.
254 c=`echo ${fc} | sed ['s/:[^:]*$//']`
255 bfdmachs=`echo ${fc} | sed 's/.*://'`
256 name=`echo ${c} | sed 's/:.*//'`
257 machine=`echo ${c} | sed 's/.*:\(.*\):.*/\1/'`
258 filter=`echo ${c} | sed 's/.*://'`
259
260 # Build the following lists:
261 #
262 # sim_multi_flags: all -M and -F flags used by the simulator
263 # sim_multi_src: all makefile-generated source files
264 # sim_multi_obj: the objects for ${sim_multi_src}
265 # sim_multi_igen_configs: igen configuration strings.
266 #
267 # Each entry in ${sim_multi_igen_configs} is a prefix (m32
268 # or m16) followed by the NAME, MACHINE and FILTER part of
269 # the ${sim_multi_configs} entry.
270 sim_multi_flags="${sim_multi_flags} -F ${filter} -M ${machine}"
271
8e394ffc 272 # Check whether special handling is needed.
4c54fc26
CD
273 case ${c} in
274 *:*mips16*:*)
275 # Run igen twice, once for normal mode and once for mips16.
276 ws="m32 m16"
277
278 # The top-level function for the mips16 simulator is
279 # in a file m16${name}_run.c, generated by the
280 # tmp-run-multi Makefile rule.
281 sim_multi_src="${sim_multi_src} m16${name}_run.c"
282 sim_multi_obj="${sim_multi_obj} m16${name}_run.o"
283 sim_multi_flags="${sim_multi_flags} -F 16"
284 ;;
8e394ffc
AB
285 *:*micromips32*:*)
286 # Run igen thrice, once for micromips32, once for micromips16,
287 # and once for m32.
288 ws="micromips_m32 micromips16 micromips32"
289
290 # The top-level function for the micromips simulator is
291 # in a file micromips${name}_run.c, generated by the
292 # tmp-run-multi Makefile rule.
293 sim_multi_src="${sim_multi_src} micromips${name}_run.c"
294 sim_multi_obj="${sim_multi_obj} micromips${name}_run.o"
295 sim_multi_flags="${sim_multi_flags} -F 16,32"
296 ;;
297 *:*micromips64*:*)
298 # Run igen thrice, once for micromips64, once for micromips16,
299 # and once for m64.
300 ws="micromips_m64 micromips16 micromips64"
301
302 # The top-level function for the micromips simulator is
303 # in a file micromips${name}_run.c, generated by the
304 # tmp-run-multi Makefile rule.
305 sim_multi_src="${sim_multi_src} micromips${name}_run.c"
306 sim_multi_obj="${sim_multi_obj} micromips${name}_run.o"
307 sim_multi_flags="${sim_multi_flags} -F 16,32,64"
308 ;;
4c54fc26
CD
309 *)
310 ws=m32
311 ;;
312 esac
313
314 # Now add the list of igen-generated files to ${sim_multi_src}
315 # and ${sim_multi_obj}.
316 for w in ${ws}; do
317 for base in engine icache idecode model semantics support; do
318 sim_multi_src="${sim_multi_src} ${w}${name}_${base}.c"
319 sim_multi_src="${sim_multi_src} ${w}${name}_${base}.h"
320 sim_multi_obj="${sim_multi_obj} ${w}${name}_${base}.o"
321 done
322 sim_multi_igen_configs="${sim_multi_igen_configs} ${w}${c}"
323 done
324
325 # Add an include for the engine.h file. This file declares the
326 # top-level foo_engine_run() function.
327 echo "#include \"${w}${name}_engine.h\"" >> multi-include.h
328
329 # Add case statements for this engine to sim_engine_run().
330 for mach in `echo ${bfdmachs} | sed 's/,/ /g'`; do
331 echo " case bfd_mach_${mach}:" >> multi-run.c
332 if test ${mach} = ${sim_multi_default}; then
333 echo " default:" >> multi-run.c
334 sim_seen_default=yes
335 fi
336 done
337 echo " ${w}${name}_engine_run (sd, next_cpu_nr, nr_cpus, signal);" \
338 >> multi-run.c
339 echo " break;" >> multi-run.c
340 done
341
342 # Check whether we added a 'default:' label.
343 if test ${sim_seen_default} = no; then
306f4178 344 AC_MSG_ERROR(Error in configure.ac: \${sim_multi_configs} doesn't have an entry for \${sim_multi_default})
4c54fc26
CD
345 fi
346
347 cat << __EOF__ >> multi-run.c
348 }
349}
350
351int
352mips_mach_multi (SIM_DESC sd)
353{
354 if (STATE_ARCHITECTURE (sd) == NULL)
355 return bfd_mach_${sim_multi_default};
356
357 switch (STATE_ARCHITECTURE (SD)->mach)
358 {
359__EOF__
360
361 # Add case statements for this engine to mips_mach_multi().
362 for fc in ${sim_multi_configs}; do
363
364 # Split up the entry. ${c} contains the first three elements.
365 # Note: outer sqaure brackets are m4 quotes.
366 c=`echo ${fc} | sed ['s/:[^:]*$//']`
367 bfdmachs=`echo ${fc} | sed 's/.*://'`
368
369 for mach in `echo ${bfdmachs} | sed 's/,/ /g'`; do
370 echo " case bfd_mach_${mach}:" >> multi-run.c
371 done
372 done
373
374 cat << __EOF__ >> multi-run.c
375 return (STATE_ARCHITECTURE (SD)->mach);
376 default:
377 return bfd_mach_${sim_multi_default};
378 }
379}
380__EOF__
381
382 SIM_SUBTARGET="$SIM_SUBTARGET -DMIPS_MACH_MULTI"
383else
384 # For clean-extra
385 sim_multi_src=doesnt-exist.c
386
387 if test x"${sim_mach_default}" = x""; then
306f4178 388 AC_MSG_ERROR(Error in configure.ac: \${sim_mach_default} not defined)
4c54fc26
CD
389 fi
390 SIM_SUBTARGET="$SIM_SUBTARGET -DMIPS_MACH_DEFAULT=bfd_mach_${sim_mach_default}"
391fi
c906108c
SS
392sim_igen_flags="-F ${sim_igen_filter} ${sim_igen_machine} ${sim_igen_smp}"
393sim_m16_flags=" -F ${sim_m16_filter} ${sim_m16_machine} ${sim_igen_smp}"
8e394ffc
AB
394sim_micromips16_flags=" -F ${sim_micromips16_filter} ${sim_micromips16_machine} ${sim_igen_smp}"
395sim_micromips_flags=" -F ${sim_micromips_filter} ${sim_micromips_machine} ${sim_igen_smp}"
c906108c
SS
396AC_SUBST(sim_igen_flags)
397AC_SUBST(sim_m16_flags)
8e394ffc
AB
398AC_SUBST(sim_micromips_flags)
399AC_SUBST(sim_micromips16_flags)
c906108c 400AC_SUBST(sim_gen)
4c54fc26
CD
401AC_SUBST(sim_multi_flags)
402AC_SUBST(sim_multi_igen_configs)
403AC_SUBST(sim_multi_src)
404AC_SUBST(sim_multi_obj)
c906108c
SS
405#
406# Add simulated hardware devices
407#
9b1af85c 408SIM_AC_OPTION_HARDWARE(tx3904cpu tx3904irc tx3904tmr tx3904sio)
c906108c
SS
409
410
c906108c 411AC_PATH_X
c906108c 412
c906108c 413AC_CHECK_LIB(m, fabs)
c906108c
SS
414
415SIM_AC_OUTPUT