projects / thirdparty / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| d6416cdc RW |
1 | 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de> |
| 2 | ||
| 81ecdfbb RW |
3 | * config.in: Regenerate. |
| 4 | * configure: Likewise. | |
| 5 | ||
| d6416cdc RW |
6 | * configure: Regenerate. |
| 7 | ||
| 7a321525 AG |
8 | 2009-07-31 Anthony Green <green@moxielogic.com> |
| 9 | ||
| 10 | * interp.c: Increase simulated memory to 16MB. | |
| 11 | (sim_resume): Tweak swi system calls to support new ABI (up to 5 | |
| 12 | args in regs). Also simluate proper exception processing for | |
| 13 | Linux system calls. | |
| 14 | ||
| 15 | 2009-07-30 Anthony Green <green@moxielogic.com> | |
| 16 | ||
| 17 | * interp.c (sim_resume): Add system call software interrupt support. | |
| 18 | ||
| 86566200 AG |
19 | 2009-06-11 Anthony Green <green@moxielogic.com> |
| 20 | ||
| 21 | * interp.c (INST2OFFSET): Define. | |
| 22 | (sim_resume): Support new PC relative branch instructions. | |
| 23 | ||
| 77176dfc AG |
24 | 2009-05-09 Anthony Green <green@moxielogic.com> |
| 25 | ||
| 26 | * interp.c (sim_resume): Add missing breaks in switch. | |
| 27 | ||
| fdd6fa61 AG |
28 | 2008-10-03 Anthony Green <green@moxielogic.com> |
| 29 | ||
| 30 | * interp.c (sim_resume): Add support for ldo.b, sto.b, ldo.s, sto.s. | |
| 31 | ||
| 32 | 2008-09-10 Anthony Green <green@moxielogic.com> | |
| 33 | ||
| 34 | * interp.c (NUM_SPRO_SREGS): New. | |
| 35 | (struct moxie_regset): Add sregs. | |
| 36 | (set_initial_gprs): Initialize sregs. | |
| 37 | (sim_resume): Add gsr and ssr support. | |
| 38 | ||
| 39 | 2008-09-04 Anthony Green <green@moxielogic.com> | |
| 40 | ||
| 41 | * interp.c (sim_resume): Add inc and dec instructions. | |
| 42 | ||
| 43 | 2008-09-04 Anthony Green <green@moxielogic.com> | |
| 44 | ||
| 45 | * interp.c (struct moxie_regset): Use an unsigned long long to keep | |
| 46 | track of instruction trace counts. | |
| 47 | * interp.c (sim_resume): Ditto. | |
| 48 | (sim_info): Ditto. | |
| 49 | ||
| 50 | 2008-08-22 Anthony Green <green@moxielogic.com> | |
| 51 | ||
| 52 | * interp.c (sim_resume): Remove debugging code. | |
| 53 | ||
| 54 | 2008-08-20 Anthony Green <green@moxielogic.com> | |
| 55 | ||
| 56 | * interp.c (TRACE): Add new tracing infrastructure. | |
| 57 | (sim_resume): Use it. | |
| 58 | (reg_names): Add new registers. | |
| 59 | (NUM_MOXIE_REGS): New registers. | |
| 60 | (PC_REGNO): New registers. | |
| 61 | (sim_resume): New instruction encodings. | |
| 62 | ||
| 63 | 2008-08-16 Anthony Green <green@moxielogic.com> | |
| 64 | ||
| 65 | * interp.c (sim_resume): Add SYS_read, and fix SYS_open and SYS_write. | |
| 66 | (convert_target_flags): New function. | |
| 67 | ||
| 68 | 2008-08-08 Anthony Green <green@moxielogic.com> | |
| 69 | ||
| 70 | * interp.c (sim_resume): Add SYS_open and SYS_write system call support. | |
| 71 | ||
| 72 | 2008-08-04 Anthony Green <green@moxielogic.com> | |
| 73 | ||
| 74 | * Makefile.in (SIM_EXTRA_LIBS): Add -lz. | |
| 75 | ||
| 76 | 2008-08-04 Anthony Green <green@moxielogic.com> | |
| 77 | ||
| 78 | * interp.c (sim_create_inferior): Set argc & argv in the target. | |
| 79 | ||
| 80 | 2008-04-12 Anthony Green <green@moxielogic.com> | |
| 81 | ||
| 82 | * interp.c (sim_resume): Add brk. | |
| 83 | ||
| 84 | 2008-04-10 Anthony Green <green@moxielogic.com> | |
| 85 | ||
| 86 | * interp.c (sim_resume): Add static chain pointer to call frame. | |
| 87 | ||
| 88 | 2008-03-24 Anthony Green <green@moxielogic.com> | |
| 89 | ||
| 90 | * interp.c (sim_resume): Add missing breaks. | |
| 91 | (sim_resume): Fix neg implementation. | |
| 92 | ||
| 93 | 2008-03-23 Anthony Green <green@moxielogic.com> | |
| 94 | ||
| 95 | * interp.c (sim_load): Don't require a .bss section. | |
| 96 | ||
| 97 | 2008-03-21 Anthony Green <green@moxielogic.com> | |
| 98 | ||
| 99 | * interp.c (sim_resume): Add swi, and, lshr, ashl, sub.l, neg, or, | |
| 100 | not, ashr, xor. | |
| 101 | ||
| 102 | 2008-03-20 Anthony Green <green@moxielogic.com> | |
| 103 | ||
| 104 | * interp.c (struct moxie_regset): Add condition code, cc. | |
| 105 | (CC_GT, CC_LT, CC_EQ, CC_GTU, CC_LTU): Define. | |
| 106 | (sim_resume): Add jmpa, jsr, cmp, beq, bne, blt, bgt, bltu, bgtu, | |
| 107 | bge, ble, bgeu, and bleu. | |
| 108 | (rbat, rsat, wbat, wsat): New functions. | |
| 109 | (sim_resume): Add ld.b, lda.b, ldi.b, ld.s, lda.s, ldi.s, st.b, | |
| 110 | sta.b, st.s, sta.s, jmp. | |
| 111 | ||
| 112 | 2008-03-19 Anthony Green <green@moxielogic.com> | |
| 113 | ||
| 114 | * interp.c (sim_resume): Add ld.l, st.l, lda.l, sta.l. | |
| 115 | jsra should set $fp == $sp. | |
| 116 | Fix jsra and ret semantics. | |
| 117 | ||
| 118 | 2008-03-18 Anthony Green <green@moxielogic.com> | |
| 119 | ||
| 120 | * interp.c (sim_resume): Add push, pop and add.l. | |
| 121 | ||
| 122 | 2008-03-16 Anthony Green <green@moxielogic.com> | |
| 123 | ||
| 124 | * interp.c (EXTRACT_WORD): Define. | |
| 125 | (rlat): Use EXTRACT_WORD. | |
| 126 | (sim_resume): Add jsra and ret. | |
| 127 | ||
| 128 | 2008-02-22 Anthony Green <green@moxielogic.com> | |
| 129 | ||
| 130 | * interp.c (reg_names): Define. | |
| 131 | (sim_resume): Use reg_names. | |
| 132 | ||
| 133 | 2008-02-21 Anthony Green <green@moxielogic.com> | |
| 134 | ||
| 135 | * config.in, configure, configure.ac, interp.c, Makefile.in, | |
| 136 | sysdep.h: Created. |