projects / thirdparty / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| 345d88d9 AC |
1 | /* Altivec registers, for PSIM, the PowerPC simulator. |
| 2 | ||
| 6aba47ca | 3 | Copyright 2003, 2007 Free Software Foundation, Inc. |
| 345d88d9 AC |
4 | |
| 5 | Contributed by Red Hat Inc; developed under contract from Motorola. | |
| 6 | Written by matthew green <mrg@redhat.com>. | |
| 7 | ||
| 8 | This file is part of GDB. | |
| 9 | ||
| 10 | This program is free software; you can redistribute it and/or modify | |
| 11 | it under the terms of the GNU General Public License as published by | |
| 12 | the Free Software Foundation; either version 2 of the License, or | |
| 13 | (at your option) any later version. | |
| 14 | ||
| 15 | This program is distributed in the hope that it will be useful, | |
| 16 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 17 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 18 | GNU General Public License for more details. | |
| 19 | ||
| 20 | You should have received a copy of the GNU General Public License | |
| 21 | along with this program; if not, write to the Free Software | |
| 22 | Foundation, Inc., 59 Temple Place - Suite 330, | |
| 23 | Boston, MA 02111-1307, USA. */ | |
| 24 | ||
| 25 | /* Manage this as 4 32-bit entities, 8 16-bit entities or 16 8-bit | |
| 26 | entities. */ | |
| 27 | typedef union | |
| 28 | { | |
| 29 | unsigned8 b[16]; | |
| 30 | unsigned16 h[8]; | |
| 31 | unsigned32 w[4]; | |
| 32 | } vreg; | |
| 33 | ||
| 34 | typedef unsigned32 vscreg; | |
| 35 | ||
| 36 | struct altivec_regs { | |
| 37 | /* AltiVec Registers */ | |
| 38 | vreg vr[32]; | |
| 39 | vscreg vscr; | |
| 40 | }; | |
| 41 | ||
| 42 | /* AltiVec registers */ | |
| 43 | #define VR(N) cpu_registers(processor)->altivec.vr[N] | |
| 44 | ||
| 45 | /* AltiVec vector status and control register */ | |
| 46 | #define VSCR cpu_registers(processor)->altivec.vscr | |
| 47 | ||
| 48 | /* AltiVec endian helpers, wrong endian hosts vs targets need to be | |
| 49 | sure to get the right bytes/halfs/words when the order matters. | |
| 50 | Note that many AltiVec instructions do not depend on byte order and | |
| 51 | work on N independant bits of data. This is only for the | |
| 52 | instructions that actually move data around. */ | |
| 53 | ||
| 54 | #if (WITH_HOST_BYTE_ORDER == BIG_ENDIAN) | |
| 55 | #define AV_BINDEX(x) ((x) & 15) | |
| 56 | #define AV_HINDEX(x) ((x) & 7) | |
| 57 | #else | |
| 58 | static char endian_b2l_bindex[16] = { 3, 2, 1, 0, 7, 6, 5, 4, | |
| 59 | 11, 10, 9, 8, 15, 14, 13, 12 }; | |
| 60 | static char endian_b2l_hindex[16] = { 1, 0, 3, 2, 5, 4, 7, 6 }; | |
| 61 | #define AV_BINDEX(x) endian_b2l_bindex[(x) & 15] | |
| 62 | #define AV_HINDEX(x) endian_b2l_hindex[(x) & 7] | |
| 63 | #endif |