projects / thirdparty / binutils-gdb.git / blame
| Commit | Line | Data |
|---|---|---|
| aa09469f MF |
1 | 2021-02-06 Mike Frysinger <vapier@gentoo.org> |
| 2 | ||
| 3 | * configure: Regenerate. | |
| 4 | ||
| 5f05936d MF |
5 | 2021-01-31 Mike Frysinger <vapier@gentoo.org> |
| 6 | ||
| 7 | * simops.c: Include stdlib.h. | |
| 8 | * configure.ac (SIM_AC_OPTION_WARNINGS): Delete call. | |
| 9 | * configure: Regenerate. | |
| 10 | ||
| 44b30b7f MF |
11 | 2021-01-31 Mike Frysinger <vapier@gentoo.org> |
| 12 | ||
| 13 | * simops.c (OP_10007E0): Change reterr to RETERR. | |
| 14 | ||
| d4e3adda MF |
15 | 2021-01-30 Mike Frysinger <vapier@gentoo.org> |
| 16 | ||
| 17 | * interp.c (sim_open): Delete STATE_WATCHPOINTS (sd)->sizeof_pc. | |
| 18 | ||
| 68ed2854 MF |
19 | 2021-01-11 Mike Frysinger <vapier@gentoo.org> |
| 20 | ||
| 21 | * config.in, configure: Regenerate. | |
| 22 | * interp.c, simops.c: Delete HAVE_STRING_H, HAVE_STRINGS_H, | |
| 23 | HAVE_STDLIB_H, HAVE_TIME_H, and strings.h include. | |
| 24 | ||
| 50df264d MF |
25 | 2021-01-09 Mike Frysinger <vapier@gentoo.org> |
| 26 | ||
| 27 | * configure: Regenerate. | |
| 28 | ||
| bf470982 MF |
29 | 2021-01-09 Mike Frysinger <vapier@gentoo.org> |
| 30 | ||
| 31 | * configure.ac (SIM_AC_OPTION_WARNINGS): Pass "no". | |
| 32 | * configure: Regenerate. | |
| 33 | ||
| 46f900c0 MF |
34 | 2021-01-08 Mike Frysinger <vapier@gentoo.org> |
| 35 | ||
| 36 | * configure: Regenerate. | |
| 37 | ||
| dfb856ba MF |
38 | 2021-01-04 Mike Frysinger <vapier@gentoo.org> |
| 39 | ||
| 40 | * configure: Regenerate. | |
| 41 | ||
| 5c887dd5 JB |
42 | 2017-09-06 John Baldwin <jhb@FreeBSD.org> |
| 43 | ||
| 44 | * configure: Regenerate. | |
| 45 | ||
| ce39bd38 MF |
46 | 2016-01-10 Mike Frysinger <vapier@gentoo.org> |
| 47 | ||
| 48 | * config.in, configure: Regenerate. | |
| 49 | ||
| 22be3fbe MF |
50 | 2016-01-10 Mike Frysinger <vapier@gentoo.org> |
| 51 | ||
| 52 | * configure: Regenerate. | |
| 53 | ||
| 0dc73ef7 MF |
54 | 2016-01-10 Mike Frysinger <vapier@gentoo.org> |
| 55 | ||
| 56 | * configure: Regenerate. | |
| 57 | ||
| 347fe5bb MF |
58 | 2016-01-10 Mike Frysinger <vapier@gentoo.org> |
| 59 | ||
| 60 | * configure: Regenerate. | |
| 61 | ||
| 99d8e879 MF |
62 | 2016-01-10 Mike Frysinger <vapier@gentoo.org> |
| 63 | ||
| 64 | * configure: Regenerate. | |
| 65 | ||
| 35656e95 MF |
66 | 2016-01-10 Mike Frysinger <vapier@gentoo.org> |
| 67 | ||
| 68 | * configure: Regenerate. | |
| 69 | ||
| 16f7876d MF |
70 | 2016-01-10 Mike Frysinger <vapier@gentoo.org> |
| 71 | ||
| 72 | * configure: Regenerate. | |
| 73 | ||
| e19418e0 MF |
74 | 2016-01-10 Mike Frysinger <vapier@gentoo.org> |
| 75 | ||
| 76 | * configure: Regenerate. | |
| 77 | ||
| 936df756 MF |
78 | 2016-01-09 Mike Frysinger <vapier@gentoo.org> |
| 79 | ||
| 80 | * config.in, configure: Regenerate. | |
| 81 | ||
| 2e3d4f4d MF |
82 | 2016-01-06 Mike Frysinger <vapier@gentoo.org> |
| 83 | ||
| 84 | * interp.c (sim_open): Mark argv const. | |
| 85 | (sim_create_inferior): Mark argv and env const. | |
| 86 | ||
| 9bbf6f91 MF |
87 | 2016-01-04 Mike Frysinger <vapier@gentoo.org> |
| 88 | ||
| 89 | * configure: Regenerate. | |
| 90 | ||
| 77cf2ef5 MF |
91 | 2016-01-03 Mike Frysinger <vapier@gentoo.org> |
| 92 | ||
| 93 | * interp.c (sim_open): Update sim_parse_args comment. | |
| 94 | ||
| 0cb8d851 MF |
95 | 2016-01-03 Mike Frysinger <vapier@gentoo.org> |
| 96 | ||
| 97 | * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete. | |
| 98 | * configure: Regenerate. | |
| 99 | ||
| 1ac72f06 MF |
100 | 2016-01-02 Mike Frysinger <vapier@gentoo.org> |
| 101 | ||
| 102 | * configure.ac (SIM_AC_OPTION_ENDIAN): Change LITTLE_ENDIAN to | |
| 103 | LITTLE. | |
| 104 | * configure: Regenerate. | |
| 105 | ||
| e1211e55 MF |
106 | 2015-12-30 Mike Frysinger <vapier@gentoo.org> |
| 107 | ||
| 108 | * wrapper.c (v850_reg_store, v850_reg_fetch): Define. | |
| 109 | (sim_open): Call CPU_REG_FETCH/CPU_REG_STORE. | |
| 110 | (sim_store_register): Rename to ... | |
| 111 | (v850_reg_store): ... this. | |
| 112 | (sim_fetch_register): Rename to ... | |
| 113 | (v850_reg_fetch): ... this. | |
| 114 | ||
| 5e744ef8 MF |
115 | 2015-12-27 Mike Frysinger <vapier@gentoo.org> |
| 116 | ||
| 117 | * Makefile.in (SIM_OBJS): Delete sim-hload.o. | |
| 118 | ||
| 1b393626 MF |
119 | 2015-12-26 Mike Frysinger <vapier@gentoo.org> |
| 120 | ||
| 121 | * config.in, configure: Regenerate. | |
| 122 | ||
| 84e8e361 MF |
123 | 2015-12-24 Mike Frysinger <vapier@gentoo.org> |
| 124 | ||
| 125 | * sim-main.h (WITH_WATCHPOINTS): Delete. | |
| 126 | ||
| 1d19cae7 DV |
127 | 2015-12-15 Dominik Vogt <vogt@linux.vnet.ibm.com> |
| 128 | ||
| 129 | * simops.c (v850_bins): Fix left shift of negative value. | |
| 130 | ||
| c389945b MF |
131 | 2015-11-17 Mike Frysinger <vapier@gentoo.org> |
| 132 | ||
| 133 | * sim-main.h (WITH_CORE): Delete. | |
| 134 | ||
| cdf850e9 MF |
135 | 2015-11-17 Mike Frysinger <vapier@gentoo.org> |
| 136 | ||
| 137 | * sim-main.h (WITH_MODULO_MEMORY): Delete. | |
| 138 | ||
| 797eee42 MF |
139 | 2015-11-15 Mike Frysinger <vapier@gentoo.org> |
| 140 | ||
| 141 | * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o. | |
| 142 | ||
| 6e4f085c MF |
143 | 2015-11-14 Mike Frysinger <vapier@gentoo.org> |
| 144 | ||
| 145 | * interp.c (sim_close): Delete. | |
| 146 | ||
| 8d0978fb MF |
147 | 2015-06-23 Mike Frysinger <vapier@gentoo.org> |
| 148 | ||
| 149 | * configure: Regenerate. | |
| 150 | ||
| a3487082 MF |
151 | 2015-06-12 Mike Frysinger <vapier@gentoo.org> |
| 152 | ||
| 153 | * configure: Regenerate. | |
| 154 | ||
| 306f4178 MF |
155 | 2015-06-12 Mike Frysinger <vapier@gentoo.org> |
| 156 | ||
| 157 | * configure: Regenerate. | |
| 158 | ||
| 5d19c366 MF |
159 | 2015-06-11 Mike Frysinger <vapier@gentoo.org> |
| 160 | ||
| 161 | * interp.c (INLINE): Delete define. | |
| 162 | ||
| 20bca71d MF |
163 | 2015-04-18 Mike Frysinger <vapier@gentoo.org> |
| 164 | ||
| 165 | * sim-main.h (SIM_CPU): Delete. | |
| 166 | ||
| 7e83aa92 MF |
167 | 2015-04-18 Mike Frysinger <vapier@gentoo.org> |
| 168 | ||
| 169 | * sim-main.h (sim_cia): Delete. | |
| 170 | ||
| 034685f9 MF |
171 | 2015-04-17 Mike Frysinger <vapier@gentoo.org> |
| 172 | ||
| 173 | * sim-main.h (CIA_GET, CIA_SET): Delete. | |
| 174 | ||
| 78e9aa70 MF |
175 | 2015-04-15 Mike Frysinger <vapier@gentoo.org> |
| 176 | ||
| 177 | * Makefile.in (SIM_OBJS): Delete sim-cpu.o. | |
| 178 | * sim-main.h (STATE_CPU): Delete. | |
| 179 | ||
| bf12d44e MF |
180 | 2015-04-13 Mike Frysinger <vapier@gentoo.org> |
| 181 | ||
| 182 | * configure: Regenerate. | |
| 183 | ||
| 14c9ad2e MF |
184 | 2015-04-13 Mike Frysinger <vapier@gentoo.org> |
| 185 | ||
| 186 | * Makefile.in (SIM_OBJS): Add sim-cpu.o. | |
| 187 | * interp.c (v850_pc_get, v850_pc_set): New functions. | |
| 188 | (sim_open): Declare new local var i. Call sim_cpu_alloc_all. | |
| 189 | Call CPU_PC_FETCH & CPU_PC_STORE for all cpus. | |
| 190 | (sim_pc_get): Delete. | |
| 191 | * sim-main.h (SIM_CPU): Define. | |
| 192 | (struct sim_state): Change cpu to an array of pointers. | |
| 193 | (STATE_CPU): Drop &. | |
| 194 | ||
| 122bbfb5 MF |
195 | 2015-04-06 Mike Frysinger <vapier@gentoo.org> |
| 196 | ||
| 197 | * Makefile.in (SIM_OBJS): Delete sim-engine.o and sim-hrw.o. | |
| 198 | ||
| aadc9410 MF |
199 | 2015-03-31 Mike Frysinger <vapier@gentoo.org> |
| 200 | ||
| 201 | * config.in, configure: Regenerate. | |
| 202 | ||
| 05f53ed6 MF |
203 | 2015-03-24 Mike Frysinger <vapier@gentoo.org> |
| 204 | ||
| 205 | * interp.c (sim_pc_get): New function. | |
| 206 | ||
| ae7d0cac MF |
207 | 2015-03-16 Mike Frysinger <vapier@gentoo.org> |
| 208 | ||
| 209 | * config.in, configure: Regenerate. | |
| 210 | ||
| 465fb143 MF |
211 | 2015-03-14 Mike Frysinger <vapier@gentoo.org> |
| 212 | ||
| 213 | * Makefile.in (SIM_RUN_OBJS): Delete. | |
| 214 | ||
| 5cddc23a MF |
215 | 2015-03-14 Mike Frysinger <vapier@gentoo.org> |
| 216 | ||
| 217 | * configure.ac (AC_CHECK_HEADERS): Delete unistd.h & stdlib.h & | |
| 218 | string.h & strings.h & time.h. | |
| 219 | * aclocal.m4, configure: Regenerate. | |
| 220 | ||
| a3976a7c NC |
221 | 2015-02-27 Nick Clifton <nickc@redhat.com> |
| 222 | ||
| 223 | * sim-main.h (reg64_t): New type. | |
| 224 | (v850_regs): Add selID_sregs field. | |
| 225 | (VR, SAT16, SAT32, ABS16, ABS32 ): New macros. | |
| 226 | * v850-dc: Add fields for v850e3v5 instructions. | |
| 227 | * v850.igen (cvtf.dl): Use correctly signed local value. | |
| 228 | (cvtf.dw, cvtf.sw, trncf.dul, trncf.dl, trncf.sul, trncf.sw): | |
| 229 | Likewise. | |
| 230 | * interp.c: Fix old style function declarations. | |
| 231 | * simops.c: Likewise. | |
| 232 | ||
| 9ad55e9b NC |
233 | 2015-02-24 Nick Clifton <nickc@redhat.com> |
| 234 | ||
| 235 | * v850.igen: Add more e3v5 support. | |
| 236 | (FMAF.S): New pattern. | |
| 237 | (FMSF.S): New pattern. | |
| 238 | (FNMAF.S): New pattern. | |
| 239 | (FNMSF.S): New pattern. | |
| 240 | (cnvq15q30): New pattern. | |
| 241 | (cnvq30q15): New pattern. | |
| 242 | (cnvq31q62): New pattern. | |
| 243 | (cnvq62q31): New pattern. | |
| 244 | (dup.h): New pattern. | |
| 245 | (dup.w): New pattern. | |
| 246 | (expq31): New pattern. | |
| 247 | (modadd): New pattern. | |
| 248 | (mov.dw): New pattern. | |
| 249 | (mov.h): New pattern. | |
| 250 | (mov.w): New pattern. | |
| 251 | (pki16i32): New pattern. | |
| 252 | (pki16ui8): New pattern. | |
| 253 | (pki32i16): New pattern. | |
| 254 | (pki64i32): New pattern. | |
| 255 | (pkq15q31): New pattern. | |
| 256 | (pkq30q31): New pattern. | |
| 257 | (pkq31q15): New pattern. | |
| 258 | (pkui8i16): New pattern. | |
| 259 | (vabs.h): New pattern. | |
| 260 | (vabs.w): New pattern. | |
| 261 | (vadd.dw): New placeholder pattern. | |
| 262 | (vadd.h): New placeholder pattern. | |
| 263 | (vadd.w): New placeholder pattern. | |
| 264 | (vadds.h): New placeholder pattern. | |
| 265 | (vadds.w): New placeholder pattern. | |
| 266 | (vaddsat.h): New placeholder pattern. | |
| 267 | (vaddsat.w): New placeholder pattern. | |
| 268 | (vand): New pattern. | |
| 269 | (vbiq.h): New placeholder pattern. | |
| 270 | (vbswap.dw): New placeholder pattern. | |
| 271 | (vbswap.h): New placeholder pattern. | |
| 272 | (vbswap.w): New placeholder pattern. | |
| 273 | (vcalc.h): New placeholder pattern. | |
| 274 | (vcalc.w): New placeholder pattern. | |
| 275 | (vcmov): New placeholder pattern. | |
| 276 | ||
| 2974be62 AM |
277 | 2014-08-19 Alan Modra <amodra@gmail.com> |
| 278 | ||
| 279 | * configure: Regenerate. | |
| 280 | ||
| faa743bb RM |
281 | 2014-08-15 Roland McGrath <mcgrathr@google.com> |
| 282 | ||
| 283 | * configure: Regenerate. | |
| 284 | * config.in: Regenerate. | |
| 285 | ||
| 1a8a700e MF |
286 | 2014-03-04 Mike Frysinger <vapier@gentoo.org> |
| 287 | ||
| 288 | * configure: Regenerate. | |
| 289 | ||
| bf3d9781 AM |
290 | 2013-09-23 Alan Modra <amodra@gmail.com> |
| 291 | ||
| 292 | * configure: Regenerate. | |
| 293 | ||
| 31e6ad7d MF |
294 | 2013-06-03 Mike Frysinger <vapier@gentoo.org> |
| 295 | ||
| 296 | * aclocal.m4, configure: Regenerate. | |
| 297 | ||
| fd7b2a54 NC |
298 | 2013-05-13 Nick Clifton <nickc@redhat.com> |
| 299 | ||
| 300 | * v850.igen (LDSR): Accept but ignore a selID parameter. | |
| 301 | ||
| d3685d60 TT |
302 | 2013-05-10 Freddie Chopin <freddie_chopin@op.pl> |
| 303 | ||
| 304 | * configure: Rebuild. | |
| 305 | ||
| 67d7515b NC |
306 | 2013-01-28 Nick Clifton <nickc@redhat.com> |
| 307 | ||
| 308 | * simops.c (v850_rotl): New function. | |
| 309 | (v850_bins): New function. | |
| 310 | * simops.h: Add prototypes fir v850_rotl and v850_bins. | |
| 311 | * v850-dc: Add entries for V850e3v5. | |
| 312 | * v850.igen: Add support for v850e3v5. | |
| 313 | (ld.dw, st.dw, rotl, bins): New patterns. | |
| 314 | ||
| 85367826 NC |
315 | 2013-01-10 Nick Clifton <nickc@redhat.com> |
| 316 | ||
| 317 | * interp.c (sim_open): Add support for bfd_arch_v850_rh850 | |
| 318 | architecture type. Add support for bfd_mach_v850e2 and | |
| 319 | bfd_mach_v850e2v3 machine numbers. | |
| 72f4393d L |
320 | * v850.igen (dbtrap): Add support for SIM_OPEN_DEBUG. |
| 321 | (cmpf.d): Correct order of operands. | |
| 322 | (cmpf.s): Likewise. | |
| 323 | (trncf.dul): New pattern. | |
| 324 | (trncf.duw): New pattern. | |
| 325 | (trncf.sul): New pattern. | |
| 326 | (trncf.suw): New pattern. | |
| 327 | * v850-dc: Correct bitfield selection for TRNCF.SW and CVTF.SW. | |
| 85367826 | 328 | |
| d99ff40f NC |
329 | 2012-09-13 Nick Clifton <nickc@redhat.com> |
| 330 | ||
| 331 | * v850.igen (W,WWWW): Correct computation of register number. | |
| 332 | (JR32): Remove unnecessary comma. | |
| 333 | (cmovf.s): Register 0 is an invalid source register. | |
| 334 | (maddf.s): Remove bogus intermediary rounding. | |
| 335 | (nmaddf.s): Likewise. | |
| 336 | (trncf.sl): Remove bogus initial rounding. | |
| 337 | (trncf.dw): Likewise. | |
| 338 | (trncf.sl): Likewise. | |
| 339 | (trncf.sw): Likewise. | |
| 340 | ||
| 5f3ef9d0 JB |
341 | 2012-06-15 Joel Brobecker <brobecker@adacore.com> |
| 342 | ||
| 343 | * config.in, configure: Regenerate. | |
| 344 | ||
| 2aaed979 KB |
345 | 2012-03-28 Rathish C <rathish.c@kpitcummins.com> |
| 346 | ||
| 347 | * sim-main.h (struct _v850_regs): Add new fields mpu0_sregs, | |
| 348 | mpu1_sregs, and fpu_sregs. | |
| 349 | (MPU0_SR, MPU1_SR, FPU_SR): New macros for accessing new fields | |
| 350 | in _v850_regs struct. | |
| 351 | (SP_REGNO): Define. | |
| 352 | (SP): Redefine using SP_REGNO. | |
| 353 | (PSW_REGNO, EIIC, FEIC, DBIC, DIR, EIWR, FEWR, DBWR, BSEL, PSW_NPV) | |
| 354 | (PSW_DMP, PSW_IMP, ECR_EICC, ECR_FECC, FPSR, FPSR_REGNO, FPEPC) | |
| 355 | (FPST, FPST_REGNO, FPCC, FPCFG, FPCFG_REGNO, FPSR_DEM, FPSR_SEM) | |
| 356 | (FPSR_RM, FPSR_RN, FPSR_FS, FPSR_PR, FPSR_XC, FPSR_XCE, FPSR_XCV) | |
| 357 | (FPSR_XCZ, FPSR_XCO, FPSR_XCU, FPSR_XCI, FPSR_XE, FPSR_XEV) | |
| 358 | (FPSR_XEZ, FPSR_XEO, FPSR_XEU, FPSR_XEI, FPSR_XP, FPSR_XPV) | |
| 359 | (FPSR_XPZ, FPSR_XPO, FPSR_XPU, FPSR_XPI, FPST_PR, FPST_XCE) | |
| 360 | (FPST_XCV, FPST_XCZ, FPST_XCO, FPST_XCU, FPST_XCI, FPST_XPV) | |
| 361 | (FPST_XPZ, FPST_XPO, FPST_XPU, FPST_XPI, FPCFG_RM, FPCFG_XEV) | |
| 362 | (FPCFG_XEZ, FPCFG_XEO, FPCFG_XEU, FPCFG_XEI, GET_FPCC, CLEAR_FPCC) | |
| 363 | (SET_FPCC, TEST_FPCC, FPSR_GET_ROUND, MPM, MPC, MPC_REGNO, TID) | |
| 364 | (PPA, PPM, PPC, DCC, DCV0, DCV1, SPAL, SPAU, IPA0L, IPA0U, IPA1L) | |
| 365 | (IPA1U, IPA2L, IPA2U, IPA3L, IPA3U, DPA0L, DPA0U, DPA1L, DPA1U) | |
| 366 | (DPA2L, DPA2U, DPA3L, DPA3U, PPC_PPE, SPAL_SPE, SPAL_SPS, VIP) | |
| 367 | (VMECR, VMTID, VMADR, VPECR, VPTID, VPADR, VDECR, VDTID, MPM_AUE) | |
| 368 | (MPM_MPE, VMECR_VMX, VMECR_VMR, VMECR_VMW, VMECR_VMS, VMECR_VMRMW) | |
| 369 | (VMECR_VMMS, IPA2ADDR, IPA_IPE, IPA_IPX, IPA_IPR, IPE0, IPE1, IPE2) | |
| 370 | (IPE3, IPX0, IPX1, IPX2, IPX3, IPR0, IPR1, IPR2, IPR3, DPA2ADDR) | |
| 371 | (DPA_DPE, DPA_DPR, DPA_DPW, DPE0, DPE1, DPE2, DPE3, DPR0, DPR1) | |
| 372 | (DPR2, DPR3, DPW0, DPW1, DPW2, DPW3, DCC_DCE0, DCC_DCE1, PPA2ADDR) | |
| 373 | (PPC_PPC, PPC_PPE, PPC_PPM): New macros. | |
| 374 | (FPU_COMPARE): New enum. | |
| 375 | (TRACE_FP_INPUT_FPU1, TRACE_FP_INPUT_FPU2, TRACE_FP_INPUT_FPU3) | |
| 376 | (TRACE_FP_INPUT_BOOL1_FPU2, TRACE_FP_INPUT_WORD2) | |
| 377 | (TRACE_FP_RESULT_WORD1, TRACE_FP_RESULT_WORD2): New macros. | |
| 378 | * simops.c (Add32): Update prototype. | |
| 379 | (update_fpsr): New function. | |
| 380 | (SignalException): New function. | |
| 381 | (SignalExceptionFPE): New function. | |
| 382 | (check_invalid_snan): New function. | |
| 383 | (v850_float_compare): New function. | |
| 384 | (v850_div): New function. | |
| 385 | (v850_divu): New function. | |
| 386 | (v850_sar): New function. | |
| 387 | (v850_shl): New function. | |
| 388 | (v850_shr): New function. | |
| 389 | (v850_satadd): New function. | |
| 390 | (v850_satsub): New function. | |
| 391 | (load_data_mem): New function. | |
| 392 | (store_data_mem): New function. | |
| 393 | (mpu_load_mem_test): New function. | |
| 394 | (mpu_store_mem_test): New function. | |
| 395 | * simops.h: Add function prototype for above mentioned functions. | |
| 396 | (check_cvt_fi, check_cvt_if, check_cvt_ff): Define. | |
| 397 | * v850-dc: Add entry for v850e2 and v850e2v3. | |
| 398 | * v850.igen: Add support for v850e2 and v850e2v3. | |
| 399 | ||
| 2232061b MF |
400 | 2012-03-24 Mike Frysinger <vapier@gentoo.org> |
| 401 | ||
| 402 | * aclocal.m4, config.in, configure: Regenerate. | |
| 403 | ||
| db2e4d67 MF |
404 | 2011-12-03 Mike Frysinger <vapier@gentoo.org> |
| 405 | ||
| 406 | * aclocal.m4: New file. | |
| 407 | * configure: Regenerate. | |
| 408 | ||
| 9c082ca8 MF |
409 | 2011-10-17 Mike Frysinger <vapier@gentoo.org> |
| 410 | ||
| 411 | * configure.ac: Change include to common/acinclude.m4. | |
| 412 | ||
| 6ffe910a MF |
413 | 2011-10-17 Mike Frysinger <vapier@gentoo.org> |
| 414 | ||
| 415 | * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER | |
| 416 | call. Replace common.m4 include with SIM_AC_COMMON. | |
| 417 | * configure: Regenerate. | |
| 418 | ||
| 2419798b MF |
419 | 2011-07-05 Mike Frysinger <vapier@gentoo.org> |
| 420 | ||
| 421 | * interp.c (sim_do_command): Delete. | |
| 422 | ||
| d0f0baa2 KB |
423 | 2011-03-21 Kevin Buettner <kevinb@redhat.com> |
| 424 | ||
| 425 | * simops (OP_10007E0): Update errno handling as most traps | |
| 426 | do not invoke the host's functionality directly. Invoke | |
| 427 | sim_io_stat() instead of stat() for implementing TARGET_SYS_stat. | |
| 428 | Implement TARGET_SYS_fstat, TARGET_SYS_rename, and TARGET_SYS_unlink. | |
| 429 | ||
| d79fe0d6 MF |
430 | 2011-02-14 Mike Frysinger <vapier@gentoo.org> |
| 431 | ||
| 432 | * simops.c (OP_10007E0): Change zfree to free. | |
| 433 | ||
| dae477fe AB |
434 | 2011-01-11 Andrew Burgess <aburgess@broadcom.com> |
| 435 | ||
| 436 | * interp.c (sim_store_register): Update return value to | |
| 437 | match new API. | |
| 438 | ||
| 4e9586f0 MF |
439 | 2010-03-30 Mike Frysinger <vapier@gentoo.org> |
| 440 | ||
| 441 | * interp.c (interrupt_names): Add const to pointer type. | |
| 442 | (do_interrupt): Add const to interrupt_name. | |
| 443 | ||
| 3725885a RW |
444 | 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de> |
| 445 | ||
| 446 | * configure: Regenerate. | |
| 447 | ||
| d6416cdc RW |
448 | 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de> |
| 449 | ||
| 81ecdfbb RW |
450 | * config.in: Regenerate. |
| 451 | * configure: Likewise. | |
| 452 | ||
| d6416cdc RW |
453 | * configure: Regenerate. |
| 454 | ||
| b5bd9624 HPN |
455 | 2008-07-11 Hans-Peter Nilsson <hp@axis.com> |
| 456 | ||
| 457 | * configure: Regenerate to track ../common/common.m4 changes. | |
| 458 | * config.in: Ditto. | |
| 459 | ||
| 6efef468 | 460 | 2008-06-06 Vladimir Prus <vladimir@codesourcery.com> |
| 72f4393d L |
461 | Daniel Jacobowitz <dan@codesourcery.com> |
| 462 | Joseph Myers <joseph@codesourcery.com> | |
| 6efef468 JM |
463 | |
| 464 | * configure: Regenerate. | |
| 465 | ||
| c5fbc25b DD |
466 | 2008-02-05 DJ Delorie <dj@redhat.com> |
| 467 | ||
| 98e460c3 DD |
468 | * simops.c (OP_1C007E0): Compensate for 64 bit hosts. |
| 469 | (OP_18007E0): Likewise. | |
| 470 | (OP_2C007E0): Likewise. | |
| 471 | (OP_28007E0): Likewise. | |
| 472 | * v850.igen (divh): Likewise. | |
| 72f4393d | 473 | |
| c5fbc25b DD |
474 | * simops.c (OP_C0): Correct saturation logic. |
| 475 | (OP_220): Likewise. | |
| 476 | (OP_A0): Likewise. | |
| 477 | (OP_660): Likewise. | |
| 478 | (OP_80): Likewise. | |
| 479 | ||
| 480 | * simops.c (OP_2A0): If the shift count is zero, clear the | |
| 481 | carry. | |
| 482 | (OP_A007E0): Likewise. | |
| 483 | (OP_2C0): Likewise. | |
| 484 | (OP_C007E0): Likewise. | |
| 485 | (OP_280): Likewise. | |
| 486 | (OP_8007E0): Likewise. | |
| 487 | ||
| 488 | * simops.c (OP_2C207E0): Correct PSW flags for special divu | |
| 489 | conditions. | |
| 490 | (OP_2C007E0): Likewise, for div. | |
| 491 | (OP_28207E0): Likewise, for divhu. | |
| 492 | (OP_28007E0): Likewise, for divh. Also, sign-extend the correct | |
| 493 | operand. | |
| 494 | * v850.igen (divh): Likewise, for 2-op divh. | |
| 72f4393d | 495 | |
| c5fbc25b DD |
496 | * v850.igen (bsh): Fix carry logic. |
| 497 | ||
| cb5c8c39 DJ |
498 | 2007-02-20 Daniel Jacobowitz <dan@codesourcery.com> |
| 499 | ||
| 500 | * Makefile.in (interp.o): Uncomment and update. | |
| 501 | ||
| edc5d9ec HPN |
502 | 2006-12-21 Hans-Peter Nilsson <hp@axis.com> |
| 503 | ||
| 504 | * acconfig.h: Remove. | |
| 505 | * config.in: Regenerate. | |
| 506 | ||
| e85e3205 RE |
507 | 2006-06-13 Richard Earnshaw <rearnsha@arm.com> |
| 508 | ||
| 509 | * configure: Regenerated. | |
| 510 | ||
| 2f0122dc DJ |
511 | 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com> |
| 512 | ||
| 513 | * configure: Regenerated. | |
| 514 | ||
| 20e95c23 DJ |
515 | 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com> |
| 516 | ||
| 517 | * configure: Regenerated. | |
| 518 | ||
| 2b193c4a MK |
519 | 2005-03-23 Mark Kettenis <kettenis@gnu.org> |
| 520 | ||
| 521 | * configure: Regenerate. | |
| 522 | ||
| 35695fd6 AC |
523 | 2005-01-14 Andrew Cagney <cagney@gnu.org> |
| 524 | ||
| 525 | * configure.ac: Sinclude aclocal.m4 before common.m4. Add | |
| 526 | explicit call to AC_CONFIG_HEADER. | |
| 527 | * configure: Regenerate. | |
| 528 | ||
| f0569246 AC |
529 | 2005-01-12 Andrew Cagney <cagney@gnu.org> |
| 530 | ||
| 531 | * configure.ac: Update to use ../common/common.m4. | |
| 532 | * configure: Re-generate. | |
| 533 | ||
| 38f48d72 AC |
534 | 2005-01-11 Andrew Cagney <cagney@localhost.localdomain> |
| 535 | ||
| 536 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 537 | ||
| b7026657 AC |
538 | 2005-01-07 Andrew Cagney <cagney@gnu.org> |
| 539 | ||
| 540 | * configure.ac: Rename configure.in, require autoconf 2.59. | |
| 541 | * configure: Re-generate. | |
| 542 | ||
| 379832de HPN |
543 | 2004-12-08 Hans-Peter Nilsson <hp@axis.com> |
| 544 | ||
| 545 | * configure: Regenerate for ../common/aclocal.m4 update. | |
| 546 | ||
| 4389ce38 MK |
547 | 2004-01-18 Mark Kettenis <kettenis@gnu.org> |
| 548 | ||
| 549 | * simops.c: Include <sys/types.h>. | |
| 550 | ||
| c5ea1d53 NC |
551 | 2003-09-05 Andrew Cagney <cagney@redhat.com> |
| 552 | Nick Clifton <nickc@redhat.com> | |
| 553 | ||
| 554 | * interp.c (sim_open): Accept bfd_mach_v850e1. | |
| 555 | * v850-dc: Add entry for v850e1. | |
| 556 | * v850.igen: Add support for v850e1. | |
| 557 | Add code for DBTRAP and DBRET instructions. | |
| 558 | (dbtrap): Create a separate v850e1 specific instruction. | |
| 559 | Only generate a trap if the target is not the v850e1. | |
| 560 | Otherwise treat it as a special kind of branch. | |
| 561 | (break): Mark as v850/v850e specific. | |
| 72f4393d | 562 | |
| ae451ac6 ILT |
563 | 2003-05-16 Ian Lance Taylor <ian@airs.com> |
| 564 | ||
| 565 | * Makefile.in (SHELL): Make sure this is defined. | |
| 566 | (tmp-igen): Use $(SHELL) whenever we invoke move-if-change. | |
| 567 | ||
| ebc115b7 NC |
568 | 2003-04-06 Nick Clifton <nickc@redhat.com> |
| 569 | ||
| 1eec9e33 NC |
570 | * simops.c (OP_40): Delete. Move code to... |
| 571 | * v850-igen.c (): ...Here. Sign extend the first operand. | |
| ebc115b7 NC |
572 | * simops.h (OP_40): Remove prototype. |
| 573 | ||
| 6b4a8935 AC |
574 | 2003-02-27 Andrew Cagney <cagney@redhat.com> |
| 575 | ||
| 576 | * interp.c (sim_open, sim_create_inferior): Rename _bfd to bfd. | |
| 577 | ||
| 0da2b665 AC |
578 | 2002-11-30 Andrew Cagney <cagney@redhat.com> |
| 579 | ||
| 580 | * simops.c: Use int, 1, 0 instead of boolean, true and false. | |
| 581 | * sim-main.h: Ditto. | |
| 582 | ||
| 30458d39 JW |
583 | 2002-09-27 Jim Wilson <wilson@redhat.com> |
| 584 | ||
| 585 | * simops.c (OP_E6077E0): And op1 with 7 after reading register, not | |
| 586 | before. | |
| 587 | (BIT_CHANGE_OP): Likewise. | |
| 588 | ||
| 2e8162ce JW |
589 | 2002-09-26 Jim Wilson <wilson@redhat.com> |
| 590 | ||
| 591 | * simops (OP_10007E0): Don't subtract 4 from PC. | |
| 592 | ||
| 5d6a173d NC |
593 | 2002-09-19 Nick Clifton <nickc@redhat.com> |
| 594 | ||
| 595 | * interp.c (sim_open): Remove reference to v850ea. | |
| 596 | (sim_create_inferior): Likewise. | |
| 597 | * v850-dc: Likewise. | |
| 598 | * v850.igen: Remove all references to v850ea, including v850ea | |
| 599 | specific instructions. | |
| 600 | ||
| e551c257 NC |
601 | 2002-08-29 Nick Clifton <nickc@redhat.com> |
| 602 | ||
| 603 | From 2001-08-23 Catherine Moore <clm@redhat.com> | |
| 604 | ||
| 605 | * Makefile.in: Add gen-zero-r0 option. | |
| 606 | * sim-main.h (GPR_SET, GPR_CLEAR): Define. | |
| 607 | * simops.c (OP_24007E0): Sign extend the imm9 | |
| 608 | operand of a mul instruction. | |
| 609 | ||
| d62274a3 AC |
610 | 2002-06-17 Andrew Cagney <cagney@redhat.com> |
| 611 | ||
| 612 | * simops.c (trace_result): Fix printf formatting. | |
| 613 | ||
| c8cca39f AC |
614 | 2002-06-16 Andrew Cagney <ac131313@redhat.com> |
| 615 | ||
| 616 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 617 | ||
| 7ef2d4e7 AC |
618 | 2001-12-02 Andrew Cagney <ac131313@redhat.com> |
| 619 | ||
| 620 | * Makefile.in (simops.h, table.c): Delete targets. | |
| 621 | (tmp-gencode, gencode.o, gencode): Delete targets. | |
| 622 | (simops.h): New file. | |
| 623 | ($(BUILT_SRC_FROM_IGEN)): Do not depend on simops.h. | |
| 624 | * gencode.c: Delete file. | |
| 72f4393d | 625 | |
| d4424ada C |
626 | 2001-04-15 J.T. Conklin <jtc@redback.com> |
| 627 | ||
| 628 | * Makefile.in (simops.o): Add simops.h to dependency list. | |
| 629 | ||
| 1e6cd159 AC |
630 | 2001-03-14 Andrew Cagney <ac131313@redhat.com> |
| 631 | ||
| 632 | * Makefile.in (gencode): Link with libintl. | |
| 633 | ||
| 42acc51e JL |
634 | 2001-01-31 Jonathan Larmour <jlarmour@redhat.com> |
| 635 | ||
| 636 | * Makefile.in (gencode): Link with libopcodes in build tree rather | |
| 637 | than building source files from there. | |
| 638 | ||
| 896ad910 NC |
639 | 2000-05-30 Nick Clifton <nickc@cygnus.com> |
| 640 | ||
| 641 | * v850.igen: Remove illegal instruction pattern, since it is the | |
| 642 | same as the breakpoint pattern. | |
| 643 | ||
| eb2d80b4 AC |
644 | Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com> |
| 645 | ||
| 646 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 647 | ||
| b9791fcd FCE |
648 | 2000-04-14 Gary Thomas <gthomas@redhat.com> |
| 649 | ||
| 650 | * v850.igen: Define 'br *' as illegal since this is the only | |
| 651 | way to provide a breakpoint on some v850 family processors. | |
| 652 | ||
| de616bc7 FCE |
653 | 2000-03-24 Frank Ch. Eigler <fche@redhat.com> |
| 654 | ||
| 655 | * v850.igen (ilgop): New insn pattern for four-byte breakpoints. | |
| 656 | ||
| d4f3574e SS |
657 | Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com> |
| 658 | ||
| 659 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 660 | ||
| cd0fc7c3 SS |
661 | 1999-05-08 Felix Lee <flee@cygnus.com> |
| 662 | ||
| 663 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 72f4393d | 664 | |
| c906108c SS |
665 | Tue Dec 1 17:25:16 1998 Andrew Cagney <cagney@b1.cygnus.com> |
| 666 | ||
| 667 | * Makefile.in (NL_TARGET): Define as -DNL_TARGET_v850. | |
| 668 | ||
| 669 | Wed Nov 25 17:52:58 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
| 670 | ||
| 671 | * Makefile.in (simops.o): Depends on targ-vals.h | |
| 672 | * simops.c: Include targ-vals.h instead of | |
| 673 | libgloss/.../syscall.h. Replace SYS_* with TARGET_SYS_*. | |
| 674 | (divn, divun, OP_1C007E0, OP_18207E0, OP_1C207E0,OP_18007E0): | |
| 675 | Replace signed long int with signed32. | |
| 676 | ||
| 677 | Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com> | |
| 678 | ||
| 679 | * interp.c: #include "itable.h". | |
| 680 | (get_insn_name): New function. | |
| 681 | (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS. | |
| 682 | * sim-main.h (MAX_INSNS,INSN_NAME): Delete. | |
| 683 | ||
| 684 | Wed May 6 19:43:27 1998 Doug Evans <devans@canuck.cygnus.com> | |
| 685 | ||
| 686 | * sim-main.h (INSN_NAME): New arg `cpu'. | |
| 687 | ||
| 688 | Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com> | |
| 689 | ||
| 72f4393d | 690 | * configure: Regenerated to track ../common/aclocal.m4 changes. |
| c906108c SS |
691 | |
| 692 | Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche> | |
| 693 | ||
| 694 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 695 | * config.in: Ditto. | |
| 696 | ||
| 697 | Sun Apr 26 15:19:14 1998 Tom Tromey <tromey@cygnus.com> | |
| 698 | ||
| 699 | * acconfig.h: New file. | |
| 700 | * configure.in: Reverted change of Apr 24; use sinclude again. | |
| 701 | ||
| 702 | Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche> | |
| 703 | ||
| 704 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 705 | * config.in: Ditto. | |
| 706 | ||
| 707 | Fri Apr 24 11:18:08 1998 Tom Tromey <tromey@cygnus.com> | |
| 708 | ||
| 709 | * configure.in: Don't call sinclude. | |
| 710 | ||
| 711 | Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
| 712 | ||
| 713 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 714 | * sim-main.h (SIM_MAIN_H): Wrap header. | |
| 715 | ||
| 716 | Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
| 717 | ||
| 718 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 719 | ||
| 720 | Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
| 721 | ||
| 722 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 723 | ||
| 724 | Tue Mar 10 15:54:50 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
| 725 | ||
| 726 | * interp.c (sim_stop): Delete, second attempt. | |
| 727 | ||
| 728 | Thu Feb 26 19:09:47 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
| 729 | ||
| 730 | * interp.c (sim_info): Delete. | |
| 731 | ||
| 732 | Wed Feb 18 10:47:32 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
| 733 | ||
| 734 | * sim-main.h (TRACE_ALU_INPUT*): Delete. Moved to sim-trace.[hc]. | |
| 735 | ||
| 736 | * simops.c (trace_result): Call trace_generic instead of | |
| 737 | trace_one_insn. | |
| 738 | (trace_module): Change variable type to integer. | |
| 739 | (trace_input): Initialize trace_module with TRACE_ALU_IDX. | |
| 740 | ||
| 741 | * sim-main.h (trace_module): Change variable decl to integer type. | |
| 742 | (TRACE_BRANCH*, TRACE_LD, TRACE_ST): Update. | |
| 72f4393d | 743 | |
| c906108c SS |
744 | Tue Feb 17 12:51:18 1998 Andrew Cagney <cagney@b1.cygnus.com> |
| 745 | ||
| 746 | * interp.c (sim_store_register, sim_fetch_register): Pass in | |
| 747 | length parameter. Return -1. | |
| 748 | ||
| 749 | Tue Feb 3 16:24:42 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
| 750 | ||
| 751 | * sim-main.h (IMEM16, IMEM16_IMMED): Rename IMEM and | |
| 752 | IMEM_IMMED. To match recent igen change. | |
| 753 | ||
| 754 | Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
| 755 | ||
| 756 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 757 | ||
| 758 | Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
| 759 | ||
| 760 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 761 | ||
| 762 | Fri Jan 30 09:51:27 1998 Andrew Cagney <cagney@b1.cygnus.com> | |
| 763 | ||
| 764 | * sim-main.h (CPU_CIA): Delete, replaced by. | |
| 765 | (CIA_SET, CIA_SET): Define. | |
| 766 | ||
| 767 | Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba> | |
| 768 | ||
| 769 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 770 | ||
| 771 | Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 772 | ||
| 773 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 774 | * config.in: Ditto. | |
| 775 | ||
| 776 | Fri Dec 5 09:26:08 1997 Nick Clifton <nickc@cygnus.com> | |
| 777 | ||
| 778 | * v850.igen: Revert break value back to its old value. | |
| 779 | ||
| 780 | Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com> | |
| 781 | ||
| 782 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 783 | ||
| 784 | Wed Dec 3 17:27:19 1997 Nick Clifton <nickc@cygnus.com> | |
| 785 | ||
| 786 | * v850.igen: Make break have a zero first field, since otherwise | |
| 787 | it clashes with the DIVH instruction. | |
| 788 | ||
| 789 | Sat Nov 22 21:32:07 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 790 | ||
| 791 | * simops.c (OP_10007E0): Rename SIGABRT -> SIM_SIGABRT. Give | |
| 792 | sim_stopped instead of sim_signalled. | |
| 793 | ||
| 794 | * v850.igen (BREAK), simops.c (OP_12007E0): Rename SIGTRAP to | |
| 795 | SIM_SIGTRAP. | |
| 796 | (illegal): Rename SIGILL to SIM_SIGILL. | |
| 72f4393d | 797 | |
| c906108c SS |
798 | * sim-main.h, simops.c, interp.c: Do not include signal.h. |
| 799 | ||
| 800 | * sim-main.h: Include sim-signal.h instead of signal.h. | |
| 801 | (SIGTRAP, SIGQUIT): Delete definition. | |
| 802 | (SIG_V850_EXIT): Delete definition. | |
| 803 | ||
| 804 | Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com> | |
| 805 | ||
| 806 | * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS). | |
| 807 | ||
| 808 | Fri Oct 31 10:33:40 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 809 | ||
| 810 | * interp.c (sim_open): Check state magic number. | |
| 811 | (sim-assert.h): Include. | |
| 812 | ||
| 813 | Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 814 | ||
| 815 | * v850.igen: Add model filter field to records. | |
| 816 | ||
| 817 | Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 818 | ||
| 819 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 820 | ||
| 821 | Fri Sep 26 11:56:02 1997 Felix Lee <flee@cygnus.com> | |
| 822 | ||
| 823 | * sim-main.h: delete null override of SIM_ENGINE_HALT_HOOK and | |
| 824 | SIM_ENGINE_RESTART_HOOK. | |
| 72f4393d | 825 | |
| c906108c SS |
826 | Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com> |
| 827 | ||
| 828 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 829 | ||
| 830 | Wed Sep 24 17:28:26 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 831 | ||
| 832 | * sim-main.h (WITH_TARGET_WORD_MSB): Delete. | |
| 833 | ||
| 834 | * configure.in (SIM_AC_OPTION_BITSIZE): Specify 32 bit | |
| 835 | architecture with MSB == 31. | |
| 836 | ||
| 837 | Wed Sep 24 14:04:20 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 838 | ||
| 839 | * v850.igen: Make divh insn with RRRRR==0 breakpoint. | |
| 840 | ||
| 841 | Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 842 | ||
| 843 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 844 | ||
| 845 | Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 846 | ||
| 847 | * Makefile.in (SIM_WARNINGS, SIM_ALIGNMENT, SIM_ENDIAN, | |
| 848 | SIM_HOSTENDIAN, SIM_RESERVED_BITS): Delete, moved to common. | |
| 849 | (SIM_EXTRA_CFLAGS): Update. | |
| 72f4393d | 850 | |
| c906108c SS |
851 | Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com> |
| 852 | ||
| 853 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 854 | * configure.in: Really specify NONSTRICT_ALIGNMENT as the default. | |
| 855 | ||
| 856 | Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 857 | ||
| 858 | * configure.in: Specify NONSTRICT_ALIGNMENT as the default. | |
| 859 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 860 | ||
| 861 | Fri Sep 19 10:37:20 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 862 | ||
| 863 | * v850.igen (disp16): Use EXTEND16 to sign extend disp. | |
| 864 | (disp22): Only shift left by 1, not 2. | |
| 865 | ("jmp"): Ensure PC is 2 byte aligned. | |
| 866 | ||
| 867 | * simops.c, v850.igen: Move "Bcond", "jr", "jarl" code to | |
| 868 | v850.igen. Fix tracing. | |
| 869 | ||
| 870 | * simops.c (OP_300, OP_400, OP_500): Move "sdl.b", "sld.h", | |
| 871 | "sld.w" insns to v850.igen. Fix tracing. | |
| 872 | (OP_70): Ditto for "sld.hu". | |
| 873 | ||
| 874 | * v850.igen: Clarify tracing of "sld.b", "sld.h" et.al. | |
| 875 | ||
| 876 | * simops.c (condition_met): Make global. | |
| 877 | ||
| 878 | * sim-main.h (TRACE_ALU_INPUT3, TRACE_BRANCH0, TRACE_LD, | |
| 879 | TRACE_ST): Define. | |
| 880 | (TRACE_LD_NAME): Define. | |
| 881 | ||
| 882 | * simops.c: Move "cmov", "cmov imm" to v850.igen, fix. | |
| 883 | ||
| 884 | Wed Sep 17 16:21:08 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 885 | ||
| 886 | * simops.c: Move "mov", "reti", to v850.igen, fix tracing. | |
| 72f4393d | 887 | |
| c906108c SS |
888 | * interp.c (hash): Delete. |
| 889 | ||
| 890 | * v850.igen (nop): Really do nothing. | |
| 891 | ||
| 892 | * interp.c (do_interrupt): Mask interrupts after PSW is saved, not | |
| 893 | before. | |
| 894 | * v850.igen (reti): Return to current PC not previous. | |
| 895 | ||
| 896 | Wed Sep 17 14:02:10 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 897 | ||
| 898 | * simops.c: Move "ctret", "bsw", "hsw" to v850.igen, fix tracing. | |
| 899 | (trace_module): Global, save component/module name across insn. | |
| 900 | ||
| 901 | * simops.c: Move "bsh" to v850.igen, fix. | |
| 72f4393d | 902 | |
| c906108c SS |
903 | * v850.igen (callt): Load correct number of bytes. Fix tracing. |
| 904 | (stsr, ldsr): Correct src, dest fields. Fix tracing. | |
| 905 | (ctret): Force alignment. Fix tracing. | |
| 72f4393d | 906 | |
| c906108c SS |
907 | Tue Sep 16 22:14:01 1997 Andrew Cagney <cagney@b1.cygnus.com> |
| 908 | ||
| 909 | * simops.c (trace_output): Add result argument. | |
| 910 | (trace_result): New function. Simpler version of trace_output, | |
| 911 | assumes trace needed. | |
| 912 | (trace_output): Call trace_result. | |
| 913 | (trace_output): For IMM_REG_REG, trace correct register. | |
| 914 | (trace_input): Add case for 16bit immediates. | |
| 915 | (OP_600, OP_640, OP_680, OP_6C0, OP_6A0): Use. | |
| 916 | ||
| 917 | * sim-main.h (TRACE_ALU_INPUT, TRACE_ALU_RESULT): Define. | |
| 918 | (trace_values, trace_name, trace_pc, trace_num_values): Make | |
| 919 | global. | |
| 920 | (GR, SR): Define. | |
| 72f4393d | 921 | |
| c906108c SS |
922 | v850.insn (movea, stsr): Use. |
| 923 | (sxb, sxh, zxb, zxh): Ditto. | |
| 72f4393d | 924 | |
| c906108c SS |
925 | Tue Sep 16 21:14:01 1997 Andrew Cagney <cagney@b1.cygnus.com> |
| 926 | ||
| 927 | * simops.c: Move "movea" from here. | |
| 928 | * v850.igen: To here. | |
| 929 | ||
| 930 | * v850.igen (simm16): Define, sign extend imm16. | |
| 931 | (uimm16): Define, no sign extension. | |
| 932 | (addi, andi, movea, movhi, mulhi, ori, satsubi, xori): Use. | |
| 72f4393d | 933 | |
| c906108c SS |
934 | * simops.c: Move "sxh", "switch", "sxb", "callt", "dispose", |
| 935 | "mov32" from here. | |
| 936 | * v850.igen: To here. | |
| 937 | (switch): Fix off by two error in NIA calc. | |
| 72f4393d | 938 | |
| c906108c SS |
939 | Tue Sep 16 15:14:01 1997 Andrew Cagney <cagney@b1.cygnus.com> |
| 940 | ||
| 941 | * simops.c (trace_pc, trace_name, trace_values, trace_num_values): | |
| 942 | New static globals. | |
| 943 | (trace_input): Just save pc, name and values for trace_output. | |
| 944 | (trace_output): Write trace values to a buffer. Use | |
| 945 | trace_one_insn to print trace info and buffer. | |
| 946 | (SIZE_OPERANDS, SIZE_LOCATION): Delete. | |
| 72f4393d | 947 | |
| c906108c SS |
948 | Tue Sep 16 09:02:00 1997 Andrew Cagney <cagney@b1.cygnus.com> |
| 949 | ||
| 950 | * sim-main.h (struct _sim_cpu): Add psw_mask so that reserved bits | |
| 951 | can be masked out. | |
| 952 | ||
| 953 | * simops.c (OP_2007E0, OP_4007E0): Move "ldsr", "stsr" | |
| 954 | instructions from here. | |
| 955 | * v850.igen (ldsr, stsr): To here. Mask out reserved bits when | |
| 956 | setting PSW. | |
| 72f4393d | 957 | |
| c906108c SS |
958 | * interp.c (sim_open): Set psw_mask if machine known. |
| 959 | ||
| 960 | Tue Sep 16 10:20:00 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 961 | ||
| 962 | * v850-dc: Add rule to diferentiate between breakpoint and divh. | |
| 963 | * v850.igen (break): New instruction, breakpoint simulator. | |
| 964 | * v850.igen (breakpoint): Enable. Change to a 32bit instruction. | |
| 965 | ||
| 966 | Mon Sep 15 18:44:05 1997 Jim Wilson <wilson@cygnus.com> | |
| 967 | ||
| 968 | * simops.c (Multiply64): Don't store into register zero. | |
| 969 | ||
| 970 | Tue Sep 16 09:02:00 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 971 | ||
| 972 | * Makefile.in (semantics.o): Add dependency. | |
| 973 | ||
| 974 | * sim-main.h (SAVE_1, SAVE_2): Perform backward compatible save, | |
| 975 | do not adjust CIA/NIA. | |
| 976 | ||
| 977 | Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 978 | ||
| 979 | * simops.c (OP_300, OP_400, OP_70): Make behavour depend on PSW[US]. | |
| 72f4393d | 980 | |
| c906108c SS |
981 | * simops.c: Move "divun", "sld.bu", "divhn", "divhun", "divn", |
| 982 | "divun", "pushml" code from here to v850.igen. | |
| 983 | (divun): Make global. | |
| 984 | (type3_regs): Make global | |
| 72f4393d | 985 | |
| c906108c SS |
986 | * v850.igen: Move simops.c code to here. |
| 987 | ||
| 988 | * interp.c (sim_create_inferior): For v850eq set US bit by | |
| 989 | default. | |
| 990 | ||
| 991 | * interp.c (sim_open): Don't set arch, now set by | |
| 992 | sim_analyze_program. | |
| 993 | ||
| 994 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 995 | ||
| 996 | Mon Sep 15 14:39:34 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 997 | ||
| 998 | * simops.c (op_types): Move from here. | |
| 999 | sim-main.h: To here. | |
| 1000 | ||
| 1001 | * sim-main.h (trace_input, trace_output), simops.c: Make global. | |
| 1002 | ||
| 1003 | * simops.c (OP_60): Move "jmp" code from here. | |
| 1004 | * v850.igen (jmp): To here. | |
| 1005 | ||
| 1006 | * simops.c (OP_60): Move "sld.bu" code from here. | |
| 1007 | * v850.igen (sld.bu): To here. | |
| 1008 | ||
| 1009 | Fri Sep 12 15:11:03 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 1010 | ||
| 1011 | * v850.igen (prepare, ...): Add to v850eq architecture. | |
| 1012 | ||
| 1013 | * interp.c (sim_open): Default to v850eq. | |
| 72f4393d | 1014 | |
| c906108c SS |
1015 | * interp.c (sim_open): Default to v850e. |
| 1016 | * sim-main.h (signal.h): Include. | |
| 1017 | ||
| 1018 | * v850.igen (illegal): Report/halt illegal instructions. | |
| 1019 | ||
| 1020 | * Makefile.in (SIM_EXTRA_CFLAGS): Add SIM_RESERVED_BITS. | |
| 1021 | ||
| 1022 | * configure.in: Add reserved bits option. | |
| 1023 | * configure: Regenerate. | |
| 1024 | ||
| 1025 | Thu Sep 11 08:40:03 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 1026 | ||
| 1027 | * interp.c (sim_open): Use sim_do_commandf instead of asprintf. | |
| 1028 | ||
| 72f4393d | 1029 | * sim-main.h (INSN_NAME): |
| c906108c SS |
1030 | |
| 1031 | * Makefile.in (INCLUDE): Add SIM_EXTRA_DEPS. | |
| 1032 | (SIM_EXTRA_DEPS): Add itable.h | |
| 1033 | (tmp-gencode): Does not depend on simops.h | |
| 1034 | ||
| 1035 | * sim-main.h (itable.h): Include. | |
| 1036 | (MAX_INSNS, INSN_NAME): Define. | |
| 1037 | ||
| 1038 | * interp.c: Compute inttype from the interrupt_names index that | |
| 1039 | was passed in. | |
| 1040 | ||
| 1041 | Wed Sep 10 10:25:40 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 1042 | ||
| 1043 | * simops.c (trace_input): Use trace_printf instead of | |
| 1044 | sim_io_printf. | |
| 1045 | (trace_output): Ditto. | |
| 1046 | (trace_input): Only trace when TRACE_ALU_P. Delete code | |
| 1047 | disasembling instruction. | |
| 1048 | (trace_output): Only trace when TRACE_ALU_P. | |
| 1049 | ||
| 1050 | Tue Sep 9 01:29:50 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 1051 | ||
| 1052 | * simops.c (trace_input, trace_output): Use sim_io_printf. | |
| 1053 | (OP_620): Pass correct argument to trace. | |
| 1054 | (OP_E607E0): Ditto. | |
| 1055 | (trace_input): Obtain prog_bfd, text_start et.al from simulator | |
| 1056 | struct. | |
| 1057 | ||
| 1058 | Mon Sep 8 21:03:52 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 1059 | ||
| 1060 | * v850.igen: New file. | |
| 1061 | * v850-dc: New file. | |
| 1062 | ||
| 1063 | Mon Sep 8 18:33:04 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 1064 | ||
| 1065 | ||
| 1066 | * sim-main.h (SEXT16): Delete, use EXTEND16. | |
| 1067 | (SEXT8): Delete, use EXTEND8. | |
| 1068 | (SEXT32): Delete, used? | |
| 1069 | (SEXT40, SEXT44, SEXT64): Use UNSIGNED64 for constants, not ...LL. | |
| 1070 | (WITH_TARGET_WORD_MSB): Define as 31. v850 little bit endian. | |
| 72f4393d | 1071 | |
| c906108c SS |
1072 | * simops.c: Use EXTEND15 from sim-bits instead of SEXT16. |
| 1073 | ||
| 1074 | * sim-main.h (DEBUG_TRACE, DEBUG_VALUES, v850_debug): Delete, | |
| 1075 | replace with TRACE_INSN_P and TRACE_ALU_P. | |
| 1076 | ||
| 1077 | * simops.c (trace_input, trace_output): Update. | |
| 1078 | ||
| 1079 | * interp.c (sim_engine_run): Delete. | |
| 1080 | (lookup_hash): Delete. | |
| 1081 | (sim_open): Do not fill hash table. | |
| 1082 | (sim_trace): Delete. | |
| 1083 | ||
| 1084 | Fri Sep 5 17:04:48 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 1085 | ||
| 1086 | * simops.c (OP_FFFF): Use sim_engine_halt. | |
| 1087 | (OP_12007E0): Ditto. | |
| 1088 | (OP_10007E0): Ditto. | |
| 1089 | ||
| 1090 | * sim-main.h (struct sim_cpu): Delete member exception. Using | |
| 1091 | sim-engine et.al. | |
| 1092 | ||
| 1093 | * interp.c (sim_info): Do not do anything in sim-info. | |
| 1094 | (sim_stop): Delete, replace with sim-stop. | |
| 1095 | (sim_stop_reason): Delete, replace with sim-reason. | |
| 1096 | ||
| 1097 | * sim-main.h (WITH_WATCHPOINTS): Define. | |
| 1098 | (WITH_MODULO_MEMORY): Define | |
| 72f4393d | 1099 | |
| c906108c SS |
1100 | * Makefile.in (SIM_OBJS): Add sim-resume, sim-watch, sim-stop, |
| 1101 | sim-reason. | |
| 1102 | ||
| 1103 | * interp.c (enum interrupt_cond_type): Delete. | |
| 1104 | (struct interrupt_generator): Delete. | |
| 1105 | (enum interrupt_type): Drop int_none. | |
| 1106 | (sim_open): Initialize WATCHPOINT module. | |
| 1107 | (sim_resume, sim_run): Rename sim_resume to sim_run. | |
| 1108 | (sim_engine_run): Replace interrupt code with call to sim-events. | |
| 1109 | (sim_set_interrupt): Delete. | |
| 1110 | (sim_parse_number): Delete. | |
| 1111 | ||
| 1112 | Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba> | |
| 1113 | ||
| 1114 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 1115 | ||
| 1116 | Thu Sep 4 18:11:37 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 1117 | ||
| 1118 | * simops.c (fetch_argv): New function, fetch a arg vector from | |
| 1119 | simulator memory. | |
| 1120 | ||
| 1121 | * configure.in: Check for fork, execve, execv. | |
| 1122 | * configure: Regenerate. | |
| 1123 | ||
| 1124 | * interp.c (sim_store_register, sim_fetch_register): Use H2T_4 and | |
| 1125 | T2H_4 for byte swapping. | |
| 1126 | ||
| 1127 | * sim-main.h, interp.c (get_word, get_half, get_byte, put_word, | |
| 1128 | put_half, put_byte): Delete. | |
| 1129 | ||
| 1130 | * Makefile.in (SIM_OBJS): Add sim-memopt.o module. | |
| 1131 | ||
| 1132 | * sim-main.h (load_mem, store_mem): Redefine as macros. | |
| 1133 | (IMEM, IMEM_IMMED): New macros - fetch instructions. | |
| 1134 | ||
| 1135 | * simops.c (OP_10007E0): For SYS_read, SYS_write, SYS_open | |
| 1136 | transfer data via a buffer. | |
| 1137 | (fetch_str): New function, fetch string from memory. | |
| 1138 | ||
| 1139 | * Makefile.in (SIM_OBJS): Add sim-hrw.o module. | |
| 1140 | ||
| 1141 | * interp.c (sim_open): Establish memory maps using sim-memopt.c | |
| 1142 | via sim_do_command. | |
| 1143 | (sim_do_command): Print error if memory-map command is used. Call | |
| 1144 | sim_args_command. | |
| 1145 | (map): Delete, replaced by sim-core. | |
| 1146 | (sim_memory_init): Delete, replaced by sim-core. | |
| 1147 | (sim_set_memory_map): Delete, replaced by sim-memopt. | |
| 1148 | (load_mem): Delete, replaced by sim-core. | |
| 1149 | (store_mem): Delete, replaced by sim-core. | |
| 1150 | (sim_write): Delete, replaced by sim-hrw. | |
| 1151 | (sim_read): Delete, replaced by sim-hrw. | |
| 1152 | ||
| 1153 | * sim-main.h (struct sim_state): Remove memory members, using | |
| 1154 | sim-core.c | |
| 1155 | ||
| 1156 | Wed Sep 3 10:18:55 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 1157 | ||
| 1158 | * sim-main.h: Replace SIM_HAVE_FLATMEM with mem ptr. | |
| 1159 | * interp.c (map): Do not add to a void pointer. | |
| 72f4393d | 1160 | |
| c906108c SS |
1161 | * Makefile.in (INCLUDE): Add sim-main.h |
| 1162 | ||
| 1163 | * configure.in: Check for time.h | |
| 1164 | * configure: Re-generate. | |
| 1165 | ||
| 1166 | * interp.c (struct interrupt_generator): Make time unsigned long, | |
| 1167 | address SIM_ADDR. | |
| 1168 | (sim_resume): Make oldpc SIM_ADDR. | |
| 1169 | (struct hash_entry): Make mask/opcode unsigned. | |
| 1170 | ||
| 1171 | * v850_sim.h (struct simops ): Make opcode and mask unsigned. | |
| 1172 | ||
| 1173 | * simops.c (utime.h): Include if available. | |
| 1174 | (OP_10007E0): Check for UTIME function. | |
| 1175 | (divun): Put parentheses around shift argument. | |
| 1176 | (OP_640): Put parentheses around shift argument, was wrong. | |
| 1177 | (OP_107F0): Return something. | |
| 1178 | ||
| 1179 | * interp.c (sim_parse_number): Use strtoul not strtol. | |
| 1180 | (sim_resume): Use sim_elapsed_time_get to keep track of the time. | |
| 1181 | ||
| 1182 | * configure.in (SIM_AC_OPTION_WARNINGS): Add. | |
| 1183 | (SIM_AC_OPTION_ENDIAN): Set to hardwired big. | |
| 1184 | (SIM_AC_OPTION_HOST_ENDIAN): Add. | |
| 1185 | (AC_CHECK_FUNCS): Add utime. | |
| 1186 | (AC_CHECK_HEADERS): Add stdlib.h, string.h, strings.h, utime.h | |
| 1187 | configure: Regenerate. | |
| 72f4393d | 1188 | |
| c906108c SS |
1189 | |
| 1190 | * Makefile.in (SIM_RUN_OBJS): Use nrun.o. | |
| 1191 | (SIM_OBJS): Add sim-io.o, sim-hload.o, sim-utils.o, sim-options.o, | |
| 1192 | sim-config.o, sim-module.o, sim-events.o, sim-core.o, | |
| 1193 | sim-endian.o, sim-engine.o, sim-trace.o, sim-profile.o | |
| 1194 | (SIM_ENDIAN, SIM_WARNGINS): Define. | |
| 1195 | ||
| 1196 | * simops.c (OP_10007E0): Use sim_io_* for transfers. | |
| 1197 | ||
| 1198 | * interp.c (sim_resume): Pass sd around. | |
| 1199 | ||
| 1200 | * simops.c (sim-main.h): Include. | |
| 1201 | ||
| 1202 | * gencode.c (write_template): Generate #include sim-main.h. | |
| 1203 | (write_opcodes): Ditto. | |
| 72f4393d | 1204 | |
| c906108c SS |
1205 | * interp.c (prog_bfd, prog_bfd_was_opened_p): Delete. |
| 1206 | (v850_callback): Ditto. | |
| 1207 | (sim_kind, myname): Ditto. | |
| 1208 | (lookup_hash): Pass SD. Use sim_io_error. | |
| 1209 | (sim_set_memory_map): Pass in SD, use. | |
| 1210 | (init_system): Pass in SD, use. | |
| 1211 | (sim_open): Update. | |
| 1212 | (sim_set_profile): Delete. | |
| 1213 | (sim_set_profile_size): Delete. | |
| 1214 | (do_interrupt): Pass in SD, use. | |
| 1215 | (sim_info): Use sim_io_printf. | |
| 1216 | (sim_create_inferior): Reset registers. Set PC from prog_bfd | |
| 1217 | argument. | |
| 1218 | (sim_load): Delete, use common/sim-hload.c | |
| 1219 | (sim_size): Rename to sim_memory_init. | |
| 1220 | (sim_write): Remove call to init_system. | |
| 1221 | (init_system): Delete. | |
| 1222 | (sim_set_callbacks): Delete. | |
| 1223 | (sim_set_interrupt): Pass in SD, use. | |
| 1224 | (start_time): Delete. | |
| 72f4393d | 1225 | |
| c906108c SS |
1226 | * v850_sim.h: Remove everything except `struct simops' from here. |
| 1227 | * sim-main.h: Move most to here. | |
| 1228 | * gencode.c: Move #includes to here. | |
| 1229 | ||
| 1230 | * sim-main.h(struct _sim_cpu): Rename struct _state. | |
| 1231 | (#define PC, et.al.): Update | |
| 1232 | (v850_callback): Delete. Replaced with SIM_DESC arg. | |
| 1233 | (int8, uint8, int16, uint16, int32, uint32): Define types using | |
| 1234 | unsigned8 et.al from common/sim-types.h. | |
| 1235 | * sim-main.h (State): Define as STATE_CPU. | |
| 1236 | ||
| 1237 | Mon Sep 1 12:07:55 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 1238 | ||
| 1239 | * configure.in: Check for time, chmod. | |
| 1240 | * configure: Regenerate. | |
| 1241 | * simops.c (SYS_time, SYS_chmod): Use HAVE_TIME, HAVE_CHMOD. | |
| 72f4393d | 1242 | |
| c906108c SS |
1243 | * simops.c (../../libgloss/v850/sys/syscall.h): Include instead of |
| 1244 | sys/syscall.h. | |
| 1245 | (OP_10007E0): Check the existance each SYS_* macro independantly. | |
| 1246 | ||
| 1247 | * v850_sim.h (SIGQUIT, SIGTRAP): Only define if missing. | |
| 1248 | ||
| 1249 | Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 1250 | ||
| 1251 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 1252 | * config.in: Ditto. | |
| 1253 | ||
| 1254 | Tue Aug 26 10:42:38 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 1255 | ||
| 1256 | * interp.c (sim_kill): Delete. | |
| 1257 | (sim_create_inferior): Add ABFD argument. | |
| 1258 | (sim_load): Move setting of PC from here. | |
| 1259 | (sim_create_inferior): To here. | |
| 1260 | ||
| 1261 | Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 1262 | ||
| 1263 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 1264 | * config.in: Ditto. | |
| 1265 | ||
| 1266 | Mon Aug 25 11:31:23 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 1267 | ||
| 1268 | * interp.c (sim_open): Add ABFD argument. | |
| 1269 | ||
| 1270 | Fri Aug 22 10:39:28 1997 Nick Clifton <nickc@cygnus.com> | |
| 1271 | ||
| 1272 | * simops.c (bsh): Only set CY flag if either of the bottom | |
| 1273 | bytes is zero. | |
| 72f4393d | 1274 | |
| c906108c SS |
1275 | * simops.c (prepare, dispose): Lower numbered |
| 1276 | registers go to higher numbered address. | |
| 1277 | ||
| 1278 | * simops.c (unsigned divide instructions): S bit set if result has | |
| 1279 | top bit set. | |
| 72f4393d | 1280 | |
| c906108c SS |
1281 | * simops.c (pushml, pushmh, popml, popmh): Lower numbered |
| 1282 | registers go to higher numbered address. | |
| 72f4393d | 1283 | |
| c906108c SS |
1284 | Wed Aug 20 13:56:35 1997 Nick Clifton <nickc@cygnus.com> |
| 1285 | ||
| 1286 | * simops.c (OP_107E0, OP_107F0, OP_307E0, OP_307F0): Use correct | |
| 1287 | interpretation of SR bit in list18 structure. | |
| 1288 | (divn, divun): New functions to perform N step divide functions. | |
| 1289 | ||
| 1290 | Mon Aug 18 10:59:02 1997 Nick Clifton <nickc@cygnus.com> | |
| 1291 | ||
| 1292 | * simops.c (OP_300, OP_400, OP_60, OP_70): Support variant opcodes | |
| 1293 | with US bit set in the PSW. | |
| 1294 | ||
| 1295 | Wed Aug 13 19:06:55 1997 Nick Clifton <nickc@cygnus.com> | |
| 1296 | ||
| 1297 | * interp.c (sim_resume): Opcode functions return amount to be | |
| 1298 | added to PC and all opcodes take a standard format in the OP[] | |
| 1299 | array. | |
| 72f4393d | 1300 | |
| c906108c SS |
1301 | (do_format_*): Functions removed. |
| 1302 | ||
| 1303 | * v850_sim.h (SP, EP): New register mnemonics. | |
| 72f4393d | 1304 | |
| c906108c SS |
1305 | * gencode.c (write_header): Functions prototypes return an |
| 1306 | integer. | |
| 1307 | ||
| 1308 | * simops.c: Opcode functions return amount to be added to PC. | |
| 72f4393d | 1309 | |
| c906108c | 1310 | * v850_sim.h (CTPC, CTPSW, CTBP): New register mnemonics. |
| 72f4393d | 1311 | |
| c906108c | 1312 | * simops.c: Add support for v850e instructions. |
| 72f4393d | 1313 | |
| c906108c | 1314 | * simops.c: Add support for v850eq instructions. |
| 72f4393d | 1315 | |
| c906108c SS |
1316 | Tue May 20 10:24:14 1997 Andrew Cagney <cagney@b1.cygnus.com> |
| 1317 | ||
| 1318 | * interp.c (sim_open): Add callback argument. | |
| 1319 | (sim_set_callbacks): Delete SIM_DESC argument. | |
| 1320 | ||
| 1321 | Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com> | |
| 1322 | ||
| 1323 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 1324 | ||
| 1325 | Wed Apr 23 17:20:16 1997 Doug Evans <dje@canuck.cygnus.com> | |
| 1326 | ||
| 1327 | * interp.c (prog_bfd_was_opened_p): New static local. | |
| 1328 | (prog_bfd): New global variable. | |
| 1329 | (sim_open): Undo patch to add -E support. | |
| 1330 | (sim_close): Close prog_bfd if sim_load opened it. | |
| 1331 | (sim_load): Record bfd of loaded file in prog_bfd. | |
| 1332 | * simops.c (prog_bfd): Renamed from exec_bfd. | |
| 1333 | ||
| 1334 | Fri Apr 18 14:17:12 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 1335 | ||
| 1336 | * interp.c (sim_stop): Stub function. | |
| 1337 | ||
| 1338 | Thu Apr 17 03:53:18 1997 Doug Evans <dje@canuck.cygnus.com> | |
| 1339 | ||
| 1340 | * Makefile.in (SIM_OBJS): Add sim-load.o. | |
| 1341 | * interp.c (sim_kind, myname): New static locals. | |
| 1342 | (sim_open): Set sim_kind, myname. Ignore -E arg. | |
| 1343 | (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to | |
| 1344 | load file into simulator. Set start address from bfd. | |
| 1345 | (sim_create_inferior): Return SIM_RC. Delete arg start_address. | |
| 1346 | ||
| 1347 | Wed Apr 16 19:53:55 1997 Andrew Cagney <cagney@b1.cygnus.com> | |
| 1348 | ||
| 1349 | * simops.c (OP_10007E0): Only provide system calls SYS_execv, | |
| 1350 | SYS_wait, SYS_wait, SYS_utime, SYS_time if defined by the host. | |
| 1351 | ||
| 1352 | Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
| 1353 | ||
| 1354 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 1355 | * config.in: Ditto. | |
| 1356 | ||
| 1357 | Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com> | |
| 1358 | ||
| 1359 | * interp.c (sim_open): New arg `kind'. | |
| 1360 | ||
| 1361 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 1362 | ||
| 1363 | Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
| 1364 | ||
| 1365 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 1366 | ||
| 1367 | Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
| 1368 | ||
| 1369 | * configure: Regenerated to track ../common/aclocal.m4 changes. | |
| 1370 | ||
| 1371 | Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com> | |
| 1372 | ||
| 1373 | * configure: Re-generate. | |
| 1374 | ||
| 1375 | Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com> | |
| 1376 | ||
| 1377 | * configure: Regenerate to track ../common/aclocal.m4 changes. | |
| 1378 | ||
| 1379 | Thu Mar 13 13:00:54 1997 Doug Evans <dje@canuck.cygnus.com> | |
| 1380 | ||
| 1381 | * interp.c (sim_open): New SIM_DESC result. Argument is now | |
| 1382 | in argv form. | |
| 1383 | (other sim_*): New SIM_DESC argument. | |
| 1384 | ||
| 1385 | Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com> | |
| 1386 | ||
| 1387 | * Makefile.in (@COMMON_MAKEFILE_FRAG): Use | |
| 1388 | COMMON_{PRE,POST}_CONFIG_FRAG instead. | |
| 1389 | * configure.in: sinclude ../common/aclocal.m4. | |
| 1390 | * configure: Regenerated. | |
| 1391 | ||
| 1392 | Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com) | |
| 1393 | ||
| 1394 | * configure configure.in Makefile.in: Update to new configure | |
| 1395 | scheme which is more compatible with WinGDB builds. | |
| 1396 | * configure.in: Improve comment on how to run autoconf. | |
| 1397 | * configure: Re-run autoconf to get new ../common/aclocal.m4. | |
| 1398 | * Makefile.in: Use autoconf substitution to install common | |
| 1399 | makefile fragment. | |
| 1400 | ||
| 1401 | Mon Jan 20 16:05:34 1997 Michael Meissner <meissner@tiktok.cygnus.com> | |
| 1402 | ||
| 1403 | * simops.c (OP_{E0,2E0,6E0}): The multiply operations sign extend, | |
| 1404 | not zero extend. | |
| 1405 | ||
| 1406 | Tue Jan 14 17:06:03 1997 Stu Grossman (grossman@critters.cygnus.com) | |
| 1407 | ||
| 1408 | * simops.c: Put ifdefs around things to make MSVC happy. Get rid | |
| 1409 | of unistd.h. Disable SYS_stat, SYS_chown, SYS_time, SYS_times, | |
| 1410 | SYS_gettimeofday and SYS_utime from MSVC. | |
| 1411 | ||
| 1412 | Tue Dec 31 18:11:13 1996 Michael Meissner <meissner@tiktok.cygnus.com> | |
| 1413 | ||
| 1414 | * simops.c (OP_10007E0): Know that kill encodes the signal number | |
| 1415 | via: 0xdead0000 | signal and turn it back into a signal. | |
| 1416 | ||
| 1417 | Fri Dec 27 14:44:06 1996 Michael Meissner <meissner@tiktok.cygnus.com> | |
| 1418 | ||
| 1419 | * v850_sim.h (SIG_V850_EXIT): Define as -1. | |
| 1420 | ||
| 1421 | * interp.c (sim_open): Cast calloc function. | |
| 1422 | (sim_stop_reason): If signal is SIG_V850_EXIT, inform gdb the | |
| 1423 | program exited with the appropriate exit code. | |
| 1424 | (sim_set_interrupt): Declare buildargv. | |
| 1425 | ||
| 1426 | * simops.c (OP_10007E0): Make exit signal normal exit. Make time | |
| 1427 | type correct and work on big endian systems. | |
| 1428 | ||
| 1429 | Wed Nov 20 02:18:44 1996 Doug Evans <dje@canuck.cygnus.com> | |
| 1430 | ||
| 1431 | * Makefile.in: Delete stuff moved to ../common/Make-common.in. | |
| 1432 | (SIM_OBJS,SIM_EXTRA_CFLAGS,SIM_EXTRA_CLEAN): Define. | |
| 1433 | * configure.in: Simplify using macros in ../common/aclocal.m4. | |
| 1434 | Call AC_CHECK_HEADERS(unistd.h). | |
| 1435 | * configure: Regenerated. | |
| 1436 | * config.in: New file. | |
| 1437 | * simops.c: #include "config.h". #include <unistd.h> if present. | |
| 1438 | ||
| 1439 | Sun Nov 3 23:02:54 1996 Stan Shebs <shebs@andros.cygnus.com> | |
| 1440 | ||
| 1441 | * v850_sim.h (State): New slots dummy_mem, pending_nmi. | |
| 1442 | (EIPC, etc): New macros for system registers. | |
| 1443 | * simops.c, interp.c: Use everywhere. | |
| 1444 | ||
| 1445 | * interp.c: Add support for interrupts issued by interrupt | |
| 1446 | generators, either PC- or time-based. Controlled by simulator | |
| 1447 | command "sim interrupt". | |
| 1448 | ||
| 1449 | * interp.c: Add support for variable-size allocation of memory, | |
| 1450 | via simulator command "sim memory-map". | |
| 1451 | (map): Issue SIGSEGV for references to invalid memory regions. | |
| 72f4393d | 1452 | |
| c906108c | 1453 | Thu Oct 31 14:44:10 1996 Gavin Koch <gavin@cygnus.com> |
| 72f4393d L |
1454 | |
| 1455 | * simops.c: Include <sys/time.h> for struct timeval and | |
| 1456 | struct timezone. | |
| 1457 | ||
| c906108c SS |
1458 | Wed Oct 30 08:49:10 1996 Jeffrey A Law (law@cygnus.com) |
| 1459 | ||
| 1460 | * simops.c (OP_10007E0): Handle SYS_times and SYS_gettimeofday. | |
| 1461 | ||
| 1462 | * simops.c (OP_10007E0): Handle SYS_time. | |
| 1463 | ||
| 1464 | Tue Oct 29 14:22:55 1996 Jeffrey A Law (law@cygnus.com) | |
| 1465 | ||
| 1466 | * simops.c: Include <sys/stat.h>. | |
| 1467 | (OP_10007E0): Handle SYS_stat. | |
| 1468 | ||
| 1469 | Thu Oct 24 12:26:35 1996 Jeffrey A Law (law@cygnus.com) | |
| 1470 | ||
| 1471 | * simops.c (OP_10007E0): Don't declare errno. | |
| 1472 | ||
| 1473 | * simops.c (OP_500): Mask off low bit in displacement | |
| 1474 | for sld.w. | |
| 1475 | (OP_501): Similarly. | |
| 1476 | ||
| 1477 | * simops.c (OP_500): Fix displacement handling for sld.w. | |
| 1478 | (OP_501): Similarly for sst.w. | |
| 1479 | ||
| 1480 | * simops.c (trace_input): Remove all references to SEXT7. | |
| 1481 | (OP_300, OP_400, OP_500, OP_380, OP_480, OP_501): Displacement | |
| 1482 | is zero extended for sst/sld instructions. | |
| 1483 | * v850_sim.h (SEX7): Delete. It's no longer needed (and it | |
| 1484 | was incorrect anyway). | |
| 1485 | ||
| 1486 | Thu Oct 24 10:33:33 1996 Stu Grossman (grossman@critters.cygnus.com) | |
| 1487 | ||
| 1488 | * Makefile.in: Get rid of srcroot. Set all INSTALL macros via | |
| 1489 | autoconf. | |
| 1490 | * gencode.c (write_opcodes): Pad operands field to account for | |
| 1491 | MSVC braindamage. | |
| 1492 | * simops.c: Include errno.h. Exclude SYS_chown, since MSVC | |
| 1493 | doesn't support it. (Why is this here in the first place?!?) | |
| 1494 | * v850_sim.h: Get rid of 64 bit defs. Also, get rid of #elif's. | |
| 1495 | Change number of operands in struct simops from 9 to 6. Define | |
| 1496 | SIGTRAP and SIGQUIT for MSVC. | |
| 1497 | ||
| 1498 | Tue Oct 15 16:19:51 1996 Stu Grossman (grossman@critters.cygnus.com) | |
| 1499 | ||
| 1500 | * interp.c (MEM_SIZE): It's now bytes, not a power of 2. | |
| 1501 | * (map): Add support for external mem in the 1->2 meg range. | |
| 1502 | Also, abort() when memory access is way out of bounds. (Better to | |
| 1503 | die than to give wrong result. (This will be fixed later.)) | |
| 1504 | * (sim_size): MEM_SIZE is now bytes, not shift factor. | |
| 1505 | ||
| 1506 | Tue Oct 1 15:53:24 1996 Gavin Koch <gavin@cygnus.com> | |
| 72f4393d L |
1507 | |
| 1508 | * simops.c (trace_input): Swapped order of operands for output | |
| 1509 | output of OP_IMM_REG. Changed the fetching of the operands for | |
| 1510 | OP_LOAD32, and OP_STORE32 to work like op-function. | |
| 1511 | ||
| c906108c SS |
1512 | Mon Sep 30 15:46:33 1996 Stu Grossman (grossman@critters.cygnus.com) |
| 1513 | ||
| 1514 | * interp.c: Move includes of remote-sim.h and callback.h to | |
| 1515 | v850-sim.h. | |
| 1516 | * (lookup_hash): Add PC to report of hash failure. | |
| 1517 | * (map load_mem store_mem): New memory subsystem. Models V851 | |
| 1518 | memory system. | |
| 1519 | * (sim_write sim_read): Use new memory subsystem. | |
| 1520 | * (sim_resume): Don't load and save PC into EIPC anymore. Needed | |
| 1521 | to make user-defined traps work right. | |
| 1522 | * simops.c (OP_*): Use new memory subsystem. | |
| 1523 | * (OP_14007E0 (reti)): Implement reti. | |
| 1524 | * (OP_14996E0 (trap)): Implement user-defined traps. Move I/O to | |
| 1525 | trap 31. Use new memory subsystem. | |
| 1526 | * v850_sim.h: Prototypes for load_mem, store_mem and map. Use | |
| 1527 | load_mem in RLW macro. | |
| 1528 | ||
| 1529 | Fri Sep 27 18:34:09 1996 Stu Grossman (grossman@critters.cygnus.com) | |
| 1530 | ||
| 1531 | * gencode.c (write_opcodes): Output hex values for opcode mask | |
| 1532 | and patterns. | |
| 1533 | * interp.c (sim_resume): Save and restore PC from the appropriate | |
| 1534 | register. | |
| 1535 | * (sim_fetch_register sim_store_register): Fix byte-order problem | |
| 1536 | with reading and writing registers. | |
| 1537 | * simops.c (OP_FFFF): Implement pseudo-breakpoint insn. | |
| 1538 | ||
| 1539 | Fri Sep 27 17:42:37 1996 Jeffrey A Law (law@cygnus.com) | |
| 1540 | ||
| 72f4393d | 1541 | * simops.c (trace_input): Fix thinko. |
| c906108c SS |
1542 | |
| 1543 | Wed Sep 18 09:54:12 1996 Michael Meissner <meissner@tiktok.cygnus.com> | |
| 1544 | ||
| 1545 | * simops.c (exec_bfd): Rename from sim_bfd. | |
| 1546 | (trace_input): Ditto. | |
| 1547 | ||
| 1548 | Thu Sep 12 12:03:05 1996 Michael Meissner <meissner@tiktok.cygnus.com> | |
| 1549 | ||
| 1550 | * simops.c (trace_input): Use find_nearest_line to print line | |
| 1551 | number, function name or file name of PC. | |
| 1552 | ||
| 1553 | Wed Sep 11 16:44:37 1996 Michael Meissner <meissner@tiktok.cygnus.com> | |
| 1554 | ||
| 1555 | * simops.c: Add tracing support. Use SEXTxx macros instead of | |
| 1556 | doing hardwired shifts. | |
| 1557 | ||
| 1558 | * configure.in (--enable-sim-cflags): Add switch to add additional | |
| 1559 | flags to simulator buld. If --enable-sim-cflags=trace, turn on | |
| 1560 | tracing. | |
| 1561 | * configure: Regenerate. | |
| 1562 | ||
| 1563 | * Makefile.in: Don't require a VPATH capable make if configuring | |
| 1564 | in the same directory. Don't use CFLAGS for configuration flags. | |
| 1565 | Add flags from --enable-sim-cflags. Support canadian cross | |
| 1566 | builds. Rebuild whole simulator if include files change. | |
| 1567 | ||
| 1568 | * interp.c (v850_debug): New global for debugging. | |
| 1569 | (lookup_hash,sim_size,sim_set_profile): Use | |
| 1570 | printf_filtered callback, instead of calling printf directly. | |
| 1571 | (sim_{open,trace}): Enable tracing if -t and compiled for tracing. | |
| 1572 | ||
| 1573 | * v850_sim.h: Use limits.h to set the various sized types. | |
| 1574 | (SEXT{5,7,16,22}): New macros. | |
| 1575 | ||
| 1576 | Mon Sep 9 20:50:46 1996 Jeffrey A Law (law@cygnus.com) | |
| 1577 | ||
| 1578 | * interp.c (hash): Make this an inline function | |
| 1579 | when compiling with GCC. Simplify. | |
| 1580 | * simpos.c: Explicitly include "sys/syscall.h". Remove | |
| 1581 | some #if 0'd code. Enable more emulated syscalls. | |
| 1582 | ||
| 1583 | Wed Sep 4 01:48:55 1996 Jeffrey A Law (law@cygnus.com) | |
| 1584 | ||
| 1585 | * interp.c: Fix sign bit handling for add and sub instructions. | |
| 1586 | ||
| 1587 | Tue Sep 3 10:20:30 1996 Jeffrey A Law (law@cygnus.com) | |
| 1588 | ||
| 1589 | * gencode.c: Fix various indention & style problems. | |
| 1590 | Remove test code. Remove #if 0 code. | |
| 1591 | * interp.c: Provide prototypes for all static functions. | |
| 1592 | Fix minor indention problems. | |
| 1593 | (sim_open, sim_resume): Remove unused variables. | |
| 1594 | (sim_read): Return type is "int". | |
| 1595 | * simops.c: Remove unused variables. | |
| 1596 | (divh): Make result of divide-by-zero zero. | |
| 1597 | (setf): Initialize result to keep compiler quiet. | |
| 1598 | (sar instructions): These just clear the overflow bit. | |
| 1599 | * v850_sim.h: Provide prototypes for put_byte, put_half | |
| 1600 | and put_word. | |
| 1601 | ||
| 1602 | * interp.c: OP should be an array of 32bit operands! | |
| 1603 | (v850_callback): Declare. | |
| 1604 | (do_format_5): Fix extraction of OP[0]. | |
| 1605 | (sim_size): Remove debugging printf. | |
| 1606 | (sim_set_callbacks): Do something useful. | |
| 1607 | (sim_stop_reason): Gross hacks to get c-torture running. | |
| 1608 | * simops.c: Simplify code for computing targets of bCC | |
| 1609 | insns. Invert 's' bit if 'ov' bit is set for some | |
| 1610 | instructions. Fix 'cy' bit handling for numerous | |
| 1611 | instructions. Make the simulator stop when a halt | |
| 1612 | instruction is encountered. Very crude support for | |
| 1613 | emulated syscalls (trap 0). | |
| 1614 | * v850_sim.h: Include "callback.h" and declare | |
| 1615 | v850_callback. Items in the operand array are 32bits. | |
| 1616 | ||
| 1617 | Sun Sep 1 22:35:35 1996 Jeffrey A Law (law@cygnus.com) | |
| 1618 | ||
| 1619 | * interp.c (sim_resume): Fix code to check for a format 3 | |
| 1620 | opcode. | |
| 1621 | * simops.c: bCC insns only argument is a constant, not a | |
| 1622 | register value (duh...) | |
| 1623 | ||
| 1624 | Fri Aug 30 10:33:49 1996 Jeffrey A Law (law@cygnus.com) | |
| 1625 | ||
| 1626 | * simops.c: Fix "not1" and "set1". | |
| 1627 | ||
| 1628 | * simops.c: Don't forget to initialize temp for | |
| 1629 | "ld.h" and "ld.w" | |
| 1630 | ||
| 1631 | * interp.c: Remove various debugging printfs. | |
| 1632 | ||
| 1633 | * simops.c: Fix satadd, satsub boundary case handling. | |
| 1634 | ||
| 1635 | * interp.c (hash): Fix. | |
| 1636 | * interp.c (do_format_8): Get operands correctly and | |
| 1637 | call the target function. | |
| 1638 | * simops.c: Rough cut at "clr1", "not1", "set1", and "tst1". | |
| 1639 | ||
| 1640 | Thu Aug 29 13:53:29 1996 Jeffrey A Law (law@cygnus.com) | |
| 1641 | ||
| 1642 | * interp.c (do_format_4): Get operands correctly and | |
| 1643 | call the target function. | |
| 1644 | * simops.c: Rough cut at "sld.b", "sld.h", "sld.w", "sst.b", | |
| 1645 | "sst.h", and "sst.w". | |
| 1646 | ||
| 1647 | * v850_sim.h: The V850 doesn't have split I&D spaces. Change | |
| 1648 | accordingly. Remove many unused definitions. | |
| 1649 | * interp.c: The V850 doesn't have split I&D spaces. Change | |
| 1650 | accordingly. | |
| 1651 | (get_longlong, get_longword, get_word): Deleted. | |
| 1652 | (write_longlong, write_longword, write_word): Deleted. | |
| 1653 | (get_operands): Deleted. | |
| 1654 | (get_byte, get_half, get_word): New functions. | |
| 1655 | (put_byte, put_half, put_word): New functions. | |
| 1656 | * simops.c: Remove unused functions. Rough cut at | |
| 1657 | "ld.b", "ld.h", "ld.w", "st.b", "st.h", "st.w" insns. | |
| 1658 | ||
| 1659 | * v850_sim.h (struct _state): Remove "psw" field. Add | |
| 1660 | "sregs" field. | |
| 1661 | (PSW): Remove bogus definition. | |
| 1662 | * simops.c: Change condition code handling to use the psw | |
| 1663 | register within the sregs array. Handle "ldsr" and "stsr". | |
| 1664 | ||
| 1665 | * simops.c: Handle "satadd", "satsub", "satsubi", "satsubr". | |
| 1666 | ||
| 1667 | * interp.c (do_format_5): Get operands correctly and | |
| 1668 | call the target function. | |
| 1669 | (sim_resume): Don't do a PC update for format 5 instructions. | |
| 1670 | * simops.c: Handle "jarl" and "jmp" instructions. | |
| 1671 | ||
| 1672 | * simops.c: Fix minor typos. Handle "cmp", "setf", "tst" | |
| 1673 | "di", and "ei" instructions correctly. | |
| 1674 | ||
| 1675 | * interp.c (do_format_3): Get operands correctly and call | |
| 1676 | the target function. | |
| 1677 | * simops.c: Handle bCC instructions. | |
| 1678 | ||
| 1679 | * simops.c: Add condition code handling to shift insns. | |
| 1680 | Fix minor typos in condition code handling for other insns. | |
| 1681 | ||
| 1682 | * Makefile.in: Fix typo. | |
| 1683 | * simops.c: Add condition code handling to "sub" "subr" and | |
| 1684 | "divh" instructions. | |
| 1685 | ||
| 1686 | * interp.c (hash): Update to be more accurate. | |
| 1687 | (lookup_hash): Call hash rather than computing the hash | |
| 1688 | code here. | |
| 1689 | (do_format_1_2): Handle format 1 and format 2 instructions. | |
| 1690 | Get operands correctly and call the target function. | |
| 1691 | (do_format_6): Get operands correctly and call the target | |
| 1692 | function. | |
| 1693 | (do_formats_9_10): Rough cut so shift ops will work. | |
| 1694 | (sim_resume): Tweak to deal with format 1 and format 2 | |
| 1695 | handling in a single funtion. Don't update the PC | |
| 1696 | for format 3 insns. Fix typos. | |
| 1697 | * simops.c: Slightly reorganize. Add condition code handling | |
| 1698 | to "add", "addi", "and", "andi", "or", "ori", "xor", "xori" | |
| 1699 | and "not" instructions. | |
| 1700 | * v850_sim.h (reg_t): Registers are 32bits. | |
| 1701 | (_state): The V850 has 32 general registers. Add a 32bit | |
| 1702 | psw and pc register too. Add accessor macros | |
| 1703 | ||
| 1704 | * Makefile.in, interp.c, v850_sim.h: Bring over endianness | |
| 1705 | changes from the d10v simulator. | |
| 1706 | ||
| 1707 | * simops.c: Add shift support. | |
| 1708 | ||
| 1709 | * simops.c: Add multiply & divide support. Abort for system | |
| 1710 | instructions. | |
| 1711 | ||
| 1712 | * simops.c: Add logicals, mov, movhi, movea, add, addi, sub | |
| 1713 | and subr. No condition codes yet. | |
| 1714 | ||
| 1715 | Wed Aug 28 13:53:22 1996 Jeffrey A Law (law@cygnus.com) | |
| 1716 | ||
| 72f4393d | 1717 | * ChangeLog, Makefile.in, configure, configure.in, v850_sim.h, |
| c906108c | 1718 | gencode.c, interp.c, simops.c: Created. |