[binutils, ARM, 16/16] Add support to VLDR and VSTR of system registers

[thirdparty/binutils-gdb.git] / gas / testsuite / gas / arm / archv8m_1m-cmse-main-bad.l

diff --git a/gas/testsuite/gas/arm/archv8m_1m-cmse-main-bad.l b/gas/testsuite/gas/arm/archv8m_1m-cmse-main-bad.l
index b64937d27f2af469daac5e3feb9167dccde0a986..979982dd9f3bc2059ea059db37dd655c4140b8f5 100644 (file)
--- a/gas/testsuite/gas/arm/archv8m_1m-cmse-main-bad.l
+++ b/gas/testsuite/gas/arm/archv8m_1m-cmse-main-bad.l
@@ -6,3 +6,11 @@
 [^:]*:11: Error: VPR expected last -- `vscclrm {s0}'
 [^:]*:12: Error: VFP single precision register or VPR expected -- `vscclrm {s1,d1,VPR}'
 [^:]*:13: Error: VFP single precision register expected -- `vscclrm {s1-d1,VPR}'
+[^:]*:15: Error: syntax error -- `vldr APSR,\[r2\]'
+[^:]*:20: Error: syntax error -- `vstr APSR,\[r2\]'
+[^:]*:16: Error: co-processor offset out of range
+[^:]*:17: Error: co-processor offset out of range
+[^:]*:18: Error: co-processor offset out of range
+[^:]*:21: Error: co-processor offset out of range
+[^:]*:22: Error: co-processor offset out of range
+[^:]*:23: Error: co-processor offset out of range