[binutils, ARM, 16/16] Add support to VLDR and VSTR of system registers

[thirdparty/binutils-gdb.git] / gas / testsuite / gas / arm / archv8m_1m-cmse-main-bad.s

diff --git a/gas/testsuite/gas/arm/archv8m_1m-cmse-main-bad.s b/gas/testsuite/gas/arm/archv8m_1m-cmse-main-bad.s
index f4baefe73f84a0c93a9ab992b80a9f0b3644d051..894e8b2b8f03cef09bfe33dcf238af68fb07f95d 100644 (file)
--- a/gas/testsuite/gas/arm/archv8m_1m-cmse-main-bad.s
+++ b/gas/testsuite/gas/arm/archv8m_1m-cmse-main-bad.s
@@ -11,3 +11,13 @@ vscclrm {} @ Rejects empty list
 vscclrm {s0} @ Rejects list without VPR
 vscclrm {s1, d1, VPR} @ Reject mix of single and double-precision VFP registers
 vscclrm {s1-d1, VPR} @ Likewise when using a range
+
+vldr APSR, [r2] @ Rejects incorrect system register
+vldr FPSCR, [r2, #2] @ Rejects invalid immediate for offset variant
+vldr FPSCR, [r2, #2]! @ Likewise for pre-index variant
+vldr FPSCR, [r2], #2 @ Likewise for post-index variant
+
+vstr APSR, [r2] @ Rejects incorrect system register
+vstr FPSCR, [r2, #2] @ Rejects invalid immediate for offset variant
+vstr FPSCR, [r2, #2]! @ Likewise for pre-index variant
+vstr FPSCR, [r2], #2 @ Likewise for post-index variant