/* Target-dependent code for the ALPHA architecture, for GDB, the GNU Debugger.
- Copyright (C) 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
- 2003, 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
+ Copyright (C) 1993-2016 Free Software Foundation, Inc.
This file is part of GDB.
#include "dis-asm.h"
#include "symfile.h"
#include "objfiles.h"
-#include "gdb_string.h"
#include "linespec.h"
#include "regcache.h"
#include "reggroups.h"
#include "alpha-tdep.h"
+/* Instruction decoding. The notations for registers, immediates and
+ opcodes are the same as the one used in Compaq's Alpha architecture
+ handbook. */
+
+#define INSN_OPCODE(insn) ((insn & 0xfc000000) >> 26)
+
+/* Memory instruction format */
+#define MEM_RA(insn) ((insn & 0x03e00000) >> 21)
+#define MEM_RB(insn) ((insn & 0x001f0000) >> 16)
+#define MEM_DISP(insn) \
+ (((insn & 0x8000) == 0) ? (insn & 0xffff) : -((-insn) & 0xffff))
+
+static const int lda_opcode = 0x08;
+static const int stq_opcode = 0x2d;
+
+/* Branch instruction format */
+#define BR_RA(insn) MEM_RA(insn)
+
+static const int br_opcode = 0x30;
+static const int bne_opcode = 0x3d;
+
+/* Operate instruction format */
+#define OPR_FUNCTION(insn) ((insn & 0xfe0) >> 5)
+#define OPR_HAS_IMMEDIATE(insn) ((insn & 0x1000) == 0x1000)
+#define OPR_RA(insn) MEM_RA(insn)
+#define OPR_RC(insn) ((insn & 0x1f))
+#define OPR_LIT(insn) ((insn & 0x1fe000) >> 13)
+
+static const int subq_opcode = 0x10;
+static const int subq_function = 0x29;
+
\f
/* Return the name of the REGNO register.
An empty name corresponds to a register number that used to
- be used for a virtual register. That virtual register has
+ be used for a virtual register. That virtual register has
been removed, but the index is still reserved to maintain
compatibility with existing remote alpha targets. */
static int
alpha_cannot_fetch_register (struct gdbarch *gdbarch, int regno)
{
- return (regno == ALPHA_ZERO_REGNUM
- || strlen (alpha_register_name (gdbarch, regno)) == 0);
+ return (strlen (alpha_register_name (gdbarch, regno)) == 0);
}
static int
alpha_register_type (struct gdbarch *gdbarch, int regno)
{
if (regno == ALPHA_SP_REGNUM || regno == ALPHA_GP_REGNUM)
- return builtin_type_void_data_ptr;
+ return builtin_type (gdbarch)->builtin_data_ptr;
if (regno == ALPHA_PC_REGNUM)
- return builtin_type_void_func_ptr;
+ return builtin_type (gdbarch)->builtin_func_ptr;
/* Don't need to worry about little vs big endian until
some jerk tries to port to alpha-unicosmk. */
if (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31)
- return builtin_type_ieee_double;
+ return builtin_type (gdbarch)->builtin_double;
- return builtin_type_int64;
+ return builtin_type (gdbarch)->builtin_int64;
}
/* Is REGNUM a member of REGGROUP? */
floating point and 32-bit integers. */
static void
-alpha_lds (void *out, const void *in)
+alpha_lds (struct gdbarch *gdbarch, void *out, const void *in)
{
- ULONGEST mem = extract_unsigned_integer (in, 4);
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+ ULONGEST mem
+ = extract_unsigned_integer ((const gdb_byte *) in, 4, byte_order);
ULONGEST frac = (mem >> 0) & 0x7fffff;
ULONGEST sign = (mem >> 31) & 1;
ULONGEST exp_msb = (mem >> 30) & 1;
}
reg = (sign << 63) | (exp << 52) | (frac << 29);
- store_unsigned_integer (out, 8, reg);
+ store_unsigned_integer ((gdb_byte *) out, 8, byte_order, reg);
}
/* Similarly, this represents exactly the conversion performed by
the STS instruction. */
static void
-alpha_sts (void *out, const void *in)
+alpha_sts (struct gdbarch *gdbarch, void *out, const void *in)
{
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
ULONGEST reg, mem;
- reg = extract_unsigned_integer (in, 8);
+ reg = extract_unsigned_integer ((const gdb_byte *) in, 8, byte_order);
mem = ((reg >> 32) & 0xc0000000) | ((reg >> 29) & 0x3fffffff);
- store_unsigned_integer (out, 4, mem);
+ store_unsigned_integer ((gdb_byte *) out, 4, byte_order, mem);
}
/* The alpha needs a conversion between register and memory format if the
register is a floating point register and memory format is float, as the
register format must be double or memory format is an integer with 4
bytes or less, as the representation of integers in floating point
- registers is different. */
+ registers is different. */
static int
-alpha_convert_register_p (struct gdbarch *gdbarch, int regno, struct type *type)
+alpha_convert_register_p (struct gdbarch *gdbarch, int regno,
+ struct type *type)
{
return (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31
&& TYPE_LENGTH (type) != 8);
}
-static void
+static int
alpha_register_to_value (struct frame_info *frame, int regnum,
- struct type *valtype, gdb_byte *out)
+ struct type *valtype, gdb_byte *out,
+ int *optimizedp, int *unavailablep)
{
+ struct gdbarch *gdbarch = get_frame_arch (frame);
gdb_byte in[MAX_REGISTER_SIZE];
- frame_register_read (frame, regnum, in);
- switch (TYPE_LENGTH (valtype))
+ /* Convert to TYPE. */
+ if (!get_frame_register_bytes (frame, regnum, 0,
+ register_size (gdbarch, regnum),
+ in, optimizedp, unavailablep))
+ return 0;
+
+ if (TYPE_LENGTH (valtype) == 4)
{
- case 4:
- alpha_sts (out, in);
- break;
- default:
- error (_("Cannot retrieve value from floating point register"));
+ alpha_sts (gdbarch, out, in);
+ *optimizedp = *unavailablep = 0;
+ return 1;
}
+
+ error (_("Cannot retrieve value from floating point register"));
}
static void
switch (TYPE_LENGTH (valtype))
{
case 4:
- alpha_lds (out, in);
+ alpha_lds (get_frame_arch (frame), out, in);
break;
default:
error (_("Cannot store value in floating point register"));
int nargs, struct value **args, CORE_ADDR sp,
int struct_return, CORE_ADDR struct_addr)
{
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
int i;
int accumulate_size = struct_return ? 8 : 0;
struct alpha_arg
{
- gdb_byte *contents;
+ const gdb_byte *contents;
int len;
int offset;
};
- struct alpha_arg *alpha_args
- = (struct alpha_arg *) alloca (nargs * sizeof (struct alpha_arg));
+ struct alpha_arg *alpha_args = XALLOCAVEC (struct alpha_arg, nargs);
struct alpha_arg *m_arg;
gdb_byte arg_reg_buffer[ALPHA_REGISTER_SIZE * ALPHA_NUM_ARG_REGS];
int required_arg_regs;
{
/* 32-bit values must be sign-extended to 64 bits
even if the base data type is unsigned. */
- arg_type = builtin_type_int32;
+ arg_type = builtin_type (gdbarch)->builtin_int32;
arg = value_cast (arg_type, arg);
}
if (TYPE_LENGTH (arg_type) < ALPHA_REGISTER_SIZE)
{
- arg_type = builtin_type_int64;
+ arg_type = builtin_type (gdbarch)->builtin_int64;
arg = value_cast (arg_type, arg);
}
break;
if (accumulate_size < sizeof (arg_reg_buffer)
&& TYPE_LENGTH (arg_type) == 4)
{
- arg_type = builtin_type_ieee_double;
+ arg_type = builtin_type (gdbarch)->builtin_double;
arg = value_cast (arg_type, arg);
}
/* Tru64 5.1 has a 128-bit long double, and passes this by
m_arg->len = TYPE_LENGTH (arg_type);
m_arg->offset = accumulate_size;
accumulate_size = (accumulate_size + m_arg->len + 7) & ~7;
- m_arg->contents = value_contents_writeable (arg);
+ m_arg->contents = value_contents (arg);
}
/* Determine required argument register loads, loading an argument register
/* `Push' arguments on the stack. */
for (i = nargs; m_arg--, --i >= 0;)
{
- gdb_byte *contents = m_arg->contents;
+ const gdb_byte *contents = m_arg->contents;
int offset = m_arg->offset;
int len = m_arg->len;
write_memory (sp + offset - sizeof(arg_reg_buffer), contents, len);
}
if (struct_return)
- store_unsigned_integer (arg_reg_buffer, ALPHA_REGISTER_SIZE, struct_addr);
+ store_unsigned_integer (arg_reg_buffer, ALPHA_REGISTER_SIZE,
+ byte_order, struct_addr);
/* Load the argument registers. */
for (i = 0; i < required_arg_regs; i++)
alpha_extract_return_value (struct type *valtype, struct regcache *regcache,
gdb_byte *valbuf)
{
- int length = TYPE_LENGTH (valtype);
+ struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
gdb_byte raw_buffer[ALPHA_REGISTER_SIZE];
ULONGEST l;
switch (TYPE_CODE (valtype))
{
case TYPE_CODE_FLT:
- switch (length)
+ switch (TYPE_LENGTH (valtype))
{
case 4:
regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, raw_buffer);
- alpha_sts (valbuf, raw_buffer);
+ alpha_sts (gdbarch, valbuf, raw_buffer);
break;
case 8:
break;
default:
- internal_error (__FILE__, __LINE__, _("unknown floating point width"));
+ internal_error (__FILE__, __LINE__,
+ _("unknown floating point width"));
}
break;
case TYPE_CODE_COMPLEX:
- switch (length)
+ switch (TYPE_LENGTH (valtype))
{
case 8:
/* ??? This isn't correct wrt the ABI, but it's what GCC does. */
break;
case 32:
- regcache_cooked_read_signed (regcache, ALPHA_V0_REGNUM, &l);
+ regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l);
read_memory (l, valbuf, 32);
break;
default:
- internal_error (__FILE__, __LINE__, _("unknown floating point width"));
+ internal_error (__FILE__, __LINE__,
+ _("unknown floating point width"));
}
break;
default:
/* Assume everything else degenerates to an integer. */
regcache_cooked_read_unsigned (regcache, ALPHA_V0_REGNUM, &l);
- store_unsigned_integer (valbuf, length, l);
+ store_unsigned_integer (valbuf, TYPE_LENGTH (valtype), byte_order, l);
break;
}
}
alpha_store_return_value (struct type *valtype, struct regcache *regcache,
const gdb_byte *valbuf)
{
- int length = TYPE_LENGTH (valtype);
+ struct gdbarch *gdbarch = get_regcache_arch (regcache);
gdb_byte raw_buffer[ALPHA_REGISTER_SIZE];
ULONGEST l;
switch (TYPE_CODE (valtype))
{
case TYPE_CODE_FLT:
- switch (length)
+ switch (TYPE_LENGTH (valtype))
{
case 4:
- alpha_lds (raw_buffer, valbuf);
+ alpha_lds (gdbarch, raw_buffer, valbuf);
regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, raw_buffer);
break;
error (_("Cannot set a 128-bit long double return value."));
default:
- internal_error (__FILE__, __LINE__, _("unknown floating point width"));
+ internal_error (__FILE__, __LINE__,
+ _("unknown floating point width"));
}
break;
case TYPE_CODE_COMPLEX:
- switch (length)
+ switch (TYPE_LENGTH (valtype))
{
case 8:
/* ??? This isn't correct wrt the ABI, but it's what GCC does. */
error (_("Cannot set a 128-bit long double return value."));
default:
- internal_error (__FILE__, __LINE__, _("unknown floating point width"));
+ internal_error (__FILE__, __LINE__,
+ _("unknown floating point width"));
}
break;
/* Assume everything else degenerates to an integer. */
/* 32-bit values must be sign-extended to 64 bits
even if the base data type is unsigned. */
- if (length == 4)
- valtype = builtin_type_int32;
+ if (TYPE_LENGTH (valtype) == 4)
+ valtype = builtin_type (gdbarch)->builtin_int32;
l = unpack_long (valtype, valbuf);
regcache_cooked_write_unsigned (regcache, ALPHA_V0_REGNUM, l);
break;
}
static enum return_value_convention
-alpha_return_value (struct gdbarch *gdbarch, struct type *type,
- struct regcache *regcache, gdb_byte *readbuf,
- const gdb_byte *writebuf)
+alpha_return_value (struct gdbarch *gdbarch, struct value *function,
+ struct type *type, struct regcache *regcache,
+ gdb_byte *readbuf, const gdb_byte *writebuf)
{
enum type_code code = TYPE_CODE (type);
/* Read an instruction from memory at PC, looking through breakpoints. */
unsigned int
-alpha_read_insn (CORE_ADDR pc)
+alpha_read_insn (struct gdbarch *gdbarch, CORE_ADDR pc)
{
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
gdb_byte buf[ALPHA_INSN_SIZE];
- int status;
+ int res;
- status = target_read_memory (pc, buf, sizeof (buf));
- if (status)
- memory_error (status, pc);
- return extract_unsigned_integer (buf, sizeof (buf));
+ res = target_read_memory (pc, buf, sizeof (buf));
+ if (res != 0)
+ memory_error (TARGET_XFER_E_IO, pc);
+ return extract_unsigned_integer (buf, sizeof (buf), byte_order);
}
/* To skip prologues, I use this predicate. Returns either PC itself
/* Can't determine prologue from the symbol table, need to examine
instructions. */
- /* Skip the typical prologue instructions. These are the stack adjustment
+ /* Skip the typical prologue instructions. These are the stack adjustment
instruction and the instructions that save registers on the stack
or in the gcc frame. */
for (offset = 0; offset < 100; offset += ALPHA_INSN_SIZE)
{
- inst = alpha_read_insn (pc + offset);
+ inst = alpha_read_insn (gdbarch, pc + offset);
if ((inst & 0xffff0000) == 0x27bb0000) /* ldah $gp,n($t12) */
continue;
return pc + offset;
}
+\f
+static const int ldl_l_opcode = 0x2a;
+static const int ldq_l_opcode = 0x2b;
+static const int stl_c_opcode = 0x2e;
+static const int stq_c_opcode = 0x2f;
+
+/* Checks for an atomic sequence of instructions beginning with a LDL_L/LDQ_L
+ instruction and ending with a STL_C/STQ_C instruction. If such a sequence
+ is found, attempt to step through it. A breakpoint is placed at the end of
+ the sequence. */
+
+static int
+alpha_deal_with_atomic_sequence (struct frame_info *frame)
+{
+ struct gdbarch *gdbarch = get_frame_arch (frame);
+ struct address_space *aspace = get_frame_address_space (frame);
+ CORE_ADDR pc = get_frame_pc (frame);
+ CORE_ADDR breaks[2] = {-1, -1};
+ CORE_ADDR loc = pc;
+ CORE_ADDR closing_insn; /* Instruction that closes the atomic sequence. */
+ unsigned int insn = alpha_read_insn (gdbarch, loc);
+ int insn_count;
+ int index;
+ int last_breakpoint = 0; /* Defaults to 0 (no breakpoints placed). */
+ const int atomic_sequence_length = 16; /* Instruction sequence length. */
+ int bc_insn_count = 0; /* Conditional branch instruction count. */
+
+ /* Assume all atomic sequences start with a LDL_L/LDQ_L instruction. */
+ if (INSN_OPCODE (insn) != ldl_l_opcode
+ && INSN_OPCODE (insn) != ldq_l_opcode)
+ return 0;
+
+ /* Assume that no atomic sequence is longer than "atomic_sequence_length"
+ instructions. */
+ for (insn_count = 0; insn_count < atomic_sequence_length; ++insn_count)
+ {
+ loc += ALPHA_INSN_SIZE;
+ insn = alpha_read_insn (gdbarch, loc);
+
+ /* Assume that there is at most one branch in the atomic
+ sequence. If a branch is found, put a breakpoint in
+ its destination address. */
+ if (INSN_OPCODE (insn) >= br_opcode)
+ {
+ int immediate = (insn & 0x001fffff) << 2;
+
+ immediate = (immediate ^ 0x400000) - 0x400000;
+
+ if (bc_insn_count >= 1)
+ return 0; /* More than one branch found, fallback
+ to the standard single-step code. */
+
+ breaks[1] = loc + ALPHA_INSN_SIZE + immediate;
+
+ bc_insn_count++;
+ last_breakpoint++;
+ }
+
+ if (INSN_OPCODE (insn) == stl_c_opcode
+ || INSN_OPCODE (insn) == stq_c_opcode)
+ break;
+ }
+
+ /* Assume that the atomic sequence ends with a STL_C/STQ_C instruction. */
+ if (INSN_OPCODE (insn) != stl_c_opcode
+ && INSN_OPCODE (insn) != stq_c_opcode)
+ return 0;
+
+ closing_insn = loc;
+ loc += ALPHA_INSN_SIZE;
+
+ /* Insert a breakpoint right after the end of the atomic sequence. */
+ breaks[0] = loc;
+
+ /* Check for duplicated breakpoints. Check also for a breakpoint
+ placed (branch instruction's destination) anywhere in sequence. */
+ if (last_breakpoint
+ && (breaks[1] == breaks[0]
+ || (breaks[1] >= pc && breaks[1] <= closing_insn)))
+ last_breakpoint = 0;
+
+ /* Effectively inserts the breakpoints. */
+ for (index = 0; index <= last_breakpoint; index++)
+ insert_single_step_breakpoint (gdbarch, aspace, breaks[index]);
+
+ return 1;
+}
+
\f
/* Figure out where the longjmp will land.
We expect the first arg to be a pointer to the jmp_buf structure from
static int
alpha_get_longjmp_target (struct frame_info *frame, CORE_ADDR *pc)
{
- struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (frame));
+ struct gdbarch *gdbarch = get_frame_arch (frame);
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
CORE_ADDR jb_addr;
gdb_byte raw_buffer[ALPHA_REGISTER_SIZE];
raw_buffer, tdep->jb_elt_size))
return 0;
- *pc = extract_unsigned_integer (raw_buffer, tdep->jb_elt_size);
+ *pc = extract_unsigned_integer (raw_buffer, tdep->jb_elt_size, byte_order);
return 1;
}
};
static struct alpha_sigtramp_unwind_cache *
-alpha_sigtramp_frame_unwind_cache (struct frame_info *next_frame,
+alpha_sigtramp_frame_unwind_cache (struct frame_info *this_frame,
void **this_prologue_cache)
{
struct alpha_sigtramp_unwind_cache *info;
struct gdbarch_tdep *tdep;
if (*this_prologue_cache)
- return *this_prologue_cache;
+ return (struct alpha_sigtramp_unwind_cache *) *this_prologue_cache;
info = FRAME_OBSTACK_ZALLOC (struct alpha_sigtramp_unwind_cache);
*this_prologue_cache = info;
- tdep = gdbarch_tdep (get_frame_arch (next_frame));
- info->sigcontext_addr = tdep->sigcontext_addr (next_frame);
+ tdep = gdbarch_tdep (get_frame_arch (this_frame));
+ info->sigcontext_addr = tdep->sigcontext_addr (this_frame);
return info;
}
frame. This will be used to create a new GDB frame struct. */
static void
-alpha_sigtramp_frame_this_id (struct frame_info *next_frame,
+alpha_sigtramp_frame_this_id (struct frame_info *this_frame,
void **this_prologue_cache,
struct frame_id *this_id)
{
- struct gdbarch *gdbarch = get_frame_arch (next_frame);
+ struct gdbarch *gdbarch = get_frame_arch (this_frame);
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
struct alpha_sigtramp_unwind_cache *info
- = alpha_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache);
+ = alpha_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
CORE_ADDR stack_addr, code_addr;
/* If the OSABI couldn't locate the sigcontext, give up. */
if (tdep->dynamic_sigtramp_offset)
{
int offset;
- code_addr = frame_pc_unwind (next_frame);
- offset = tdep->dynamic_sigtramp_offset (code_addr);
+ code_addr = get_frame_pc (this_frame);
+ offset = tdep->dynamic_sigtramp_offset (gdbarch, code_addr);
if (offset >= 0)
code_addr -= offset;
else
code_addr = 0;
}
else
- code_addr = frame_func_unwind (next_frame, SIGTRAMP_FRAME);
+ code_addr = get_frame_func (this_frame);
/* The stack address is trivially read from the sigcontext. */
stack_addr = alpha_sigtramp_register_address (gdbarch, info->sigcontext_addr,
ALPHA_SP_REGNUM);
- stack_addr = get_frame_memory_unsigned (next_frame, stack_addr,
+ stack_addr = get_frame_memory_unsigned (this_frame, stack_addr,
ALPHA_REGISTER_SIZE);
*this_id = frame_id_build (stack_addr, code_addr);
/* Retrieve the value of REGNUM in FRAME. Don't give up! */
-static void
-alpha_sigtramp_frame_prev_register (struct frame_info *next_frame,
- void **this_prologue_cache,
- int regnum, int *optimizedp,
- enum lval_type *lvalp, CORE_ADDR *addrp,
- int *realnump, gdb_byte *bufferp)
+static struct value *
+alpha_sigtramp_frame_prev_register (struct frame_info *this_frame,
+ void **this_prologue_cache, int regnum)
{
struct alpha_sigtramp_unwind_cache *info
- = alpha_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache);
+ = alpha_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
CORE_ADDR addr;
if (info->sigcontext_addr != 0)
{
/* All integer and fp registers are stored in memory. */
- addr = alpha_sigtramp_register_address (get_frame_arch (next_frame),
+ addr = alpha_sigtramp_register_address (get_frame_arch (this_frame),
info->sigcontext_addr, regnum);
if (addr != 0)
- {
- *optimizedp = 0;
- *lvalp = lval_memory;
- *addrp = addr;
- *realnump = -1;
- if (bufferp != NULL)
- get_frame_memory (next_frame, addr, bufferp, ALPHA_REGISTER_SIZE);
- return;
- }
+ return frame_unwind_got_memory (this_frame, regnum, addr);
}
/* This extra register may actually be in the sigcontext, but our
current description of it in alpha_sigtramp_frame_unwind_cache
doesn't include it. Too bad. Fall back on whatever's in the
outer frame. */
- *optimizedp = 0;
- *lvalp = lval_register;
- *addrp = 0;
- *realnump = regnum;
- if (bufferp)
- frame_unwind_register (next_frame, *realnump, bufferp);
+ return frame_unwind_got_register (this_frame, regnum, regnum);
}
-static const struct frame_unwind alpha_sigtramp_frame_unwind = {
- SIGTRAMP_FRAME,
- alpha_sigtramp_frame_this_id,
- alpha_sigtramp_frame_prev_register
-};
-
-static const struct frame_unwind *
-alpha_sigtramp_frame_sniffer (struct frame_info *next_frame)
+static int
+alpha_sigtramp_frame_sniffer (const struct frame_unwind *self,
+ struct frame_info *this_frame,
+ void **this_prologue_cache)
{
- struct gdbarch *gdbarch = get_frame_arch (next_frame);
- CORE_ADDR pc = frame_pc_unwind (next_frame);
- char *name;
+ struct gdbarch *gdbarch = get_frame_arch (this_frame);
+ CORE_ADDR pc = get_frame_pc (this_frame);
+ const char *name;
/* NOTE: cagney/2004-04-30: Do not copy/clone this code. Instead
look at tramp-frame.h and other simplier per-architecture
/* We shouldn't even bother to try if the OSABI didn't register a
sigcontext_addr handler or pc_in_sigtramp hander. */
if (gdbarch_tdep (gdbarch)->sigcontext_addr == NULL)
- return NULL;
+ return 0;
if (gdbarch_tdep (gdbarch)->pc_in_sigtramp == NULL)
- return NULL;
+ return 0;
/* Otherwise we should be in a signal frame. */
find_pc_partial_function (pc, &name, NULL, NULL);
- if (gdbarch_tdep (gdbarch)->pc_in_sigtramp (pc, name))
- return &alpha_sigtramp_frame_unwind;
+ if (gdbarch_tdep (gdbarch)->pc_in_sigtramp (gdbarch, pc, name))
+ return 1;
- return NULL;
+ return 0;
}
+
+static const struct frame_unwind alpha_sigtramp_frame_unwind = {
+ SIGTRAMP_FRAME,
+ default_frame_unwind_stop_reason,
+ alpha_sigtramp_frame_this_id,
+ alpha_sigtramp_frame_prev_register,
+ NULL,
+ alpha_sigtramp_frame_sniffer
+};
+
\f
/* Heuristic_proc_start may hunt through the text section for a long
time across a 2400 baud serial line. Allows the user to limit this
search. */
-static unsigned int heuristic_fence_post = 0;
+static int heuristic_fence_post = 0;
/* Attempt to locate the start of the function containing PC. We assume that
the previous function ends with an about_to_return insn. Not foolproof by
CORE_ADDR fence = pc - heuristic_fence_post;
CORE_ADDR orig_pc = pc;
CORE_ADDR func;
+ struct inferior *inf;
if (pc == 0)
return 0;
if (func)
return func;
- if (heuristic_fence_post == UINT_MAX
+ if (heuristic_fence_post == -1
|| fence < tdep->vm_min_address)
fence = tdep->vm_min_address;
nops, since this usually indicates padding between functions. */
for (pc -= ALPHA_INSN_SIZE; pc >= fence; pc -= ALPHA_INSN_SIZE)
{
- unsigned int insn = alpha_read_insn (pc);
+ unsigned int insn = alpha_read_insn (gdbarch, pc);
switch (insn)
{
case 0: /* invalid insn */
}
}
+ inf = current_inferior ();
+
/* It's not clear to me why we reach this point when stopping quietly,
but with this test, at least we don't print out warnings for every
child forked (eg, on decstation). 22apr93 rich@cygnus.com. */
- if (stop_soon == NO_STOP_QUIETLY)
+ if (inf->control.stop_soon == NO_STOP_QUIETLY)
{
static int blurb_printed = 0;
if (fence == tdep->vm_min_address)
warning (_("Hit beginning of text section without finding \
-enclosing function for address 0x%s"), paddr_nz (orig_pc));
+enclosing function for address %s"), paddress (gdbarch, orig_pc));
else
warning (_("Hit heuristic-fence-post without finding \
-enclosing function for address 0x%s"), paddr_nz (orig_pc));
+enclosing function for address %s"), paddress (gdbarch, orig_pc));
if (!blurb_printed)
{
int return_reg;
};
+/* If a probing loop sequence starts at PC, simulate it and compute
+ FRAME_SIZE and PC after its execution. Otherwise, return with PC and
+ FRAME_SIZE unchanged. */
+
+static void
+alpha_heuristic_analyze_probing_loop (struct gdbarch *gdbarch, CORE_ADDR *pc,
+ int *frame_size)
+{
+ CORE_ADDR cur_pc = *pc;
+ int cur_frame_size = *frame_size;
+ int nb_of_iterations, reg_index, reg_probe;
+ unsigned int insn;
+
+ /* The following pattern is recognized as a probing loop:
+
+ lda REG_INDEX,NB_OF_ITERATIONS
+ lda REG_PROBE,<immediate>(sp)
+
+ LOOP_START:
+ stq zero,<immediate>(REG_PROBE)
+ subq REG_INDEX,0x1,REG_INDEX
+ lda REG_PROBE,<immediate>(REG_PROBE)
+ bne REG_INDEX, LOOP_START
+
+ lda sp,<immediate>(REG_PROBE)
+
+ If anything different is found, the function returns without
+ changing PC and FRAME_SIZE. Otherwise, PC will point immediately
+ after this sequence, and FRAME_SIZE will be updated. */
+
+ /* lda REG_INDEX,NB_OF_ITERATIONS */
+
+ insn = alpha_read_insn (gdbarch, cur_pc);
+ if (INSN_OPCODE (insn) != lda_opcode)
+ return;
+ reg_index = MEM_RA (insn);
+ nb_of_iterations = MEM_DISP (insn);
+
+ /* lda REG_PROBE,<immediate>(sp) */
+
+ cur_pc += ALPHA_INSN_SIZE;
+ insn = alpha_read_insn (gdbarch, cur_pc);
+ if (INSN_OPCODE (insn) != lda_opcode
+ || MEM_RB (insn) != ALPHA_SP_REGNUM)
+ return;
+ reg_probe = MEM_RA (insn);
+ cur_frame_size -= MEM_DISP (insn);
+
+ /* stq zero,<immediate>(REG_PROBE) */
+
+ cur_pc += ALPHA_INSN_SIZE;
+ insn = alpha_read_insn (gdbarch, cur_pc);
+ if (INSN_OPCODE (insn) != stq_opcode
+ || MEM_RA (insn) != 0x1f
+ || MEM_RB (insn) != reg_probe)
+ return;
+
+ /* subq REG_INDEX,0x1,REG_INDEX */
+
+ cur_pc += ALPHA_INSN_SIZE;
+ insn = alpha_read_insn (gdbarch, cur_pc);
+ if (INSN_OPCODE (insn) != subq_opcode
+ || !OPR_HAS_IMMEDIATE (insn)
+ || OPR_FUNCTION (insn) != subq_function
+ || OPR_LIT(insn) != 1
+ || OPR_RA (insn) != reg_index
+ || OPR_RC (insn) != reg_index)
+ return;
+
+ /* lda REG_PROBE,<immediate>(REG_PROBE) */
+
+ cur_pc += ALPHA_INSN_SIZE;
+ insn = alpha_read_insn (gdbarch, cur_pc);
+ if (INSN_OPCODE (insn) != lda_opcode
+ || MEM_RA (insn) != reg_probe
+ || MEM_RB (insn) != reg_probe)
+ return;
+ cur_frame_size -= MEM_DISP (insn) * nb_of_iterations;
+
+ /* bne REG_INDEX, LOOP_START */
+
+ cur_pc += ALPHA_INSN_SIZE;
+ insn = alpha_read_insn (gdbarch, cur_pc);
+ if (INSN_OPCODE (insn) != bne_opcode
+ || MEM_RA (insn) != reg_index)
+ return;
+
+ /* lda sp,<immediate>(REG_PROBE) */
+
+ cur_pc += ALPHA_INSN_SIZE;
+ insn = alpha_read_insn (gdbarch, cur_pc);
+ if (INSN_OPCODE (insn) != lda_opcode
+ || MEM_RA (insn) != ALPHA_SP_REGNUM
+ || MEM_RB (insn) != reg_probe)
+ return;
+ cur_frame_size -= MEM_DISP (insn);
+
+ *pc = cur_pc;
+ *frame_size = cur_frame_size;
+}
+
static struct alpha_heuristic_unwind_cache *
-alpha_heuristic_frame_unwind_cache (struct frame_info *next_frame,
+alpha_heuristic_frame_unwind_cache (struct frame_info *this_frame,
void **this_prologue_cache,
CORE_ADDR start_pc)
{
- struct gdbarch *gdbarch = get_frame_arch (next_frame);
+ struct gdbarch *gdbarch = get_frame_arch (this_frame);
struct alpha_heuristic_unwind_cache *info;
ULONGEST val;
CORE_ADDR limit_pc, cur_pc;
int frame_reg, frame_size, return_reg, reg;
if (*this_prologue_cache)
- return *this_prologue_cache;
+ return (struct alpha_heuristic_unwind_cache *) *this_prologue_cache;
info = FRAME_OBSTACK_ZALLOC (struct alpha_heuristic_unwind_cache);
*this_prologue_cache = info;
- info->saved_regs = trad_frame_alloc_saved_regs (next_frame);
+ info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
- limit_pc = frame_pc_unwind (next_frame);
+ limit_pc = get_frame_pc (this_frame);
if (start_pc == 0)
start_pc = alpha_heuristic_proc_start (gdbarch, limit_pc);
info->start_pc = start_pc;
for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += ALPHA_INSN_SIZE)
{
- unsigned int word = alpha_read_insn (cur_pc);
+ unsigned int word = alpha_read_insn (gdbarch, cur_pc);
if ((word & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
{
if (word & 0x8000)
{
/* Consider only the first stack allocation instruction
- to contain the static size of the frame. */
+ to contain the static size of the frame. */
if (frame_size == 0)
frame_size = (-word) & 0xffff;
}
So we recognize only a few registers (t7, t9, ra) within
the procedure prologue as valid return address registers.
If we encounter a return instruction, we extract the
- the return address register from it.
+ return address register from it.
FIXME: Rewriting GDB to access the procedure descriptors,
- e.g. via the minimal symbol table, might obviate this hack. */
+ e.g. via the minimal symbol table, might obviate this
+ hack. */
if (return_reg == -1
&& cur_pc < (start_pc + 80)
&& (reg == ALPHA_T7_REGNUM
frame_reg = ALPHA_GCC_FP_REGNUM;
else if (word == 0x47fe040f) /* bis zero,sp,fp */
frame_reg = ALPHA_GCC_FP_REGNUM;
+
+ alpha_heuristic_analyze_probing_loop (gdbarch, &cur_pc, &frame_size);
}
/* If we haven't found a valid return address register yet, keep
{
while (cur_pc < (limit_pc + 80) && cur_pc < (start_pc + 80))
{
- unsigned int word = alpha_read_insn (cur_pc);
+ unsigned int word = alpha_read_insn (gdbarch, cur_pc);
if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
{
return_reg = ALPHA_RA_REGNUM;
info->return_reg = return_reg;
- val = frame_unwind_register_unsigned (next_frame, frame_reg);
+ val = get_frame_register_unsigned (this_frame, frame_reg);
info->vfp = val + frame_size;
/* Convert offsets to absolute addresses. See above about adding
if (trad_frame_addr_p(info->saved_regs, reg))
info->saved_regs[reg].addr += val - 1;
+ /* The stack pointer of the previous frame is computed by popping
+ the current stack frame. */
+ if (!trad_frame_addr_p (info->saved_regs, ALPHA_SP_REGNUM))
+ trad_frame_set_value (info->saved_regs, ALPHA_SP_REGNUM, info->vfp);
+
return info;
}
frame. This will be used to create a new GDB frame struct. */
static void
-alpha_heuristic_frame_this_id (struct frame_info *next_frame,
- void **this_prologue_cache,
- struct frame_id *this_id)
+alpha_heuristic_frame_this_id (struct frame_info *this_frame,
+ void **this_prologue_cache,
+ struct frame_id *this_id)
{
struct alpha_heuristic_unwind_cache *info
- = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
+ = alpha_heuristic_frame_unwind_cache (this_frame, this_prologue_cache, 0);
*this_id = frame_id_build (info->vfp, info->start_pc);
}
/* Retrieve the value of REGNUM in FRAME. Don't give up! */
-static void
-alpha_heuristic_frame_prev_register (struct frame_info *next_frame,
- void **this_prologue_cache,
- int regnum, int *optimizedp,
- enum lval_type *lvalp, CORE_ADDR *addrp,
- int *realnump, gdb_byte *bufferp)
+static struct value *
+alpha_heuristic_frame_prev_register (struct frame_info *this_frame,
+ void **this_prologue_cache, int regnum)
{
struct alpha_heuristic_unwind_cache *info
- = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
+ = alpha_heuristic_frame_unwind_cache (this_frame, this_prologue_cache, 0);
/* The PC of the previous frame is stored in the link register of
the current frame. Frob regnum so that we pull the value from
if (regnum == ALPHA_PC_REGNUM)
regnum = info->return_reg;
- trad_frame_get_prev_register (next_frame, info->saved_regs, regnum,
- optimizedp, lvalp, addrp, realnump, bufferp);
+ return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum);
}
static const struct frame_unwind alpha_heuristic_frame_unwind = {
NORMAL_FRAME,
+ default_frame_unwind_stop_reason,
alpha_heuristic_frame_this_id,
- alpha_heuristic_frame_prev_register
+ alpha_heuristic_frame_prev_register,
+ NULL,
+ default_frame_sniffer
};
-static const struct frame_unwind *
-alpha_heuristic_frame_sniffer (struct frame_info *next_frame)
-{
- return &alpha_heuristic_frame_unwind;
-}
-
static CORE_ADDR
-alpha_heuristic_frame_base_address (struct frame_info *next_frame,
+alpha_heuristic_frame_base_address (struct frame_info *this_frame,
void **this_prologue_cache)
{
struct alpha_heuristic_unwind_cache *info
- = alpha_heuristic_frame_unwind_cache (next_frame, this_prologue_cache, 0);
+ = alpha_heuristic_frame_unwind_cache (this_frame, this_prologue_cache, 0);
return info->vfp;
}
breakpoint. */
static struct frame_id
-alpha_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
+alpha_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
{
ULONGEST base;
- base = frame_unwind_register_unsigned (next_frame, ALPHA_SP_REGNUM);
- return frame_id_build (base, frame_pc_unwind (next_frame));
+ base = get_frame_register_unsigned (this_frame, ALPHA_SP_REGNUM);
+ return frame_id_build (base, get_frame_pc (this_frame));
}
static CORE_ADDR
alpha_supply_int_regs (struct regcache *regcache, int regno,
const void *r0_r30, const void *pc, const void *unique)
{
- const gdb_byte *regs = r0_r30;
+ const gdb_byte *regs = (const gdb_byte *) r0_r30;
int i;
for (i = 0; i < 31; ++i)
regcache_raw_supply (regcache, i, regs + i * 8);
if (regno == ALPHA_ZERO_REGNUM || regno == -1)
- regcache_raw_supply (regcache, ALPHA_ZERO_REGNUM, NULL);
+ {
+ const gdb_byte zero[8] = { 0 };
+
+ regcache_raw_supply (regcache, ALPHA_ZERO_REGNUM, zero);
+ }
if (regno == ALPHA_PC_REGNUM || regno == -1)
regcache_raw_supply (regcache, ALPHA_PC_REGNUM, pc);
alpha_fill_int_regs (const struct regcache *regcache,
int regno, void *r0_r30, void *pc, void *unique)
{
- gdb_byte *regs = r0_r30;
+ gdb_byte *regs = (gdb_byte *) r0_r30;
int i;
for (i = 0; i < 31; ++i)
alpha_supply_fp_regs (struct regcache *regcache, int regno,
const void *f0_f30, const void *fpcr)
{
- const gdb_byte *regs = f0_f30;
+ const gdb_byte *regs = (const gdb_byte *) f0_f30;
int i;
for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i)
alpha_fill_fp_regs (const struct regcache *regcache,
int regno, void *f0_f30, void *fpcr)
{
- gdb_byte *regs = f0_f30;
+ gdb_byte *regs = (gdb_byte *) f0_f30;
int i;
for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i)
static CORE_ADDR
alpha_next_pc (struct frame_info *frame, CORE_ADDR pc)
{
+ struct gdbarch *gdbarch = get_frame_arch (frame);
unsigned int insn;
unsigned int op;
int regno;
int offset;
LONGEST rav;
- insn = alpha_read_insn (pc);
+ insn = alpha_read_insn (gdbarch, pc);
- /* Opcode is top 6 bits. */
+ /* Opcode is top 6 bits. */
op = (insn >> 26) & 0x3f;
if (op == 0x1a)
{
/* Branch format: target PC is:
(new PC) + (4 * sext(displacement)) */
- if (op == 0x30 || /* BR */
- op == 0x34) /* BSR */
+ if (op == 0x30 /* BR */
+ || op == 0x34) /* BSR */
{
branch_taken:
offset = (insn & 0x001fffff);
case 0x33: /* FBLE */
case 0x32: /* FBLT */
case 0x35: /* FBNE */
- regno += gdbarch_fp0_regnum (get_frame_arch (frame));
+ regno += gdbarch_fp0_regnum (gdbarch);
}
rav = get_frame_register_signed (frame, regno);
int
alpha_software_single_step (struct frame_info *frame)
{
+ struct gdbarch *gdbarch = get_frame_arch (frame);
+ struct address_space *aspace = get_frame_address_space (frame);
CORE_ADDR pc, next_pc;
pc = get_frame_pc (frame);
next_pc = alpha_next_pc (frame, pc);
- insert_single_step_breakpoint (next_pc);
+ insert_single_step_breakpoint (gdbarch, aspace, next_pc);
return 1;
}
struct gdbarch_tdep *tdep;
struct gdbarch *gdbarch;
- /* Try to determine the ABI of the object we are loading. */
- if (info.abfd != NULL && info.osabi == GDB_OSABI_UNKNOWN)
- {
- /* If it's an ECOFF file, assume it's OSF/1. */
- if (bfd_get_flavour (info.abfd) == bfd_target_ecoff_flavour)
- info.osabi = GDB_OSABI_OSF1;
- }
-
/* Find a candidate among extant architectures. */
arches = gdbarch_list_lookup_by_info (arches, &info);
if (arches != NULL)
return arches->gdbarch;
- tdep = xmalloc (sizeof (struct gdbarch_tdep));
+ tdep = XNEW (struct gdbarch_tdep);
gdbarch = gdbarch_alloc (&info, tdep);
/* Lowest text address. This is used by heuristic_proc_start()
tdep->sc_regs_offset = 4 * 8;
tdep->sc_fpregs_offset = tdep->sc_regs_offset + 32 * 8 + 8;
- tdep->jb_pc = -1; /* longjmp support not enabled by default */
+ tdep->jb_pc = -1; /* longjmp support not enabled by default. */
tdep->return_in_memory = alpha_return_in_memory_always;
set_gdbarch_push_dummy_call (gdbarch, alpha_push_dummy_call);
/* Methods for saving / extracting a dummy frame's ID. */
- set_gdbarch_unwind_dummy_id (gdbarch, alpha_unwind_dummy_id);
+ set_gdbarch_dummy_id (gdbarch, alpha_dummy_id);
/* Return the unwound PC value. */
set_gdbarch_unwind_pc (gdbarch, alpha_unwind_pc);
set_gdbarch_decr_pc_after_break (gdbarch, ALPHA_INSN_SIZE);
set_gdbarch_cannot_step_breakpoint (gdbarch, 1);
+ /* Handles single stepping of atomic sequences. */
+ set_gdbarch_software_single_step (gdbarch, alpha_deal_with_atomic_sequence);
+
/* Hook in ABI-specific overrides, if they have been registered. */
gdbarch_init_osabi (info, gdbarch);
if (tdep->jb_pc >= 0)
set_gdbarch_get_longjmp_target (gdbarch, alpha_get_longjmp_target);
- frame_unwind_append_sniffer (gdbarch, alpha_sigtramp_frame_sniffer);
- frame_unwind_append_sniffer (gdbarch, alpha_heuristic_frame_sniffer);
+ frame_unwind_append_unwinder (gdbarch, &alpha_sigtramp_frame_unwind);
+ frame_unwind_append_unwinder (gdbarch, &alpha_heuristic_frame_unwind);
frame_base_set_default (gdbarch, &alpha_heuristic_frame_base);
void
alpha_dwarf2_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
{
- frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer);
+ dwarf2_append_unwinders (gdbarch);
frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
}
program for the start of a function. This command sets the distance of the\n\
search. The only need to set it is when debugging a stripped executable."),
reinit_frame_cache_sfunc,
- NULL, /* FIXME: i18n: The distance searched for the start of a function is \"%d\". */
+ NULL, /* FIXME: i18n: The distance searched for
+ the start of a function is \"%d\". */
&setlist, &showlist);
}
projects / thirdparty / binutils-gdb.git / blobdiff