#include <sys/procfs.h>
#include <sys/ptrace.h>
-/* Prototypes for supply_gregset etc. */
+/* Prototypes for supply_gregset etc. */
#include "gregset.h"
#include "ppc-tdep.h"
#include "ppc-linux-tdep.h"
struct ppc_debug_info
{
- uint32_t version; /* Only version 1 exists to date */
+ uint32_t version; /* Only version 1 exists to date. */
uint32_t num_instruction_bps;
uint32_t num_data_bps;
uint32_t num_condition_regs;
uint32_t data_bp_alignment;
- uint32_t sizeof_condition; /* size of the DVC register */
+ uint32_t sizeof_condition; /* size of the DVC register. */
uint64_t features;
};
There are 32 vector registers 16 bytes longs, plus a VSCR register
which is only 4 bytes long, but is fetched as a 16 bytes
- quantity. Up to here we have the elf_vrregset_t structure.
+ quantity. Up to here we have the elf_vrregset_t structure.
Appended to this there is space for the VRSAVE register: 4 bytes.
Even though this vrsave register is not included in the regset
typedef, it is handled by the ptrace requests.
PT_R8, PT_R9, PT_R10, PT_R11, PT_R12, PT_R13, PT_R14, PT_R15,
PT_R16, PT_R17, PT_R18, PT_R19, PT_R20, PT_R21, PT_R22, PT_R23,
PT_R24, PT_R25, PT_R26, PT_R27, PT_R28, PT_R29, PT_R30, PT_R31,
-PT_FPR0, PT_FPR0 + 2, PT_FPR0 + 4, PT_FPR0 + 6, PT_FPR0 + 8, PT_FPR0 + 10, PT_FPR0 + 12, PT_FPR0 + 14,
-PT_FPR0 + 16, PT_FPR0 + 18, PT_FPR0 + 20, PT_FPR0 + 22, PT_FPR0 + 24, PT_FPR0 + 26, PT_FPR0 + 28, PT_FPR0 + 30,
-PT_FPR0 + 32, PT_FPR0 + 34, PT_FPR0 + 36, PT_FPR0 + 38, PT_FPR0 + 40, PT_FPR0 + 42, PT_FPR0 + 44, PT_FPR0 + 46,
-PT_FPR0 + 48, PT_FPR0 + 50, PT_FPR0 + 52, PT_FPR0 + 54, PT_FPR0 + 56, PT_FPR0 + 58, PT_FPR0 + 60, PT_FPR0 + 62,
+PT_FPR0, PT_FPR0 + 2, PT_FPR0 + 4, PT_FPR0 + 6,
+PT_FPR0 + 8, PT_FPR0 + 10, PT_FPR0 + 12, PT_FPR0 + 14,
+PT_FPR0 + 16, PT_FPR0 + 18, PT_FPR0 + 20, PT_FPR0 + 22,
+PT_FPR0 + 24, PT_FPR0 + 26, PT_FPR0 + 28, PT_FPR0 + 30,
+PT_FPR0 + 32, PT_FPR0 + 34, PT_FPR0 + 36, PT_FPR0 + 38,
+PT_FPR0 + 40, PT_FPR0 + 42, PT_FPR0 + 44, PT_FPR0 + 46,
+PT_FPR0 + 48, PT_FPR0 + 50, PT_FPR0 + 52, PT_FPR0 + 54,
+PT_FPR0 + 56, PT_FPR0 + 58, PT_FPR0 + 60, PT_FPR0 + 62,
PT_NIP, PT_MSR, PT_CCR, PT_LNK, PT_CTR, PT_XER, PT_MQ */
/* *INDENT_ON * */
interface, and not the wordsize of the program's ABI. */
int wordsize = sizeof (long);
- /* General purpose registers occupy 1 slot each in the buffer */
+ /* General purpose registers occupy 1 slot each in the buffer. */
if (regno >= tdep->ppc_gp0_regnum
&& regno < tdep->ppc_gp0_regnum + ppc_num_gprs)
u_addr = ((regno - tdep->ppc_gp0_regnum + PT_R0) * wordsize);
&& regno < tdep->ppc_fp0_regnum + ppc_num_fprs)
u_addr = (PT_FPR0 * wordsize) + ((regno - tdep->ppc_fp0_regnum) * 8);
- /* UISA special purpose registers: 1 slot each */
+ /* UISA special purpose registers: 1 slot each. */
if (regno == gdbarch_pc_regnum (gdbarch))
u_addr = PT_NIP * wordsize;
if (regno == tdep->ppc_lr_regnum)
offset = vrregsize - register_size (gdbarch, tdep->ppc_vrsave_regnum);
regcache_raw_supply (regcache, regno,
- regs + (regno - tdep->ppc_vr0_regnum) * vrregsize + offset);
+ regs + (regno
+ - tdep->ppc_vr0_regnum) * vrregsize + offset);
}
/* Fetch the top 32 bits of TID's general-purpose registers and the
/* This isn't really an address. But ptrace thinks of it as one. */
CORE_ADDR regaddr = ppc_register_u_addr (gdbarch, regno);
int bytes_transferred;
- unsigned int offset; /* Offset of registers within the u area. */
+ unsigned int offset; /* Offset of registers within the u area. */
char buf[MAX_REGISTER_SIZE];
if (altivec_register_p (gdbarch, regno))
ppc_linux_fetch_inferior_registers (struct target_ops *ops,
struct regcache *regcache, int regno)
{
- /* Overload thread id onto process id */
+ /* Overload thread id onto process id. */
int tid = TIDGET (inferior_ptid);
- /* No thread id, just use process id */
+ /* No thread id, just use process id. */
if (tid == 0)
tid = PIDGET (inferior_ptid);
fetch_register (regcache, tid, regno);
}
-/* Store one VSX register. */
+/* Store one VSX register. */
static void
store_vsx_register (const struct regcache *regcache, int tid, int regno)
{
perror_with_name (_("Unable to store VSX register"));
}
-/* Store one register. */
+/* Store one register. */
static void
store_altivec_register (const struct regcache *regcache, int tid, int regno)
{
offset = vrregsize - register_size (gdbarch, tdep->ppc_vrsave_regnum);
regcache_raw_collect (regcache, regno,
- regs + (regno - tdep->ppc_vr0_regnum) * vrregsize + offset);
+ regs + (regno
+ - tdep->ppc_vr0_regnum) * vrregsize + offset);
ret = ptrace (PTRACE_SETVRREGS, tid, 0, ®s);
if (ret < 0)
{
have_ptrace_booke_interface = 1;
max_slots_number = booke_debug_info.num_instruction_bps
- + booke_debug_info.num_data_bps + booke_debug_info.num_condition_regs;
+ + booke_debug_info.num_data_bps
+ + booke_debug_info.num_condition_regs;
}
else
{
int tid;
ptid_t ptid = inferior_ptid;
- /* We need to know whether ptrace supports PTRACE_SET_DEBUGREG and whether
- the target has DABR. If either answer is no, the ptrace call will
- return -1. Fail in that case. */
+ /* We need to know whether ptrace supports PTRACE_SET_DEBUGREG
+ and whether the target has DABR. If either answer is no, the
+ ptrace call will return -1. Fail in that case. */
tid = TIDGET (ptid);
if (tid == 0)
tid = PIDGET (ptid);
if (alloc_new)
{
t = xmalloc (sizeof (struct thread_points));
- t->hw_breaks = xzalloc (max_slots_number * sizeof (struct hw_break_tuple));
+ t->hw_breaks
+ = xzalloc (max_slots_number * sizeof (struct hw_break_tuple));
t->tid = tid;
VEC_safe_push (thread_points_p, ppc_threads, t);
}
errno = 0;
if (ptrace (PPC_PTRACE_DELHWDEBUG, tid, 0, hw_breaks[i].slot) < 0)
if (errno != ENOENT)
- perror_with_name (_("Unexpected error deleting breakpoint or watchpoint"));
+ perror_with_name (_("Unexpected error deleting "
+ "breakpoint or watchpoint"));
xfree (hw_breaks[i].hw_break);
hw_breaks[i].hw_break = NULL;
*condition_mode = PPC_BREAKPOINT_CONDITION_AND;
for (i = 0; i < num_byte_enable; i++)
- *condition_mode |= PPC_BREAKPOINT_CONDITION_BE (i + rightmost_enabled_byte);
+ *condition_mode
+ |= PPC_BREAKPOINT_CONDITION_BE (i + rightmost_enabled_byte);
/* Now we need to match the position within the DVC of the comparison
value with where the watch region is relative to the window
if (!value_lazy (v))
found_memory_cnt++;
}
- /* Other kinds of values are not fine. */
+ /* Other kinds of values are not fine. */
else
return -1;
}
if (VEC_empty (thread_points_p, ppc_threads))
return;
- /* Get a list of breakpoints from any thread. */
+ /* Get a list of breakpoints from any thread. */
p = VEC_last (thread_points_p, ppc_threads);
hw_breaks = p->hw_breaks;
- /* Copy that thread's breakpoints and watchpoints to the new thread. */
+ /* Copy that thread's breakpoints and watchpoints to the new thread. */
for (i = 0; i < max_slots_number; i++)
if (hw_breaks[i].hw_break)
booke_insert_point (hw_breaks[i].hw_break, tid);
addr &= ~mask;
- /* Check whether [start, start+length-1] intersects [addr, addr+mask]. */
+ /* Check whether [start, start+length-1] intersects [addr, addr+mask]. */
return start <= addr + mask && start + length - 1 >= addr;
}
ppc_linux_store_inferior_registers (struct target_ops *ops,
struct regcache *regcache, int regno)
{
- /* Overload thread id onto process id */
+ /* Overload thread id onto process id. */
int tid = TIDGET (inferior_ptid);
- /* No thread id, just use process id */
+ /* No thread id, just use process id. */
if (tid == 0)
tid = PIDGET (inferior_ptid);
/* Functions for transferring registers between a gregset_t or fpregset_t
(see sys/ucontext.h) and gdb's regcache. The word size is that used
- by the ptrace interface, not the current program's ABI. eg. If a
+ by the ptrace interface, not the current program's ABI. Eg. if a
powerpc64-linux gdb is being used to debug a powerpc32-linux app, we
read or write 64-bit gregsets. This is to suit the host libthread_db. */
}
/* Power ISA 2.05 (implemented by Power 6 and newer processors) increases
- the FPSCR from 32 bits to 64 bits. Even though Power 7 supports this
+ the FPSCR from 32 bits to 64 bits. Even though Power 7 supports this
ISA version, it doesn't have PPC_FEATURE_ARCH_2_05 set, only
PPC_FEATURE_ARCH_2_06. Since for now the only bits used in the higher
half of the register are for Decimal Floating Point, we check if that
else if (vsx)
return isa205? tdesc_powerpc_isa205_vsx64l : tdesc_powerpc_vsx64l;
else if (altivec)
- return isa205? tdesc_powerpc_isa205_altivec64l : tdesc_powerpc_altivec64l;
+ return isa205
+ ? tdesc_powerpc_isa205_altivec64l : tdesc_powerpc_altivec64l;
return isa205? tdesc_powerpc_isa205_64l : tdesc_powerpc_64l;
}
t->to_stopped_by_watchpoint = ppc_linux_stopped_by_watchpoint;
t->to_stopped_data_address = ppc_linux_stopped_data_address;
t->to_watchpoint_addr_within_range = ppc_linux_watchpoint_addr_within_range;
- t->to_can_accel_watchpoint_condition = ppc_linux_can_accel_watchpoint_condition;
+ t->to_can_accel_watchpoint_condition
+ = ppc_linux_can_accel_watchpoint_condition;
t->to_read_description = ppc_linux_read_description;
t->to_auxv_parse = ppc_linux_auxv_parse;
projects / thirdparty / binutils-gdb.git / blobdiff