/* This file is part of the program psim.
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
+ Copyright 1994, 1995, 2002 Andrew Cagney <cagney@highland.com.au>
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
+ the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ along with this program; if not, see <http://www.gnu.org/licenses/>.
*/
#ifndef _PSIM_CONFIG_H_
#define _PSIM_CONFIG_H_
+#include "bfd.h"
/* endianness of the host/target:
of the host/target it is able to eliminate slower generic endian
handling code.
- Possible values are 0 (unknown), LITTLE_ENDIAN, BIG_ENDIAN */
+ Possible values are BFD_ENDIAN_UNKNOWN, BFD_ENDIAN_LITTLE,
+ BFD_ENDIAN_BIG. */
-#ifndef WITH_HOST_BYTE_ORDER
-#define WITH_HOST_BYTE_ORDER 0 /*unknown*/
+#ifdef WORDS_BIGENDIAN
+# define HOST_BYTE_ORDER BFD_ENDIAN_BIG
+#else
+# define HOST_BYTE_ORDER BFD_ENDIAN_LITTLE
#endif
#ifndef WITH_TARGET_BYTE_ORDER
-#define WITH_TARGET_BYTE_ORDER 0 /*unknown*/
+#define WITH_TARGET_BYTE_ORDER BFD_ENDIAN_UNKNOWN
#endif
-extern int current_host_byte_order;
-#define CURRENT_HOST_BYTE_ORDER (WITH_HOST_BYTE_ORDER \
- ? WITH_HOST_BYTE_ORDER \
- : current_host_byte_order)
-extern int current_target_byte_order;
-#define CURRENT_TARGET_BYTE_ORDER (WITH_TARGET_BYTE_ORDER \
- ? WITH_TARGET_BYTE_ORDER \
- : current_target_byte_order)
+extern enum bfd_endian current_target_byte_order;
+#define CURRENT_TARGET_BYTE_ORDER \
+ (WITH_TARGET_BYTE_ORDER != BFD_ENDIAN_UNKNOWN \
+ ? WITH_TARGET_BYTE_ORDER : current_target_byte_order)
/* PowerPC XOR endian.
#endif
-/* Intel host BSWAP support:
-
- Whether to use bswap on the 486 and pentiums rather than the 386
- sequence that uses xchgb/rorl/xchgb */
-#ifndef WITH_BSWAP
-#define WITH_BSWAP 0
-#endif
-
-
/* SMP support:
Sets a limit on the number of processors that can be simulated. If
CURRENT_ENVIRONMENT specifies which of vea or oea is required for
the current runtime. */
+#define ALL_ENVIRONMENT 0
#define USER_ENVIRONMENT 1
#define VIRTUAL_ENVIRONMENT 2
#define OPERATING_ENVIRONMENT 3
-#ifndef WITH_ENVIRONMENT
-#define WITH_ENVIRONMENT 0
-#endif
-
extern int current_environment;
#define CURRENT_ENVIRONMENT (WITH_ENVIRONMENT \
? WITH_ENVIRONMENT \
Control the inclusion of debugging code. */
-/* Include the tracing code. Disabling this eliminates all tracing
- code */
-
-#ifndef WITH_TRACE
-#define WITH_TRACE 1
-#endif
-
-/* include code that checks assertions scattered through out the
- program */
-
-#ifndef WITH_ASSERT
-#define WITH_ASSERT 1
-#endif
-
/* Whether to check instructions for reserved bits being set */
#ifndef WITH_RESERVED_BITS
#define DONT_USE_STDIO 2
#define DO_USE_STDIO 1
-#ifndef WITH_STDIO
-#define WITH_STDIO 0
-#endif
-
extern int current_stdio;
#define CURRENT_STDIO (WITH_STDIO \
? WITH_STDIO \
to both eliminate the overhead of function calls and (as a
consequence) also eliminate further dead code.
- On a CISC (x86) I've found that I can achieve an order of magintude
+ On a CISC (x86) I've found that I can achieve an order of magnitude
speed improvement (x3-x5). In the case of RISC (sparc) while the
performance gain isn't as great it is still significant.
the module is included into a file being compiled, calls to
its funtions can be eliminated. 2 implies 1.
- INLINE_LOCALS:
+ PSIM_INLINE_LOCALS:
Make internal (static) functions within the module `inline'.
INCLUDE_MODULE == (REVEAL_MODULE | INLINE_MODULE)
- ALL_INLINE == (REVEAL_MODULE | INLINE_MODULE | INLINE_LOCALS)
+ ALL_INLINE == (REVEAL_MODULE | INLINE_MODULE | PSIM_INLINE_LOCALS)
In addition to this, modules have been put into two categories.
local function.
Because of the way that GCC parses __attribute__(), the macro's
- need to be adjacent to the functioin name rather then at the start
+ need to be adjacent to the function name rather than at the start
of the line vis:
int STATIC_INLINE_MODULE f(void);
#define REVEAL_MODULE 1
#define INLINE_MODULE 2
#define INCLUDE_MODULE (INLINE_MODULE | REVEAL_MODULE)
-#define INLINE_LOCALS 4
+#define PSIM_INLINE_LOCALS 4
#define ALL_INLINE 7
/* Your compilers inline reserved word */
#endif
-/* Your compilers pass parameters in registers reserved word */
-
-#ifndef WITH_REGPARM
-#define WITH_REGPARM 0
-#endif
-
-/* Your compilers use an alternative calling sequence reserved word */
-
-#ifndef WITH_STDCALL
-#define WITH_STDCALL 0
-#endif
-
-#if !defined REGPARM
-#if defined(__GNUC__) && (defined(__i386__) || defined(__i486__) || defined(__i586__) || defined(__i686__))
-#if (WITH_REGPARM && WITH_STDCALL)
-#define REGPARM __attribute__((__regparm__(WITH_REGPARM),__stdcall__))
-#else
-#if (WITH_REGPARM && !WITH_STDCALL)
-#define REGPARM __attribute__((__regparm__(WITH_REGPARM)))
-#else
-#if (!WITH_REGPARM && WITH_STDCALL)
-#define REGPARM __attribute__((__stdcall__))
-#endif
-#endif
-#endif
-#endif
-#endif
-
-#if !defined REGPARM
-#define REGPARM
-#endif
-
-
-
/* Default prefix for static functions */
#ifndef STATIC_INLINE
/* Default macro to simplify control several of key the inlines */
#ifndef DEFAULT_INLINE
-#define DEFAULT_INLINE INLINE_LOCALS
+#define DEFAULT_INLINE PSIM_INLINE_LOCALS
#endif
/* Code that converts between hosts and target byte order. Used on
a jump table. */
#ifndef DEVICE_INLINE
-#define DEVICE_INLINE (DEFAULT_INLINE ? INLINE_LOCALS : 0)
+#define DEVICE_INLINE (DEFAULT_INLINE ? PSIM_INLINE_LOCALS : 0)
#endif
/* Code called used while the device tree is being built.
Inlining this is of no benefit */
#ifndef TREE_INLINE
-#define TREE_INLINE (DEFAULT_INLINE ? INLINE_LOCALS : 0)
+#define TREE_INLINE (DEFAULT_INLINE ? PSIM_INLINE_LOCALS : 0)
#endif
/* Code called whenever information on a Special Purpose Register is
code is reduced. */
#ifndef SUPPORT_INLINE
-#define SUPPORT_INLINE INLINE_LOCALS
+#define SUPPORT_INLINE PSIM_INLINE_LOCALS
#endif
/* Model specific code used in simulating functional units. Note, it actaully
into this file */
#ifndef IDECOCE_INLINE
-#define IDECODE_INLINE INLINE_LOCALS
+#define IDECODE_INLINE PSIM_INLINE_LOCALS
#endif
/* psim, isn't actually inlined */
#ifndef PSIM_INLINE
-#define PSIM_INLINE INLINE_LOCALS
+#define PSIM_INLINE PSIM_INLINE_LOCALS
#endif
/* Code to emulate os or rom compatibility. This code is called via a