/* This file is part of the program psim.
- Copyright (C) 1994-1995, Andrew Cagney <cagney@highland.com.au>
+ Copyright 1994, 1995, 2002 Andrew Cagney <cagney@highland.com.au>
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
+ the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ along with this program; if not, see <http://www.gnu.org/licenses/>.
*/
-#ifndef _CONFIG_H_
-#define _CONFIG_H_
+#ifndef _PSIM_CONFIG_H_
+#define _PSIM_CONFIG_H_
/* endianness of the host/target:
: current_target_byte_order)
-/* Intel host BSWAP support:
+/* PowerPC XOR endian.
- Whether to use bswap on the 486 and pentiums rather than the 386
- sequence that uses xchgb/rorl/xchgb */
-#ifndef WITH_BSWAP
-#define WITH_BSWAP 0
+ In addition to the above, the simulator can support the PowerPC's
+ horrible XOR endian mode. This feature makes it possible to
+ control the endian mode of a processor using the MSR. */
+
+#ifndef WITH_XOR_ENDIAN
+#define WITH_XOR_ENDIAN 8
#endif
/options/smp@<nr-cpu> */
#ifndef WITH_SMP
-#define WITH_SMP 2
+#define WITH_SMP 5
#endif
#if WITH_SMP
#define MAX_NR_PROCESSORS WITH_SMP
#define WITH_ASSERT 1
#endif
+/* Whether to check instructions for reserved bits being set */
+
+#ifndef WITH_RESERVED_BITS
+#define WITH_RESERVED_BITS 1
+#endif
+
/* include monitoring code */
#define MONITOR_INSTRUCTION_ISSUE 1
| MONITOR_INSTRUCTION_ISSUE)
#endif
+/* Current CPU model (models are in the generated models.h include file) */
+#ifndef WITH_MODEL
+#define WITH_MODEL 0
+#endif
-/* Include code that simulates function units to model particular
- machines more closely and provide more detailed information about
- optimization potential. */
+#define CURRENT_MODEL (WITH_MODEL \
+ ? WITH_MODEL \
+ : current_model)
-#ifndef WITH_FUNCTION_UNIT
-#define WITH_FUNCTION_UNIT 1
+#ifndef WITH_DEFAULT_MODEL
+#define WITH_DEFAULT_MODEL DEFAULT_MODEL
#endif
-/* Which specific processor to model */
-typedef enum _ppc_model {
- PPC_MODEL_UNKNOWN,
- PPC_MODEL_601,
- PPC_MODEL_602,
- PPC_MODEL_603,
- PPC_MODEL_603e,
- PPC_MODEL_604,
- PPC_MODEL_403,
- PPC_MODEL_505,
- PPC_MODEL_821,
- PPC_MODEL_860
-} ppc_model;
+#define MODEL_ISSUE_IGNORE (-1)
+#define MODEL_ISSUE_PROCESS 1
-#ifndef WITH_DEFAULT_PPC_MODEL
-#define WITH_DEFAULT_PPC_MODEL PPC_MODEL_603e
+#ifndef WITH_MODEL_ISSUE
+#define WITH_MODEL_ISSUE 0
#endif
-extern ppc_model current_ppc_model;
+extern int current_model_issue;
+#define CURRENT_MODEL_ISSUE (WITH_MODEL_ISSUE \
+ ? WITH_MODEL_ISSUE \
+ : current_model_issue)
-#ifndef WITH_PPC_MODEL
-#define WITH_PPC_MODEL 0
+/* Whether or not input/output just uses stdio, or uses printf_filtered for
+ output, and polling input for input. */
+
+#define DONT_USE_STDIO 2
+#define DO_USE_STDIO 1
+
+#ifndef WITH_STDIO
+#define WITH_STDIO 0
#endif
-#define CURRENT_PPC_MODEL (WITH_PPC_MODEL \
- ? WITH_PPC_MODEL \
- : current_ppc_model)
+extern int current_stdio;
+#define CURRENT_STDIO (WITH_STDIO \
+ ? WITH_STDIO \
+ : current_stdio)
+
+
/* INLINE CODE SELECTION:
GCC -O3 attempts to inline any function or procedure in scope. The
options below facilitate fine grained control over what is and what
isn't made inline. For instance it can control things down to a
- specific modules static routines. This control is implemented in
- two parts. Doing this allows the compiler to both eliminate the
- overhead of function calls and (as a consequence) also eliminate
- further dead code.
+ specific modules static routines. Doing this allows the compiler
+ to both eliminate the overhead of function calls and (as a
+ consequence) also eliminate further dead code.
+
+ On a CISC (x86) I've found that I can achieve an order of magnitude
+ speed improvement (x3-x5). In the case of RISC (sparc) while the
+ performance gain isn't as great it is still significant.
+
+ Each module is controled by the macro <module>_INLINE which can
+ have the values described below
+
+ 0 Do not inline any thing for the given module
+
+ The following additional values are `bit fields' and can be
+ combined.
+
+ REVEAL_MODULE:
+
+ Include the C file for the module into the file being compiled
+ but do not make the functions within the module inline.
+
+ While of no apparent benefit, this makes it possible for the
+ included module, when compiled to inline its calls to what
+ would otherwize be external functions.
+
+ INLINE_MODULE:
+
+ Make external functions within the module `inline'. Thus if
+ the module is included into a file being compiled, calls to
+ its funtions can be eliminated. 2 implies 1.
+
+ PSIM_INLINE_LOCALS:
+
+ Make internal (static) functions within the module `inline'.
+
+ The following abreviations are available:
+
+ INCLUDE_MODULE == (REVEAL_MODULE | INLINE_MODULE)
+
+ ALL_INLINE == (REVEAL_MODULE | INLINE_MODULE | PSIM_INLINE_LOCALS)
+
+ In addition to this, modules have been put into two categories.
+
+ Simple modules - eg sim-endian.h bits.h
+
+ Because these modules are small and simple and do not have
+ any complex interpendencies they are configured, if
+ <module>_INLINE is so enabled, to inline themselves in all
+ modules that include those files.
+
+ For the default build, this is a real win as all byte
+ conversion and bit manipulation functions are inlined.
+
+ Complex modules - the rest
+
+ These are all handled using the files inline.h and inline.c.
+ psim.c includes the above which in turn include any remaining
+ code.
+
+ IMPLEMENTATION:
+
+ The inline ability is enabled by prefixing every data / function
+ declaration and definition with one of the following:
+
+
+ INLINE_<module>
+
+ Prefix to any global function that is a candidate for being
+ inline.
+
+ values - `', `static', `static INLINE'
+
+
+ EXTERN_<module>
+
+ Prefix to any global data structures for the module. Global
+ functions that are not to be inlined shall also be prefixed
+ with this.
- Experementing with CISC (x86) I've found that I can achieve an
- order of magintude speed improvement (x3-x5). In the case of RISC
- (sparc) while the performance gain isn't as great it is still
- significant.
+ values - `', `static', `static'
- Part One - Static functions: It is possible to control how static
- functions within each module are to be compiled. On a per module
- or global basis, it is possible to specify that a modules static
- functions should be compiled inline. This is controled by the the
- macro's STATIC_INLINE and INLINE_STATIC_<module>.
- Part Two - External functions: Again it is possible to allow the
- inlining of calls to external functions. This is far more
- complicated and much heaver on the compiler. In this case, it is
- controled by the <module>_INLINE macro's. Where each can have a
- value:
+ STATIC_INLINE_<module>
- 0 Make a normal external call to functions in the module.
+ Prefix to any local (static) function that is a candidate for
+ being made inline.
- 1 Include the module but to not inline functions within it.
- This allows functions within the module to inline functions
- from other modules that have been included.
+ values - `static', `static INLINE'
- 2 Both include the module and inline functions contained within
- it.
- Finally, this is not for the faint harted. I've seen GCC get up to
- 200mb trying to compile what this can create */
+ static
+
+ Prefix all local data structures. Local functions that are not
+ to be inlined shall also be prefixed with this.
+
+ values - `static', `static'
+
+ nb: will not work for modules that are being inlined for every
+ use (white lie).
+
+
+ extern
+ #ifndef _INLINE_C_
+ #endif
+
+ Prefix to any declaration of a global object (function or
+ variable) that should not be inlined and should have only one
+ definition. The #ifndef wrapper goes around the definition
+ propper to ensure that only one copy is generated.
+
+ nb: this will not work when a module is being inlined for every
+ use.
+
+
+ STATIC_<module>
+
+ Replaced by either `static' or `EXTERN_MODULE'.
+
+
+ REALITY CHECK:
+
+ This is not for the faint hearted. I've seen GCC get up to 500mb
+ trying to compile what this can create.
+
+ Some of the modules do not yet implement the WITH_INLINE_STATIC
+ option. Instead they use the macro STATIC_INLINE to control their
+ local function.
+
+ Because of the way that GCC parses __attribute__(), the macro's
+ need to be adjacent to the function name rather than at the start
+ of the line vis:
+
+ int STATIC_INLINE_MODULE f(void);
+ void INLINE_MODULE *g(void);
+
+ */
+
+#define REVEAL_MODULE 1
+#define INLINE_MODULE 2
+#define INCLUDE_MODULE (INLINE_MODULE | REVEAL_MODULE)
+#define PSIM_INLINE_LOCALS 4
+#define ALL_INLINE 7
/* Your compilers inline reserved word */
#endif
#endif
+
/* Default prefix for static functions */
#ifndef STATIC_INLINE
/* Default macro to simplify control several of key the inlines */
#ifndef DEFAULT_INLINE
-#define DEFAULT_INLINE 0
+#define DEFAULT_INLINE PSIM_INLINE_LOCALS
#endif
/* Code that converts between hosts and target byte order. Used on
- every memory access (instruction and data). (See sim-endian.h for
- additional byte swapping configuration information) */
+ every memory access (instruction and data). See sim-endian.h for
+ additional byte swapping configuration information. This module
+ can inline for all callers */
#ifndef SIM_ENDIAN_INLINE
-#define SIM_ENDIAN_INLINE DEFAULT_INLINE
+#define SIM_ENDIAN_INLINE (DEFAULT_INLINE ? ALL_INLINE : 0)
#endif
-/* Low level bit manipulation routines used to work around a compiler
- bug in 2.6.3. */
+/* Low level bit manipulation routines. This module can inline for all
+ callers */
#ifndef BITS_INLINE
-#define BITS_INLINE DEFAULT_INLINE
+#define BITS_INLINE (DEFAULT_INLINE ? ALL_INLINE : 0)
#endif
/* Code that gives access to various CPU internals such as registers.
Used every time an instruction is executed */
#ifndef CPU_INLINE
-#define CPU_INLINE DEFAULT_INLINE
+#define CPU_INLINE (DEFAULT_INLINE ? ALL_INLINE : 0)
#endif
/* Code that translates between an effective and real address. Used
Called once per instruction cycle */
#ifndef EVENTS_INLINE
-#define EVENTS_INLINE DEFAULT_INLINE
+#define EVENTS_INLINE (DEFAULT_INLINE ? ALL_INLINE : 0)
#endif
/* Code monotoring the processors performance. It counts events on
every instruction cycle */
#ifndef MON_INLINE
-#define MON_INLINE DEFAULT_INLINE
+#define MON_INLINE (DEFAULT_INLINE ? ALL_INLINE : 0)
#endif
/* Code called on the rare occasions that an interrupt occures. */
#ifndef INTERRUPTS_INLINE
-#define INTERRUPTS_INLINE 0
+#define INTERRUPTS_INLINE DEFAULT_INLINE
#endif
/* Code called on the rare occasion that either gdb or the device tree
need to manipulate a register within a processor */
#ifndef REGISTERS_INLINE
-#define REGISTERS_INLINE 0
+#define REGISTERS_INLINE DEFAULT_INLINE
#endif
/* Code called on the rare occasion that a processor is manipulating
real hardware instead of RAM.
Also, most of the functions in devices.c are always called through
- a jump table.
+ a jump table. */
- There seems to be some problem with making either device_tree or
- devices inline. It reports the message: device_tree_find_node()
- not a leaf */
-
-#ifndef DEVICE_TREE_INLINE
-#define DEVICE_TREE_INLINE 0
+#ifndef DEVICE_INLINE
+#define DEVICE_INLINE (DEFAULT_INLINE ? PSIM_INLINE_LOCALS : 0)
#endif
-#ifndef DEVICES_INLINE
-#define DEVICES_INLINE 0
+/* Code called used while the device tree is being built.
+
+ Inlining this is of no benefit */
+
+#ifndef TREE_INLINE
+#define TREE_INLINE (DEFAULT_INLINE ? PSIM_INLINE_LOCALS : 0)
#endif
/* Code called whenever information on a Special Purpose Register is
inline all of their called functions */
#ifndef SEMANTICS_INLINE
-#define SEMANTICS_INLINE (DEFAULT_INLINE ? 1 : 0)
+#define SEMANTICS_INLINE (DEFAULT_INLINE & ~INLINE_MODULE)
+#endif
+
+/* When using the instruction cache, code to decode an instruction and
+ install it into the cache. Normally called when ever there is a
+ miss in the instruction cache. */
+
+#ifndef ICACHE_INLINE
+#define ICACHE_INLINE (DEFAULT_INLINE & ~INLINE_MODULE)
+#endif
+
+/* General functions called by semantics functions but part of the
+ instruction table. Although called by the semantic functions the
+ frequency of calls is low. Consequently the need to inline this
+ code is reduced. */
+
+#ifndef SUPPORT_INLINE
+#define SUPPORT_INLINE PSIM_INLINE_LOCALS
+#endif
+
+/* Model specific code used in simulating functional units. Note, it actaully
+ pays NOT to inline the PowerPC model functions (at least on the x86). This
+ is because if it is inlined, each PowerPC instruction gets a separate copy
+ of the code, which is not friendly to the cache. */
+
+#ifndef MODEL_INLINE
+#define MODEL_INLINE (DEFAULT_INLINE & ~INLINE_MODULE)
+#endif
+
+/* Code to print out what options we were compiled with. Because this
+ is called at process startup, it doesn't have to be inlined, but
+ if it isn't brought in and the model routines are inline, the model
+ routines will be pulled in twice. */
+
+#ifndef OPTIONS_INLINE
+#define OPTIONS_INLINE MODEL_INLINE
+#endif
+
+/* idecode acts as the hub of the system, everything else is imported
+ into this file */
+
+#ifndef IDECOCE_INLINE
+#define IDECODE_INLINE PSIM_INLINE_LOCALS
#endif
-/* Code to decode an instruction. Normally called on every instruction
- cycle */
+/* psim, isn't actually inlined */
-#ifndef IDECODE_INLINE
-#define IDECODE_INLINE DEFAULT_INLINE
+#ifndef PSIM_INLINE
+#define PSIM_INLINE PSIM_INLINE_LOCALS
#endif
-/* Code to simule functional units of real machines */
+/* Code to emulate os or rom compatibility. This code is called via a
+ table and hence there is little benefit in making it inline */
-#ifndef FUNCTION_UNIT_INLINE
-#define FUNCTION_UNIT_INLINE DEFAULT_INLINE
+#ifndef OS_EMUL_INLINE
+#define OS_EMUL_INLINE 0
#endif
-#endif /* _CONFIG_H */
+#endif /* _PSIM_CONFIG_H */
projects / thirdparty / binutils-gdb.git / blobdiff