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[thirdparty/binutils-gdb.git] / gas / config / tc-riscv.c

2023-10-02	Nick Clifton	Fix memory leak in RiscV assembler.	blob \| commitdiff \| raw
2023-09-19	Alan Modra	elf-attrs.c memory allocation fail	blob \| commitdiff \| raw \| diff to current
2023-09-18	Jacob Navia	Fix: Use of uninitialized memory	blob \| commitdiff \| raw \| diff to current
2023-09-07	Nelson Chu	RISC-V: Clarify the naming rules of vendor operands.	blob \| commitdiff \| raw \| diff to current
2023-09-05	Jan Beulich	RISC-V: fold duplicate code in vector_macro()	blob \| commitdiff \| raw \| diff to current
2023-09-05	Tsukasa OI	RISC-V: Add 'Smcntrpmf' extension and its CSRs	blob \| commitdiff \| raw \| diff to current
2023-09-01	Nelson Chu	RISC-V: Fixed the wrong expansion for pseudo vmsge...	blob \| commitdiff \| raw \| diff to current
2023-08-15	Jan Beulich	RISC-V: remove indirection from register tables	blob \| commitdiff \| raw \| diff to current
2023-08-02	Sam James	Revert "2.41 Release sources"	blob \| commitdiff \| raw \| diff to current
2023-08-02	Nick Clifton	2.41 Release sources binutils-2_41-release	blob \| commitdiff \| raw \| diff to current
2023-07-25	Tsukasa OI	RISC-V: Enable RVC on ".option arch, +zca" etc.	blob \| commitdiff \| raw \| diff to current
2023-07-18	Jiawei	RISC-V: Supports Zcb extension.	blob \| commitdiff \| raw \| diff to current
2023-07-18	Jiawei	RISC-V: Support Zca/f/d extensions.	blob \| commitdiff \| raw \| diff to current
2023-07-01	Christoph Müllner	RISC-V: Add support for the Zvbb ISA extension	blob \| commitdiff \| raw \| diff to current
2023-06-30	Christoph Müllner	RISC-V: Add support for the Zfa extension	blob \| commitdiff \| raw \| diff to current
2023-06-19	Andreas Schwab	riscv: Use run-time endianess for floating point literals	blob \| commitdiff \| raw \| diff to current
2023-06-01	Jim Wilson	RISC-V: PR30449, Add lga assembler macro support.	blob \| commitdiff \| raw \| diff to current
2023-05-19	Kuan-Lin Chen	RISC-V: Support subtraction of .uleb128.	blob \| commitdiff \| raw \| diff to current
2023-05-04	Jan Beulich	RISC-V: tighten post-relocation-operator separator...	blob \| commitdiff \| raw \| diff to current
2023-04-25	Jan Beulich	RISC-V: adjust logic to avoid register name symbols	blob \| commitdiff \| raw \| diff to current
2023-04-25	Jan Beulich	RISC-V: don't recognize bogus relocations	blob \| commitdiff \| raw \| diff to current
2023-04-25	Jan Beulich	RISC-V: avoid redundant and misleading/wrong error...	blob \| commitdiff \| raw \| diff to current
2023-04-25	Jan Beulich	RISC-V: drop "percent_op" parameter from my_getOpcodeEx...	blob \| commitdiff \| raw \| diff to current
2023-04-25	Jan Beulich	RISC-V: minor effort reduction in relocation specifier...	blob \| commitdiff \| raw \| diff to current
2023-03-31	Tsukasa OI	RISC-V: Allocate "various" operand type	blob \| commitdiff \| raw \| diff to current
2023-02-16	Jan Beulich	RISC-V: as_warn() already emits a newline	blob \| commitdiff \| raw \| diff to current
2023-01-31	Jan Beulich	RISC-V: make C-extension JAL available again for (32...	blob \| commitdiff \| raw \| diff to current
2023-01-16	Alan Modra	Tidy gas/expr.c static state	blob \| commitdiff \| raw \| diff to current
2023-01-11	Jan Beulich	gas/RISC-V: adjust assembler for opcode table re-ordering	blob \| commitdiff \| raw \| diff to current
2023-01-01	Alan Modra	Update year range in copyright notice of binutils files	blob \| commitdiff \| raw \| diff to current
2022-12-29	Tsukasa OI	RISC-V: Simplify riscv_csr_address logic on state enabl...	blob \| commitdiff \| raw \| diff to current
2022-12-14	Li Xu	RISC-V: Add string length check for operands in AS	blob \| commitdiff \| raw \| diff to current
2022-11-28	Tsukasa OI	RISC-V: Better support for long instructions (assembler)	blob \| commitdiff \| raw \| diff to current
2022-11-25	Christoph Müllner	riscv: Add AIA extension support (Smaia, Ssaia)	blob \| commitdiff \| raw \| diff to current
2022-11-19	Tsukasa OI	RISC-V: Add 'Ssstateen' extension and its CSRs	blob \| commitdiff \| raw \| diff to current
2022-11-02	Nelson Chu	RISC-V: Fixed the missing $x+arch when adding odd paddi...	blob \| commitdiff \| raw \| diff to current
2022-10-29	Nelson Chu	RISC-V: Always generate mapping symbols at the start...	blob \| commitdiff \| raw \| diff to current
2022-10-28	Tsukasa OI	RISC-V: Improve "bits undefined" diagnostics	blob \| commitdiff \| raw \| diff to current
2022-10-28	Tsukasa OI	RISC-V: Fallback for instructions longer than 64b	blob \| commitdiff \| raw \| diff to current
2022-10-28	Jan Beulich	RISC-V/gas: fix build with certain gcc versions	blob \| commitdiff \| raw \| diff to current
2022-10-28	Tsukasa OI	RISC-V: Fix build failure for -Werror=maybe-uninitialized	blob \| commitdiff \| raw \| diff to current
2022-10-28	Nelson Chu	RISC-V: Output mapping symbols with ISA string.	blob \| commitdiff \| raw \| diff to current
2022-10-04	Jan Beulich	RISC-V/gas: allow generating up to 176-bit instructions...	blob \| commitdiff \| raw \| diff to current
2022-10-04	Jan Beulich	RISC-V/gas: don't open-code insn_length()	blob \| commitdiff \| raw \| diff to current
2022-10-04	Jan Beulich	RISC-V/gas: drop stray call to install_insn()	blob \| commitdiff \| raw \| diff to current
2022-10-04	Jan Beulich	RISC-V/gas: drop riscv_subsets static variable	blob \| commitdiff \| raw \| diff to current
2022-10-04	Jan Beulich	RISC-V: don't cast expressions' X_add_number to long...	blob \| commitdiff \| raw \| diff to current
2022-10-03	Tsukasa OI	RISC-V: Assign DWARF numbers to vector registers	blob \| commitdiff \| raw \| diff to current
2022-09-30	Christoph Müllner	RISC-V: Eliminate long-casts of X_add_number in diagnostics	blob \| commitdiff \| raw \| diff to current
2022-09-30	Jan Beulich	RISC-V: fix build after "Add support for arbitrary...	blob \| commitdiff \| raw \| diff to current
2022-09-22	Christoph Müllner	RISC-V: Add support for literal instruction arguments	blob \| commitdiff \| raw \| diff to current
2022-09-22	Christoph Müllner	RISC-V: Add support for arbitrary immediate encoding...	blob \| commitdiff \| raw \| diff to current
2022-09-22	Tsukasa OI	RISC-V: Add macro-only operands to validate_riscv_insn	blob \| commitdiff \| raw \| diff to current
2022-09-21	Tsukasa OI	RISC-V: Fix riscv_set_tso declaration	blob \| commitdiff \| raw \| diff to current
2022-09-21	Tsukasa OI	RISC-V: Set EF_RISCV_TSO also on .option arch	blob \| commitdiff \| raw \| diff to current
2022-09-21	Shihua	RISC-V: Implement Ztso extension	blob \| commitdiff \| raw \| diff to current
2022-09-21	Nelson Chu	RISC-V: Always generate R_RISCV_CALL_PLT reloc for...	blob \| commitdiff \| raw \| diff to current
2022-09-15	Tsukasa OI	bfd, binutils, gas: Remove/mark unused variables	blob \| commitdiff \| raw \| diff to current
2022-09-09	Tsukasa OI	RISC-V: Fix vector CSR requirements	blob \| commitdiff \| raw \| diff to current
2022-08-04	Alan Modra	Don't use BFD_VMA_FMT in binutils	blob \| commitdiff \| raw \| diff to current
2022-07-29	Tsukasa OI	RISC-V: Add `OP_V' to .insn named opcodes	blob \| commitdiff \| raw \| diff to current
2022-07-09	Alan Modra	gas: target string hash tables	blob \| commitdiff \| raw \| diff to current
2022-07-09	Alan Modra	gas: rename md_end to md_finish	blob \| commitdiff \| raw \| diff to current
2022-06-28	Tsukasa OI	RISC-V: Add 'Sstc' extension and its CSRs	blob \| commitdiff \| raw \| diff to current
2022-06-28	Tsukasa OI	RISC-V: Add 'Sscofpmf' extension with its CSRs	blob \| commitdiff \| raw \| diff to current
2022-06-28	Tsukasa OI	RISC-V: Add 'Smstateen' extension and its CSRs	blob \| commitdiff \| raw \| diff to current
2022-06-28	Tsukasa OI	RISC-V: Add new CSR feature gate handling (RV32,H)	blob \| commitdiff \| raw \| diff to current
2022-06-22	Nelson Chu	RISC-V: Use single h extension to control hypervisor...	blob \| commitdiff \| raw \| diff to current
2022-06-22	Tsukasa OI	RISC-V: Fix inconsistent error message (range)	blob \| commitdiff \| raw \| diff to current
2022-05-17	Nelson Chu	RISC-V: Added half-precision floating-point v1.0 instru...	blob \| commitdiff \| raw \| diff to current
2022-04-08	Fangrui Song	gas: Port "copy st_size only if unset" to aarch64 and...	blob \| commitdiff \| raw \| diff to current
2022-03-18	Tsukasa OI	RISC-V: Prefetch hint instructions and operand set	blob \| commitdiff \| raw \| diff to current
2022-03-04	Jan Beulich	RISC-V: make .insn actually work for 64-bit insns	blob \| commitdiff \| raw \| diff to current
2022-02-23	Patrick O'Neill	RISC-V: PR28733, add missing extension info to 'unrecog...	blob \| commitdiff \| raw \| diff to current
2022-02-23	Patrick O'Neill	RISC-V: PR28733, add missing extension info to 'invalid...	blob \| commitdiff \| raw \| diff to current
2022-01-22	Lifang Xia	RISC-V: create new frag after alignment.	blob \| commitdiff \| raw \| diff to current
2022-01-07	Philipp Tomsich	RISC-V: update docs for -mpriv-spec/--with-priv-spec...	blob \| commitdiff \| raw \| diff to current
2022-01-07	Nelson Chu	RISC-V: Updated the default ISA spec to 20191213.	blob \| commitdiff \| raw \| diff to current
2022-01-02	Alan Modra	Update year range in copyright notice of binutils files	blob \| commitdiff \| raw \| diff to current
2021-12-24	Vineet Gupta	RISC-V: Hypervisor ext: support Privileged Spec 1.12	blob \| commitdiff \| raw \| diff to current
2021-11-22	Nelson Chu	RISC-V: Replace .option rvc/norvc with .option arch...	blob \| commitdiff \| raw \| diff to current
2021-11-19	Nelson Chu	RISC-V: Support new .option arch directive.	blob \| commitdiff \| raw \| diff to current
2021-11-19	Nelson Chu	RISC-V: Support STO_RISCV_VARIANT_CC and DT_RISCV_VARIA...	blob \| commitdiff \| raw \| diff to current
2021-11-18	jiawei	RISC-V: Add instructions and operand set for z[fdq]inx	blob \| commitdiff \| raw \| diff to current
2021-11-17	Nelson Chu	RISC-V: Support rvv extension with released version...	blob \| commitdiff \| raw \| diff to current
2021-11-16	jiawei	RISC-V: Scalar crypto instructions and operand set.	blob \| commitdiff \| raw \| diff to current
2021-11-11	Nelson Chu	RISC-V: Dump objects according to the elf architecture...	blob \| commitdiff \| raw \| diff to current
2021-11-04	Nelson Chu	RISC-V: Clarify the behavior of .option rvc or norvc.	blob \| commitdiff \| raw \| diff to current
2021-10-27	Nelson Chu	RISC-V: Tidy riscv assembler and disassembler.	blob \| commitdiff \| raw \| diff to current
2021-10-07	Philipp Tomsich	RISC-V: Add support for Zbs instructions	blob \| commitdiff \| raw \| diff to current
2021-09-17	Nelson Chu	RISC-V: Merged extension string tables and their versio...	blob \| commitdiff \| raw \| diff to current
2021-08-31	Nelson Chu	RISC-V: Extend .insn directive to support hardcode...	blob \| commitdiff \| raw \| diff to current
2021-08-30	Nelson Chu	RISC-V: PR27916, Support mapping symbols.	blob \| commitdiff \| raw \| diff to current
2021-07-21	Alan Modra	as_bad_subtract	blob \| commitdiff \| raw \| diff to current
2021-07-06	Yuri Chornoivan	PR 28053: Fix spelling mistakes: usupported -> unsuppor...	blob \| commitdiff \| raw \| diff to current
2021-06-11	Nelson Chu	RISC-V: Update the riscv_opts.[rvc\|rve] in the riscv_se...	blob \| commitdiff \| raw \| diff to current
2021-05-26	Nelson Chu	RISC-V: Allow to link the objects with unknown prefixed...	blob \| commitdiff \| raw \| diff to current
2021-05-24	Nelson Chu	RISC-V: PR25212, Report errors for invalid march and...	blob \| commitdiff \| raw \| diff to current
2021-04-16	Nelson Chu	RISC-V: PR27436, make operand C> work the same as >.	blob \| commitdiff \| raw \| diff to current
2021-03-31	Alan Modra	Use bool in gas	blob \| commitdiff \| raw \| diff to current
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