* bfd/bfd-in2.h (BFD_RELOC_ARM_HVC): New enum value.
* gas/config/tc-arm.c (arm_ext_virt): New variable.
(arm_reg_type): Add REG_TYPE_RNB for banked registers.
(reg_entry): Allow registers to be larger than a byte.
(reg_alias): Fix type warning.
(parse_operands): Parse banked registers when appropriate.
(do_mrs): Add support for Virtualization Extensions.
(do_hvc): New function.
(do_t_mrs): Add support for Virtualization Extensions.
(do_t_msr): Likewise.
(do_t_hvc): New function.
(SPLRBANK): New define.
(reg_names): Add banked registers.
(insns): Add support for Virtualization Extensions.
(md_apply_fixup): Likewise.
(arm_cpus): -mcpu=cortex-a15 implies the Virtualization Extensions.
(arm_extensions): Add 'virt' extension.
(aeabi_set_public_attributes): Add support for Virtualization
Extensions.
* gas/doc/c-arm.texi: Document 'virt' extension.
* gas/testsuite/gas/arm/armv7-a+virt.d: New test.
* gas/testsuite/gas/arm/armv7-a+virt.s: Likewise.
* gas/testsuite/gas/arm/attr-march-all.d: Update for Virtualization Extensions.
* gas/testsuite/gas/arm/attr-march-armv7-a+sec+virt.d: New test.
* gas/testsuite/gas/arm/attr-march-armv7-a+virt.d: Likewise.
* include/opcode/arm.h (ARM_EXT_VIRT): New define.
(ARM_ARCH_V7A_IDIV_MP_SEC): Rename...
(ARM_ARCH_V7A_IDIV_MP_SEC_VIRT): ...to this and include Virtualization
Extensions.
* opcodes/arm-dis.c (arm_opcodes): Add Virtualiztion Extensions support.
(thumb32_opcodes): Likewise.
(banked_regname): New function.
(print_insn_arm): Add Virtualization Extensions support.
(print_insn_thumb32): Likewise.
* gas/config/tc-arm.c (arm_ext_adiv): New variable.
(do_div): New function.
(insns): Accept UDIV and SDIV in ARM state.
(arm_cpus): The cortex-a15 option has all current v7-A extensions.
(arm_extensions): Add 'idiv' extension.
(aeabi_set_public_attributes): Update Tag_DIV_use values for the
Integer Divide extension.
* gas/doc/c-arm.texi: Document the idiv extension.
* gas/testsuite/gas/arm/armv7-a+idiv.d: New test.
* gas/testsuite/gas/arm/armv7-a+idiv.s: Likewise.
* gas/testsuite/gas/arm/attr-march-all.d: Update for Integer divide extension.
* gas/testsuite/gas/arm/attr-march-armv7-a+idiv.d: New test.
* include/opcode/arm.h (ARM_AEXT_ADIV): New define.
(ARM_ARCH_V7A_IDIV_MP_SEC): Likewise.
* opcodes/arm-dis.c (arm_opcodes): Support disassembly of UDIV and SDIV in
ARM state.
* config/tc-arm.c (arm_ext_v6m): New variable.
(arm_ext_m): Add support for OS extension.
(arm_ext_os): New variable.
(do_t_swi): In v6-M ensure we have the OS extension.
(arm_cpus): The cortex-m1 and cortex-m0 options have the OS
extension by default.
(arm_archs): Add armv6s-m.
(arm_extensions): Add 'os' extension.
(cpu_arch_ver): Add support for v6S-M.
* gas/doc/c-arm.texi: Document the OS Extension, and v6-m and v6s-m
architecture options.
* gas/testsuite/gas/arm/archv6s-m-bad.d: New test.
* gas/testsuite/gas/arm/archv6s-m-bad.l: Likewise.
* gas/testsuite/gas/arm/archv6s-m.d: Likewise.
* gas/testsuite/gas/arm/archv6s-m.s: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6-m+os.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6s-m.d: Likewise.
* include/opcode/arm.h (ARM_EXT_OS): New define.
(ARM_AEXT_V6SM): Likewise.
(ARM_ARCH_V6SM): Likewise.
Alan Modra [Thu, 23 Sep 2010 12:24:41 +0000 (12:24 +0000)]
* ld-elf/elf.exp: Don't run --gc-sections tls var test on v850.
* ld-elf/group2.d: xfail xstormy.
* ld-elf/group4.d: Likewise.
* ld-elf/group5.d: Likewise.
* ld-elf/group6.d: Likewise.
* ld-elf/init-fini-arrays.d: xfail cr16 and crx.
* ld-elf/orphan2.d: xfail xstormy.
* ld-elf/sec64k.exp: Don't run on targets using generic linker.
Allow a larger range for ld -r expected bar_1 section. Don't run
final link test on a number of targets. Select avr6 for avr targets.
* ld-elfcomm/elfcomm.exp: Don't attempt on hpux.
Alan Modra [Thu, 23 Sep 2010 12:04:37 +0000 (12:04 +0000)]
* binutils-all/ar.exp: Don't run unique_symbol on msp or hpux.
* binutils-all/copy-2.d: Update not-target list.
* binutils-all/note-1.d: Don't run on h8300.
* binutils-all/objcopy.exp: Don't run strip-10 on msp or hpux.
(objcopy_test): Remove h8300-rtems from xfails.
Alan Modra [Thu, 23 Sep 2010 11:40:06 +0000 (11:40 +0000)]
ld/
* ldlang.c (lang_add_section): Don't copy SEC_RELOC from input
to output section on a final link.
bfd/
* elf.c (_bfd_elf_init_private_section_data): Allow for SEC_RELOC
difference between input and output section.
Joel Brobecker [Wed, 22 Sep 2010 22:50:54 +0000 (22:50 +0000)]
[Ada] Do not compute task ptid when debugging core file
After thread support over core files was added for GNU/Linux was added,
we started noticing the following type of crash when trying to perform
task switches (this is a bit accademic, since task switching is not
supported when debugging core files - this is what our testcase was
verifying).
(please check out the comment inside ada-tasks.c:task_command for
more details on this topic)
The reason for the crash comes from the fact that the GNU/Linux thread
layer now gets pushed on the target stack, causing the associated
to_get_ada_task_ptid target method to be activated. This routine
makes the assumption that, for all threads, the private area is not
NULL. This is incorrect in the case of core files, as the core layer
creates some threads with no private data.
But, taking a step back, we don't need to try to compute the task ptid,
as we'll never be using it anyways (we only use it for task switching).
So the fix is to avoid the ptid computation altogether when debugging
a core file.
gdb/ChangeLog:
* ada-tasks.c (read_atcb): Do not compute the task ptid when
debugging a core file.
Mike Frysinger [Wed, 22 Sep 2010 21:55:17 +0000 (21:55 +0000)]
opcodes: blackfin: fix decoding of 32bit addresses on 64bit systems
The Blackfin ISA is very exact with regards to address truncation when
under/over flowing its 32bit range. On a 32bit system, things work the
same and so addresses are decoded properly. On a 64bit system though,
the decoded addresses may include the bits that are supposed to have
been truncated. So force a 32bit truncation after the address has been
calculated.
Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Wed, 22 Sep 2010 21:53:46 +0000 (21:53 +0000)]
opcodes: blackfin: fix decoding of many invalid insns
The Blackfin disassembler was originally based on the premise of parsing
valid opcodes all the time, so some of the opcode checking can be a bit
fuzzy. This is exemplified in decoding of parallel insns where many
times things are decoded as invalid when in reality, they may not be
used in parallel combinations. So add parallel checking to most insn
decoding routines so we see ILLEGAL and not just whatever insn happens
to be close to a valid mnemonic, as well as some additional sub-opcode
checks.
Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Wed, 22 Sep 2010 21:53:14 +0000 (21:53 +0000)]
opcodes: blackfin: mark push/pop insns with a P6/P7 range as illegal
The push/pop multiple insn has a 3 bit field for the P register range,
but only values of 0...5 are valid (P0 - P5). There is no such P6 or
P7 register, so mark these insns as illegal.
Mike Frysinger [Wed, 22 Sep 2010 21:39:08 +0000 (21:39 +0000)]
opcodes: blackfin: decode all ASTAT bits
All ASTAT bits work in the hardware even though they aren't part of the
official Blackfin ISA. So decode every ASTAT field to make the output
a bit nicer when working with hand generated opcodes.
Mike Frysinger [Wed, 22 Sep 2010 21:38:20 +0000 (21:38 +0000)]
opcodes: blackfin: decode insns with invalid register as illegal
Sometimes the encoding in the opcode is a 4 bit field which defines a
register number. However, register numbers are only 0-7, so make sure
we call illegal for when the opcode register number is greater than 8.
Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Wed, 22 Sep 2010 21:36:09 +0000 (21:36 +0000)]
MAINTAINERS: add myself for Blackfin parts
I know a thing or two about Blackfin parts, and if I can't find the
answer, I can usually locate someone who does. Especially since Jie
and Bernd no longer work for ADI :(.
Mike Frysinger [Wed, 22 Sep 2010 21:26:13 +0000 (21:26 +0000)]
gas: blackfin: fix DBG/DBGCMPLX insn encoding
Some extended registers when given to the DBG/DBGCMPLX pseudo insns are
not encoded properly. So fix them, fix the display of them when being
disassembled, and add testcases.
Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Wed, 22 Sep 2010 21:08:31 +0000 (21:08 +0000)]
gas: blackfin: handle multibyte symbols
Accept any 8bit char with the high bit set so as to support multibyte
characters. Also use the locale safe regular expressions to match
chars/digits. This brings the Blackfin assembler inline with the
behavior of other assemblers.
Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Mike Frysinger [Wed, 22 Sep 2010 20:59:00 +0000 (20:59 +0000)]
opcodes/gas: blackfin: support OUTC debug insn
The disassembler has partial (but incomplete/broken) support already for
the pseudo debug insn OUTC, so let's fix it up and finish it. And now
that the disassembler can handle it, make sure our assembler can output
it too.
Mike Frysinger [Wed, 22 Sep 2010 20:21:32 +0000 (20:21 +0000)]
gas: blackfin: support ABORT debug insn
There is a pseudo debug insn named ABORT that is commonly used in
simulation, so support it in the assembler too. The disassembler
already supports it.
Jan Kratochvil [Wed, 22 Sep 2010 19:22:44 +0000 (19:22 +0000)]
gdb/
* dwarf2read.c (die_needs_namespace) <DW_TAG_variable>: Add also
DW_TAG_constant.
gdb/testsuite/
* gdb.fortran/module.exp (fully qualified name of DW_TAG_constant):
New test.
* gdb.fortran/module.f90 (mod1) <var_const>: New constant.
Joel Brobecker [Wed, 22 Sep 2010 19:13:40 +0000 (19:13 +0000)]
[testsuite] dw2-const.S: fix type reference size on 64bit platforms.
The testcase was failing on various 64bit platforms, because the
debugging info said that the target type for a const type is a
4-byte reference. In the asm file, I used a .long directive, but
the size of .long is of course dependent on the platform. This
replaces this .long by a .4byte directive.
gdb/testsuite/ChangeLog:
* gdb.dwarf2/dw2-const.S: Use .4byte to reference the target
type of our const type.
Joel Brobecker [Wed, 22 Sep 2010 16:15:01 +0000 (16:15 +0000)]
Allow disabling of gdbserver build (--enable-gdbserver=yes/no/auto).
This patch adds a new --enable-gdbserver=yes/no/auto command-line switch
in gdb/configure. The primary purpose is to allow a user to disable the
build & install of gdbserver when not desired. It also allows the user
to request gdbserver in which case the configure script will abort if
automatic building of gdbserver is not supported for that configuration.
The default keeps things as is: We automatically build gdbserver if
building for a native configuration and if gdbserver is supported for
that configuration.
gdb/ChangeLog:
* configure.ac: Add support for --enable-gdbserver.
* configure: Regenerate.
At AdaCore, this is mostly intended for ia64-linux, where we currently
do not want to distribute gdbserver. This will be useful in the context
of I417-033, where we are now using "make install" to determine what
needs to be packaged inside the GNAT Pro package.
Kai Tietz [Wed, 22 Sep 2010 14:20:24 +0000 (14:20 +0000)]
2010-09-22 Kai Tietz <kai.tietz@onevision.com>
* ldlang.c (lang_add_section): Allow for debugging
section to be marked as noload but to keep content.
(IGNORE_SECTION): Likewise.
(lang_check_section_addresses): Likewise.
* ldwrite.c (build_link_order): Likewise.
Kai Tietz [Wed, 22 Sep 2010 14:19:35 +0000 (14:19 +0000)]
2010-09-22 Kai Tietz <kai.tietz@onevision.com>
* coffcode.h (sec_to_styp_flags): Adjust debug
sections to be conform to pe-coff specification
and avoid marking them as excluded.
(styp_to_sec_flags): Doing reverse mapping.
bfd/
* elfxx-mips.c (mips_elf_link_hash_entry): Add got_only_for_calls.
(mips_elf_link_hash_newfunc): Initialize it.
(mips_elf_record_global_got_symbol): Add a for_call parameter.
(mips_elf_count_got_symbols): Check SYMBOL_CALLS_LOCAL rather
than SYMBOL_REFERENCES_LOCAL if the GOT entry is only used for calls.
Try to remove .got entries in favour of .got.plt entries on VxWorks.
(_bfd_mips_elf_check_relocs): Do not try to avoid allocating
a global GOT entry for VxWorks calls. Update uses of
mips_elf_record_global_got_symbol.
(allocate_dynrelocs): Set got_only_for_calls to false if the GOT
entry is used for dynamic relocations.
bfd/
* elfxx-mips.c (mips_got_entry): Adjust commentary.
(mips_elf_create_local_got_entry): If given a symbol, check that it
has been assigned to the local part of the GOT.
(mips_elf_count_got_symbols): Take the bfd_link_info as argument
instead of the master GOT. Put all locally-binding symbols in
the local area.
(mips_elf_make_got_per_bfd): Use global_got_area to decide whether
a symbol lives in the local or global area.
(mips_elf_local_relocation_p): Remove check_forced argument and
retain only the !check_forced behavior.
(mips_elf_calculate_relocation): Adjust call accordingly.
Use global_got_area to decide whether an output relocation
should be local or global. Explicitly decay R_MIPS_GOT_PAGE
into R_MIPS_GOT_DISP where appropriate. Fix selection of
local vs. global semantics for R_MIPS*_26. Remove redundant
reevaluation of what is stored in was_local_p.
(mips_elf_create_dynamic_relocation): Use global_got_area to decide
whether the relocation should be against a global or local symbol.
(mips_elf_lay_out_got): Update the GOT traversal after the above
change to mips_elf_count_got_symbols.
(mips_elf_adjust_addend): Adjust call to mips_elf_local_relocation_p.
(_bfd_mips_elf_relocate_section): Likewise.
(_bfd_mips_elf_finish_dynamic_symbol): Use global_got_area to decide
whether the symbol has a global got entry.
(_bfd_mips_vxworks_finish_dynamic_symbol): Likewise.
ld/testsuite/
* ld-mips-elf/elf-rel-got-n32.d: Swap two local GOT entries
and remove some duplication between the global and local GOT
entries. Adjust GP offsets accordingly.
* ld-mips-elf/elf-rel-got-n64-linux.d: Likewise.
* ld-mips-elf/elf-rel-xgot-n32.d: Reorder GOT entries and update
GP offsets accordingly.
* ld-mips-elf/elf-rel-xgot-n64-linux.d: Likewise.
* ld-mips-elf/mips16-pic-1.gd: Move all global GOT entries to
the local GOT.
* ld-mips-elf/mips16-pic-1.dd: Update GP offsets accordingly.
* ld-mips-elf/multi-got-no-shared.d: Adjust GP setup for
smaller GOT sizes.
bfd/
* elfxx-mips.c (_bfd_mips_elf_check_relocs): On VxWorks,
exclude __GOTT_BASE__ and __GOTT_INDEX__ from the warning
about HI/LO relocations in shared objects.
H.J. Lu [Sat, 18 Sep 2010 00:42:25 +0000 (00:42 +0000)]
Add a target argument.
2010-09-15 H.J. Lu <hongjiu.lu@intel.com>
* emul_aix.c (ar_emul_aix_append): Add a target argument
and ignore it if it is set.
(ar_emul_aix5_append): Likewise.
(ar_emul_aix_replace): Likewise.
(ar_emul_aix5_replace): Likewise.
Ian Lance Taylor [Sat, 18 Sep 2010 00:34:58 +0000 (00:34 +0000)]
* testsuite/Makefile.am (memory_test.o): New target.
(memory_test): Depend on memory_test.o, gcctestdir/ld, and
memory_test.t.
* testsuite/Makefile.in: Rebuild.
* arm.cc (Target_arm::Relocate::relocate): Ignore symbol type and
defintion if relocation uses GOT entries of the symbol.
* testsuite/icf_safe_test.sh: Fix test.
* testsuite/icf_safe_so_test.sh: Fix test.
* config/tc-arm.c (insns): Change MRC entry to accept APSR_RR instead
of just RR.
2010-09-17 Tejas Belagod <tejas.belagod@arm.com>
* gas/arm/copro.s: Add test for APSR_nzcv as a MRC operand.
* gas/arm/copro.d: Change pc in MRC to disassemble as APSR_nzcv. Also
add disassembly for test added in copro.s
2010-09-17 Tejas Belagod <tejas.belagod@arm.com>
* arm_dis.c (coprocessor_opcodes): Add MRC entry for APSR_nzcv.
Phil Muldoon [Thu, 16 Sep 2010 13:47:55 +0000 (13:47 +0000)]
2010-09-16 Phil Muldoon <pmuldoon@redhat.com>
PR mi/11407
* mi/mi-cmd-stack.c (list_args_or_locals): Catch exceptions from
read_var_value and common_val_print and print a warning.
2010-09-16 Phil Muldoon <pmuldoon@redhat.com>
Jan Kratochvil <jan.kratochvil@redhat.com>
PR mi/11407
* gdb.mi/dw2-ref-missing-frame-func.c: New File.
* gdb.mi/dw2-ref-missing-frame-main.c New File.
* gdb.mi/dw2-ref-missing-frame.S New File.
* gdb.mi/dw2-ref-missing-frame.exp New File.
Alan Modra [Thu, 16 Sep 2010 10:36:00 +0000 (10:36 +0000)]
* elf32-spu.c (spu_elf_size_sections): Omit fixups for non-alloc
sections.
(spu_elf_create_sections): Mark .fixup with SEC_LINKER_CREATED and
set dynobj.
(spu_elf_finish_dynamic_sections): New function.
(elf_backend_finish_dynamic_sections): Define.
projects / thirdparty / binutils-gdb.git / log
