From 1d19cae752a7b032b8253feb4fa3b9f1dc162823 Mon Sep 17 00:00:00 2001 From: Dominik Vogt Date: Tue, 15 Dec 2015 14:09:14 +0100 Subject: [PATCH] Fix invalid left shift of negative value Fix occurrences of left-shifting negative constants in C code. sim/arm/ChangeLog: * thumbemu.c (handle_T2_insn): Fix left shift of negative value. * armemu.c (handle_v6_insn): Likewise. sim/avr/ChangeLog: * interp.c (sign_ext): Fix left shift of negative value. sim/mips/ChangeLog: * micromips.igen (process_isa_mode): Fix left shift of negative value. sim/msp430/ChangeLog: * msp430-sim.c (get_op, put_op): Fix left shift of negative value. sim/v850/ChangeLog: * simops.c (v850_bins): Fix left shift of negative value. --- sim/arm/ChangeLog | 5 +++++ sim/arm/armemu.c | 40 ++++++++++++++++++++-------------------- sim/arm/thumbemu.c | 16 ++++++++-------- sim/avr/ChangeLog | 4 ++++ sim/avr/interp.c | 2 +- sim/mips/ChangeLog | 5 +++++ sim/mips/micromips.igen | 2 +- sim/msp430/ChangeLog | 4 ++++ sim/msp430/msp430-sim.c | 4 ++-- sim/v850/ChangeLog | 4 ++++ sim/v850/simops.c | 2 +- 11 files changed, 55 insertions(+), 33 deletions(-) diff --git a/sim/arm/ChangeLog b/sim/arm/ChangeLog index f87e18b5384..dec5dc5e015 100644 --- a/sim/arm/ChangeLog +++ b/sim/arm/ChangeLog @@ -1,3 +1,8 @@ +2015-12-15 Dominik Vogt + + * thumbemu.c (handle_T2_insn): Fix left shift of negative value. + * armemu.c (handle_v6_insn): Likewise. + 2015-11-14 Mike Frysinger * wrapper.c (sim_close): Delete. diff --git a/sim/arm/armemu.c b/sim/arm/armemu.c index f2a84eb575c..3826c78aa9e 100644 --- a/sim/arm/armemu.c +++ b/sim/arm/armemu.c @@ -351,11 +351,11 @@ handle_v6_insn (ARMul_State * state, ARMword instr) { n = (val1 >> i) & 0xFFFF; if (n & 0x8000) - n |= -1 << 16; + n |= -(1 << 16); m = (val2 >> i) & 0xFFFF; if (m & 0x8000) - m |= -1 << 16; + m |= -(1 << 16); r = n + m; @@ -371,11 +371,11 @@ handle_v6_insn (ARMul_State * state, ARMword instr) case 0xF3: /* QASX ,,. */ n = val1 & 0xFFFF; if (n & 0x8000) - n |= -1 << 16; + n |= -(1 << 16); m = (val2 >> 16) & 0xFFFF; if (m & 0x8000) - m |= -1 << 16; + m |= -(1 << 16); r = n - m; @@ -388,11 +388,11 @@ handle_v6_insn (ARMul_State * state, ARMword instr) n = (val1 >> 16) & 0xFFFF; if (n & 0x8000) - n |= -1 << 16; + n |= -(1 << 16); m = val2 & 0xFFFF; if (m & 0x8000) - m |= -1 << 16; + m |= -(1 << 16); r = n + m; @@ -407,11 +407,11 @@ handle_v6_insn (ARMul_State * state, ARMword instr) case 0xF5: /* QSAX ,,. */ n = val1 & 0xFFFF; if (n & 0x8000) - n |= -1 << 16; + n |= -(1 << 16); m = (val2 >> 16) & 0xFFFF; if (m & 0x8000) - m |= -1 << 16; + m |= -(1 << 16); r = n + m; @@ -424,11 +424,11 @@ handle_v6_insn (ARMul_State * state, ARMword instr) n = (val1 >> 16) & 0xFFFF; if (n & 0x8000) - n |= -1 << 16; + n |= -(1 << 16); m = val2 & 0xFFFF; if (m & 0x8000) - m |= -1 << 16; + m |= -(1 << 16); r = n - m; @@ -447,11 +447,11 @@ handle_v6_insn (ARMul_State * state, ARMword instr) { n = (val1 >> i) & 0xFFFF; if (n & 0x8000) - n |= -1 << 16; + n |= -(1 << 16); m = (val2 >> i) & 0xFFFF; if (m & 0x8000) - m |= -1 << 16; + m |= -(1 << 16); r = n - m; @@ -471,11 +471,11 @@ handle_v6_insn (ARMul_State * state, ARMword instr) { n = (val1 >> i) & 0xFF; if (n & 0x80) - n |= -1 << 8; + n |= - (1 << 8); m = (val2 >> i) & 0xFF; if (m & 0x80) - m |= -1 << 8; + m |= - (1 << 8); r = n + m; @@ -495,11 +495,11 @@ handle_v6_insn (ARMul_State * state, ARMword instr) { n = (val1 >> i) & 0xFF; if (n & 0x80) - n |= -1 << 8; + n |= - (1 << 8); m = (val2 >> i) & 0xFF; if (m & 0x80) - m |= -1 << 8; + m |= - (1 << 8); r = n - m; @@ -951,14 +951,14 @@ handle_v6_insn (ARMul_State * state, ARMword instr) state->Emulate = FALSE; } - mask = -1 << lsb; - mask &= ~(-1 << (msb + 1)); + mask = -(1 << lsb); + mask &= ~(-(1 << (msb + 1))); state->Reg[Rd] &= ~ mask; Rn = BITS (0, 3); if (Rn != 0xF) { - ARMword val = state->Reg[Rn] & ~(-1 << ((msb + 1) - lsb)); + ARMword val = state->Reg[Rn] & ~(-(1 << ((msb + 1) - lsb))); state->Reg[Rd] |= val << lsb; } return 1; @@ -1036,7 +1036,7 @@ handle_v6_insn (ARMul_State * state, ARMword instr) val = state->Reg[Rn]; val >>= lsb; - val &= ~(-1 << (widthm1 + 1)); + val &= ~(-(1 << (widthm1 + 1))); state->Reg[Rd] = val; diff --git a/sim/arm/thumbemu.c b/sim/arm/thumbemu.c index 2d26bf6587b..72929c76b52 100644 --- a/sim/arm/thumbemu.c +++ b/sim/arm/thumbemu.c @@ -204,7 +204,7 @@ handle_T2_insn (ARMul_State * state, simm32 = (J1 << 19) | (J2 << 18) | (imm6 << 12) | (imm11 << 1); if (S) - simm32 |= (-1 << 20); + simm32 |= -(1 << 20); break; } @@ -217,7 +217,7 @@ handle_T2_insn (ARMul_State * state, simm32 = (I1 << 23) | (I2 << 22) | (imm10 << 12) | (imm11 << 1); if (S) - simm32 |= (-1 << 24); + simm32 |= -(1 << 24); break; } @@ -230,7 +230,7 @@ handle_T2_insn (ARMul_State * state, simm32 = (I1 << 23) | (I2 << 22) | (imm10h << 12) | (imm10l << 2); if (S) - simm32 |= (-1 << 24); + simm32 |= -(1 << 24); CLEART; state->Reg[14] = (pc + 4) | 1; @@ -246,7 +246,7 @@ handle_T2_insn (ARMul_State * state, simm32 = (I1 << 23) | (I2 << 22) | (imm10 << 12) | (imm11 << 1); if (S) - simm32 |= (-1 << 24); + simm32 |= -(1 << 24); state->Reg[14] = (pc + 4) | 1; break; } @@ -1078,7 +1078,7 @@ handle_T2_insn (ARMul_State * state, ARMword Rn = tBITS (0, 3); ARMword msbit = ntBITS (0, 5); ARMword lsbit = (ntBITS (12, 14) << 2) | ntBITS (6, 7); - ARMword mask = -1 << lsbit; + ARMword mask = -(1 << lsbit); tASSERT (tBIT (4) == 0); tASSERT (ntBIT (15) == 0); @@ -1489,7 +1489,7 @@ handle_T2_insn (ARMul_State * state, state->Reg[Rt] = ARMul_LoadByte (state, address); if (state->Reg[Rt] & 0x80) - state->Reg[Rt] |= -1 << 8; + state->Reg[Rt] |= -(1 << 8); * pvalid = t_resolved; break; @@ -1542,7 +1542,7 @@ handle_T2_insn (ARMul_State * state, state->Reg[Rt] = ARMul_LoadHalfWord (state, address); if (state->Reg[Rt] & 0x8000) - state->Reg[Rt] |= -1 << 16; + state->Reg[Rt] |= -(1 << 16); * pvalid = t_branch; break; @@ -1564,7 +1564,7 @@ handle_T2_insn (ARMul_State * state, val = state->Reg[Rm]; val = (val >> ror) | (val << (32 - ror)); if (val & 0x8000) - val |= -1 << 16; + val |= -(1 << 16); state->Reg[Rd] = val; } else diff --git a/sim/avr/ChangeLog b/sim/avr/ChangeLog index e72bcf44de7..6bc7b7dcaf0 100644 --- a/sim/avr/ChangeLog +++ b/sim/avr/ChangeLog @@ -1,3 +1,7 @@ +2015-12-15 Dominik Vogt + + * interp.c (sign_ext): Fix left shift of negative value. + 2015-11-21 Mike Frysinger * interp.c (pc, cycles, avr_pc22): Delete. diff --git a/sim/avr/interp.c b/sim/avr/interp.c index ca504740135..7ea56fa97f4 100644 --- a/sim/avr/interp.c +++ b/sim/avr/interp.c @@ -222,7 +222,7 @@ static byte sram[MAX_AVR_SRAM]; static int sign_ext (word val, int nb_bits) { if (val & (1 << (nb_bits - 1))) - return val | (-1 << nb_bits); + return val | -(1 << nb_bits); return val; } diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog index d37ab7a3a5d..040ae0455cf 100644 --- a/sim/mips/ChangeLog +++ b/sim/mips/ChangeLog @@ -1,3 +1,8 @@ +2015-12-15 Dominik Vogt + + * micromips.igen (process_isa_mode): Fix left shift of negative + value. + 2015-11-17 Mike Frysinger * sim-main.h (WITH_MODULO_MEMORY): Delete. diff --git a/sim/mips/micromips.igen b/sim/mips/micromips.igen index 2c62376da9a..f24220e6ce9 100644 --- a/sim/mips/micromips.igen +++ b/sim/mips/micromips.igen @@ -54,7 +54,7 @@ :function:::address_word:process_isa_mode:address_word target { SD->isa_mode = target & 0x1; - return (target & (-1 << 1)); + return (target & (-(1 << 1))); } :function:::address_word:do_micromips_jalr:int rt, int rs, address_word nia, int delayslot_instruction_size diff --git a/sim/msp430/ChangeLog b/sim/msp430/ChangeLog index 21f5329281c..53fece0c623 100644 --- a/sim/msp430/ChangeLog +++ b/sim/msp430/ChangeLog @@ -1,3 +1,7 @@ +2015-12-15 Dominik Vogt + + * msp430-sim.c (get_op, put_op): Fix left shift of negative value. + 2015-12-07 Nick Clifton * msp430-sim.c (sim_open): Check for needed memory at address diff --git a/sim/msp430/msp430-sim.c b/sim/msp430/msp430-sim.c index 3a20f6c0cb0..67118589653 100644 --- a/sim/msp430/msp430-sim.c +++ b/sim/msp430/msp430-sim.c @@ -364,7 +364,7 @@ get_op (SIM_DESC sd, MSP430_Opcode_Decoded *opc, int n) /* Index values are signed. */ if (addr & (1 << (sign - 1))) - addr |= -1 << sign; + addr |= -(1 << sign); addr += reg; @@ -565,7 +565,7 @@ put_op (SIM_DESC sd, MSP430_Opcode_Decoded *opc, int n, int val) /* Index values are signed. */ if (addr & (1 << (sign - 1))) - addr |= -1 << sign; + addr |= -(1 << sign); addr += reg; diff --git a/sim/v850/ChangeLog b/sim/v850/ChangeLog index 59cdf8dc23f..9b23e429472 100644 --- a/sim/v850/ChangeLog +++ b/sim/v850/ChangeLog @@ -1,3 +1,7 @@ +2015-12-15 Dominik Vogt + + * simops.c (v850_bins): Fix left shift of negative value. + 2015-11-17 Mike Frysinger * sim-main.h (WITH_CORE): Delete. diff --git a/sim/v850/simops.c b/sim/v850/simops.c index b8b3856ec66..40d578e5d0a 100644 --- a/sim/v850/simops.c +++ b/sim/v850/simops.c @@ -3317,7 +3317,7 @@ v850_bins (SIM_DESC sd, unsigned int source, unsigned int lsb, unsigned int msb, pos = lsb; width = (msb - lsb) + 1; - mask = ~ (-1 << width); + mask = ~ (-(1 << width)); source &= mask; mask <<= pos; result = (* dest) & ~ mask; -- 2.39.2