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a945c346 | 1 | /* Copyright (C) 2012-2024 Free Software Foundation, Inc. |
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2 | |
3 | This file is part of the GNU Transactional Memory Library (libitm). | |
4 | ||
5 | Libitm is free software; you can redistribute it and/or modify it | |
6 | under the terms of the GNU General Public License as published by | |
7 | the Free Software Foundation; either version 3 of the License, or | |
8 | (at your option) any later version. | |
9 | ||
10 | Libitm is distributed in the hope that it will be useful, but WITHOUT ANY | |
11 | WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS | |
12 | FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
13 | more details. | |
14 | ||
15 | Under Section 7 of GPL version 3, you are granted additional | |
16 | permissions described in the GCC Runtime Library Exception, version | |
17 | 3.1, as published by the Free Software Foundation. | |
18 | ||
19 | You should have received a copy of the GNU General Public License and | |
20 | a copy of the GCC Runtime Library Exception along with this program; | |
21 | see the files COPYING3 and COPYING.RUNTIME respectively. If not, see | |
22 | <http://www.gnu.org/licenses/>. */ | |
23 | ||
24 | namespace GTM HIDDEN { | |
25 | ||
26 | typedef struct gtm_jmpbuf | |
27 | { | |
28 | void *cfa; | |
29 | unsigned long pc; | |
30 | } gtm_jmpbuf; | |
31 | ||
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32 | /* The size of one line in hardware caches (in bytes). We use the primary |
33 | cache line size documented for the UltraSPARC T1/T2. */ | |
34 | #define HW_CACHELINE_SIZE 16 | |
35 | ||
36 | static inline void | |
37 | cpu_relax (void) | |
38 | { | |
62513f7b | 39 | __asm volatile ("rd %%ccr, %%g0" : : : "memory"); |
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40 | } |
41 | ||
42 | } // namespace GTM |