]> git.ipfire.org Git - thirdparty/qemu.git/commitdiff
Merge tag 'pull-pa-20240329' of https://gitlab.com/rth7680/qemu into staging
authorPeter Maydell <peter.maydell@linaro.org>
Sun, 31 Mar 2024 15:42:48 +0000 (16:42 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Sun, 31 Mar 2024 15:42:48 +0000 (16:42 +0100)
target/hppa: Fix BE,L set of sr0
target/hppa: Fix B,GATE for wide mode
target/hppa: Mark interval timer write as io
target/hppa: Fix EIRR, EIEM versus icount
target/hppa: Fix DCOR reconstruction of carry bits
target/hppa: Fix unit carry conditions
target/hppa: Fix overflow computation for shladd
target/hppa: Add diag instructions to set/restore shadow registers
target/hppa: Clear psw_n for BE on use_nullify_skip path

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* tag 'pull-pa-20240329' of https://gitlab.com/rth7680/qemu:
  target/hppa: Clear psw_n for BE on use_nullify_skip path
  target/hppa: Add diag instructions to set/restore shadow registers
  target/hppa: Move diag argument handling to decodetree
  target/hppa: Generate getshadowregs inline
  target/hppa: Fix overflow computation for shladd
  target/hppa: Replace c with uv in do_cond
  target/hppa: Squash d for pa1.x during decode
  target/hppa: Fix unit carry conditions
  target/hppa: Optimize UADDCM with no condition
  target/hppa: Fix DCOR reconstruction of carry bits
  target/hppa: Use gva_offset_mask() everywhere
  target/hppa: Fix EIRR, EIEM versus icount
  target/hppa: Tidy read of interval timer
  target/hppa: Mark interval timer write as io
  target/hppa: Fix ADD/SUB trap on overflow for narrow mode
  target/hppa: Handle unit conditions for wide mode
  target/hppa: Fix B,GATE for wide mode
  target/hppa: Fix BE,L set of sr0

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

Trivial merge