]> git.ipfire.org Git - thirdparty/u-boot.git/blobdiff - src/arm/rockchip/rv1126-pinctrl.dtsi
Squashed 'dts/upstream/' changes from aaba2d45dc2a..b35b9bd1d4ee
[thirdparty/u-boot.git] / src / arm / rockchip / rv1126-pinctrl.dtsi
index bb34b0c9cb4a8893b47db95751e2a8b1c66eb301..06b1d7f2d8585a5a99d4a4fd65f4f3741d9fe6e1 100644 (file)
                                <0 RK_PB5 1 &pcfg_pull_none_drv_level_0_smt>;
                };
        };
+       i2c2 {
+               /omit-if-no-ref/
+               i2c2_xfer: i2c2-xfer {
+                       rockchip,pins =
+                               /* i2c2_scl */
+                               <0 RK_PC2 1 &pcfg_pull_none_drv_level_0_smt>,
+                               /* i2c2_sda */
+                               <0 RK_PC3 1 &pcfg_pull_none_drv_level_0_smt>;
+               };
+       };
        pwm2 {
                /omit-if-no-ref/
                pwm2m0_pins: pwm2m0-pins {
        };
        rgmii {
                /omit-if-no-ref/
-               rgmiim1_pins: rgmiim1-pins {
+               rgmiim1_miim: rgmiim1-miim {
                        rockchip,pins =
                                /* rgmii_mdc_m1 */
                                <2 RK_PC2 2 &pcfg_pull_none>,
                                /* rgmii_mdio_m1 */
-                               <2 RK_PC1 2 &pcfg_pull_none>,
-                               /* rgmii_rxclk_m1 */
-                               <2 RK_PD3 2 &pcfg_pull_none>,
+                               <2 RK_PC1 2 &pcfg_pull_none>;
+               };
+               /omit-if-no-ref/
+               rgmiim1_rxer: rgmiim1-rxer {
+                       rockchip,pins =
+                               /* rgmii_rxer_m1 */
+                               <2 RK_PC0 2 &pcfg_pull_none>;
+               };
+               /omit-if-no-ref/
+               rgmiim1_bus2: rgmiim1-bus2 {
+                       rockchip,pins =
                                /* rgmii_rxd0_m1 */
                                <2 RK_PB5 2 &pcfg_pull_none>,
                                /* rgmii_rxd1_m1 */
                                <2 RK_PB6 2 &pcfg_pull_none>,
-                               /* rgmii_rxd2_m1 */
-                               <2 RK_PC7 2 &pcfg_pull_none>,
-                               /* rgmii_rxd3_m1 */
-                               <2 RK_PD0 2 &pcfg_pull_none>,
                                /* rgmii_rxdv_m1 */
                                <2 RK_PB4 2 &pcfg_pull_none>,
-                               /* rgmii_txclk_m1 */
-                               <2 RK_PD2 2 &pcfg_pull_none_drv_level_3>,
                                /* rgmii_txd0_m1 */
                                <2 RK_PC3 2 &pcfg_pull_none_drv_level_3>,
                                /* rgmii_txd1_m1 */
                                <2 RK_PC4 2 &pcfg_pull_none_drv_level_3>,
+                               /* rgmii_txen_m1 */
+                               <2 RK_PC6 2 &pcfg_pull_none_drv_level_3>;
+               };
+               /omit-if-no-ref/
+               rgmiim1_bus4: rgmiim1-bus4 {
+                       rockchip,pins =
+                               /* rgmii_rxclk_m1 */
+                               <2 RK_PD3 2 &pcfg_pull_none>,
+                               /* rgmii_rxd2_m1 */
+                               <2 RK_PC7 2 &pcfg_pull_none>,
+                               /* rgmii_rxd3_m1 */
+                               <2 RK_PD0 2 &pcfg_pull_none>,
+                               /* rgmii_txclk_m1 */
+                               <2 RK_PD2 2 &pcfg_pull_none_drv_level_3>,
                                /* rgmii_txd2_m1 */
                                <2 RK_PD1 2 &pcfg_pull_none_drv_level_3>,
                                /* rgmii_txd3_m1 */
-                               <2 RK_PA4 2 &pcfg_pull_none_drv_level_3>,
-                               /* rgmii_txen_m1 */
-                               <2 RK_PC6 2 &pcfg_pull_none_drv_level_3>;
+                               <2 RK_PA4 2 &pcfg_pull_none_drv_level_3>;
+               };
+               /omit-if-no-ref/
+               rgmiim1_mclkinout: rgmiim1-mclkinout {
+                       rockchip,pins =
+                               /* rgmii_clk_m1 */
+                               <2 RK_PB7 2 &pcfg_pull_none>;
                };
        };
        sdmmc0 {
                                /* uart3_tx_m0 */
                                <3 RK_PC6 4 &pcfg_pull_up>;
                };
+               /omit-if-no-ref/
+               uart3m2_xfer: uart3m2-xfer {
+                       rockchip,pins =
+                               /* uart3_rx_m2 */
+                               <3 RK_PA1 4 &pcfg_pull_up>,
+                               /* uart3_tx_m2 */
+                               <3 RK_PA0 4 &pcfg_pull_up>;
+               };
        };
        uart4 {
                /omit-if-no-ref/
                                /* uart4_tx_m0 */
                                <3 RK_PA4 4 &pcfg_pull_up>;
                };
+               /omit-if-no-ref/
+               uart4m2_xfer: uart4m2-xfer {
+                       rockchip,pins =
+                               /* uart4_rx_m2 */
+                               <1 RK_PD4 3 &pcfg_pull_up>,
+                               /* uart4_tx_m2 */
+                               <1 RK_PD5 3 &pcfg_pull_up>;
+               };
        };
        uart5 {
                /omit-if-no-ref/