vex: change ISelEnv allocation

No need for dynamic memory allocation. Local variable will do just
fine. Saves roughly 136 bytes per IRSB on s390.

diff --git a/VEX/priv/host_amd64_isel.c b/VEX/priv/host_amd64_isel.c
index 6de40bccfbac0c01f90763fdf47e1640791fba08..3b0c459c49579eee00a7e6ed6f6fe167c31bbd62 100644 (file)
--- a/VEX/priv/host_amd64_isel.c
+++ b/VEX/priv/host_amd64_isel.c
@@ -5405,7 +5405,7 @@ HInstrArray* iselSB_AMD64 ( const IRSB* bb,
 {
    Int        i, j;
    HReg       hreg, hregHI;
-   ISelEnv*   env;
+   ISelEnv    *env, envmem;
    UInt       hwcaps_host = archinfo_host->hwcaps;
    AMD64AMode *amCounter, *amFailAddr;
 
@@ -5430,7 +5430,7 @@ HInstrArray* iselSB_AMD64 ( const IRSB* bb,
    vassert(archinfo_host->endness == VexEndnessLE);
 
    /* Make up an initial environment to use. */
-   env = LibVEX_Alloc_inline(sizeof(ISelEnv));
+   env = &envmem;
    env->vreg_ctr = 0;
 
    /* Set up output code array. */

diff --git a/VEX/priv/host_arm64_isel.c b/VEX/priv/host_arm64_isel.c
index 55d688531d042d46a8649620b57df6cc1485644e..0c072d5835eb49702fbff64e215f7675e6592a33 100644 (file)
--- a/VEX/priv/host_arm64_isel.c
+++ b/VEX/priv/host_arm64_isel.c
@@ -4641,7 +4641,7 @@ HInstrArray* iselSB_ARM64 ( const IRSB* bb,
 {
    Int        i, j;
    HReg       hreg, hregHI;
-   ISelEnv*   env;
+   ISelEnv    *env, envmem;
    UInt       hwcaps_host = archinfo_host->hwcaps;
    ARM64AMode *amCounter, *amFailAddr;
 
@@ -4655,7 +4655,7 @@ HInstrArray* iselSB_ARM64 ( const IRSB* bb,
    vassert(sizeof(ARM64Instr) <= 32);
 
    /* Make up an initial environment to use. */
-   env = LibVEX_Alloc_inline(sizeof(ISelEnv));
+   env = &envmem;
    env->vreg_ctr = 0;
 
    /* Set up output code array. */

diff --git a/VEX/priv/host_arm_isel.c b/VEX/priv/host_arm_isel.c
index 71bf871c4f853d8b21bc0d09ce2351fe551d5601..75041b63b07786d1f8302b2997cf8677e4fbc21a 100644 (file)
--- a/VEX/priv/host_arm_isel.c
+++ b/VEX/priv/host_arm_isel.c
@@ -6540,7 +6540,7 @@ HInstrArray* iselSB_ARM ( const IRSB* bb,
 {
    Int       i, j;
    HReg      hreg, hregHI;
-   ISelEnv*  env;
+   ISelEnv  *env, envmem;
    UInt      hwcaps_host = archinfo_host->hwcaps;
    ARMAMode1 *amCounter, *amFailAddr;
 
@@ -6554,7 +6554,7 @@ HInstrArray* iselSB_ARM ( const IRSB* bb,
    vassert(sizeof(ARMInstr) <= 28);
 
    /* Make up an initial environment to use. */
-   env = LibVEX_Alloc_inline(sizeof(ISelEnv));
+   env = &envmem;
    env->vreg_ctr = 0;
 
    /* Set up output code array. */

diff --git a/VEX/priv/host_mips_isel.c b/VEX/priv/host_mips_isel.c
index 7d57078ba844de1dde9bdf2fb136fe1fb3c6d69a..19c761b00b993788b045ddbd404cd4efb6834083 100644 (file)
--- a/VEX/priv/host_mips_isel.c
+++ b/VEX/priv/host_mips_isel.c
@@ -7410,7 +7410,7 @@ HInstrArray *iselSB_MIPS ( const IRSB* bb,
 {
    Int      i, j;
    HReg     hreg, hregHI;
-   ISelEnv* env;
+   ISelEnv  *env, envmem;
    MIPSAMode *amCounter, *amFailAddr;
 
    hwcaps_host = archinfo_host->hwcaps;
@@ -7433,7 +7433,7 @@ HInstrArray *iselSB_MIPS ( const IRSB* bb,
    has_msa = VEX_MIPS_PROC_MSA(archinfo_host->hwcaps);
 
    /* Make up an initial environment to use. */
-   env = LibVEX_Alloc_inline(sizeof(ISelEnv));
+   env = &envmem;
    env->vreg_ctr = 0;
    env->mode64 = mode64;
    env->fp_mode64 = fp_mode64;

diff --git a/VEX/priv/host_nanomips_isel.c b/VEX/priv/host_nanomips_isel.c
index 65998fd8aaeb4b5b5f35203c15db379425009384..c14dfbc10604408c9d06a0e09bd3c716dbfc08b4 100644 (file)
--- a/VEX/priv/host_nanomips_isel.c
+++ b/VEX/priv/host_nanomips_isel.c
@@ -1515,7 +1515,7 @@ HInstrArray *iselSB_NANOMIPS(const IRSB * bb,
 {
    Int      i, j;
    HReg     hreg, hregHI;
-   ISelEnv *env;
+   ISelEnv *env, envmem;
    hwcaps_host = archinfo_host->hwcaps;
    /* sanity ... */
    vassert(arch_host == VexArchNANOMIPS);
@@ -1523,7 +1523,7 @@ HInstrArray *iselSB_NANOMIPS(const IRSB * bb,
    vassert(archinfo_host->endness == VexEndnessLE
            || archinfo_host->endness == VexEndnessBE);
    /* Make up an initial environment to use. */
-   env = LibVEX_Alloc_inline(sizeof(ISelEnv));
+   env = &envmem;
    env->vreg_ctr = 0;
    /* Set up output code array. */
    env->code = newHInstrArray();

diff --git a/VEX/priv/host_ppc_isel.c b/VEX/priv/host_ppc_isel.c
index ea7ff89a9d3e357282fcae94b778e5b43682d323..daac1ed16fdabb53f2027482e8ec3ee8005882af 100644 (file)
--- a/VEX/priv/host_ppc_isel.c
+++ b/VEX/priv/host_ppc_isel.c
@@ -7259,7 +7259,7 @@ HInstrArray* iselSB_PPC ( const IRSB* bb,
 {
    Int       i, j;
    HReg      hregLo, hregMedLo, hregMedHi, hregHi;
-   ISelEnv*  env;
+   ISelEnv  *env, envmem;
    UInt      hwcaps_host = archinfo_host->hwcaps;
    Bool      mode64 = False;
    UInt      mask32, mask64;
@@ -7297,7 +7297,7 @@ HInstrArray* iselSB_PPC ( const IRSB* bb,
      IEndianess = Iend_LE;
 
    /* Make up an initial environment to use. */
-   env = LibVEX_Alloc_inline(sizeof(ISelEnv));
+   env = &envmem;
    env->vreg_ctr = 0;
 
    /* Are we being ppc32 or ppc64? */

diff --git a/VEX/priv/host_riscv64_isel.c b/VEX/priv/host_riscv64_isel.c
index b174d260d026ab42c7c7b7f8bb360b0c63a9d3a3..ca1b8babe574294a3cdfb0ed9b12441bd812a00b 100644 (file)
--- a/VEX/priv/host_riscv64_isel.c
+++ b/VEX/priv/host_riscv64_isel.c
@@ -2014,7 +2014,7 @@ HInstrArray* iselSB_RISCV64(const IRSB*        bb,
 {
    Int      i, j;
    HReg     hreg, hregHI;
-   ISelEnv* env;
+   ISelEnv *env, envmem;
 
    /* Do some sanity checks. */
    vassert(arch_host == VexArchRISCV64);
@@ -2026,7 +2026,7 @@ HInstrArray* iselSB_RISCV64(const IRSB*        bb,
    vassert(sizeof(RISCV64Instr) <= 32);
 
    /* Make up an initial environment to use. */
-   env           = LibVEX_Alloc_inline(sizeof(ISelEnv));
+   env           = &envmem;
    env->vreg_ctr = 0;
 
    /* Set up output code array. */

diff --git a/VEX/priv/host_s390_isel.c b/VEX/priv/host_s390_isel.c
index ffe8a82a2a6f0a92083f9ba2e6928f2610ea7f40..d128f6eeb0c5a276effd0e74de10d2104fe051f6 100644 (file)
--- a/VEX/priv/host_s390_isel.c
+++ b/VEX/priv/host_s390_isel.c
@@ -5497,7 +5497,7 @@ iselSB_S390(const IRSB *bb, VexArch arch_host, const VexArchInfo *archinfo_host,
 {
    UInt     i, j;
    HReg     hreg, hregHI;
-   ISelEnv *env;
+   ISelEnv *env, envmem;
    UInt     hwcaps_host = archinfo_host->hwcaps;
 
    /* Do some sanity checks */
@@ -5507,7 +5507,7 @@ iselSB_S390(const IRSB *bb, VexArch arch_host, const VexArchInfo *archinfo_host,
    vassert(archinfo_host->endness == VexEndnessBE);
 
    /* Make up an initial environment to use. */
-   env = LibVEX_Alloc_inline(sizeof(ISelEnv));
+   env = &envmem;
    env->vreg_ctr = 0;
 
    /* Set up output code array. */

diff --git a/VEX/priv/host_x86_isel.c b/VEX/priv/host_x86_isel.c
index 72d6b46843810baa38a2b9a84a367c6d73c2e646..22a5702c05148c4940f77ec1cda5350fe064cbe6 100644 (file)
--- a/VEX/priv/host_x86_isel.c
+++ b/VEX/priv/host_x86_isel.c
@@ -4586,7 +4586,7 @@ HInstrArray* iselSB_X86 ( const IRSB* bb,
 {
    Int      i, j;
    HReg     hreg, hregHI;
-   ISelEnv* env;
+   ISelEnv  *env, envmem;
    UInt     hwcaps_host = archinfo_host->hwcaps;
    X86AMode *amCounter, *amFailAddr;
 
@@ -4603,7 +4603,7 @@ HInstrArray* iselSB_X86 ( const IRSB* bb,
    vassert(archinfo_host->endness == VexEndnessLE);
 
    /* Make up an initial environment to use. */
-   env = LibVEX_Alloc_inline(sizeof(ISelEnv));
+   env = &envmem;
    env->vreg_ctr = 0;
 
    /* Set up output code array. */