projects / thirdparty / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 53633a89 TR |
1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 | |
| 3 | --- | |
| 4 | $id: http://devicetree.org/schemas/clock/qcom,camcc-sm8250.yaml# | |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | ||
| 7 | title: Qualcomm Camera Clock & Reset Controller on SM8250 | |
| 8 | ||
| 9 | maintainers: | |
| 10 | - Jonathan Marek <jonathan@marek.ca> | |
| 11 | ||
| 12 | description: | | |
| 13 | Qualcomm camera clock control module provides the clocks, resets and | |
| 14 | power domains on SM8250. | |
| 15 | ||
| 16 | See also:: include/dt-bindings/clock/qcom,camcc-sm8250.h | |
| 17 | ||
| 93743d24 TR |
18 | allOf: |
| 19 | - $ref: qcom,gcc.yaml# | |
| 20 | ||
| 53633a89 TR |
21 | properties: |
| 22 | compatible: | |
| 23 | const: qcom,sm8250-camcc | |
| 24 | ||
| 25 | clocks: | |
| 26 | items: | |
| 27 | - description: AHB | |
| 28 | - description: Board XO source | |
| 29 | - description: Board active XO source | |
| 30 | - description: Sleep clock source | |
| 31 | ||
| 32 | clock-names: | |
| 33 | items: | |
| 34 | - const: iface | |
| 35 | - const: bi_tcxo | |
| 36 | - const: bi_tcxo_ao | |
| 37 | - const: sleep_clk | |
| 38 | ||
| 53633a89 TR |
39 | power-domains: |
| 40 | items: | |
| 41 | - description: MMCX power domain | |
| 42 | ||
| 43 | reg: | |
| 44 | maxItems: 1 | |
| 45 | ||
| 46 | required-opps: | |
| 47 | maxItems: 1 | |
| 48 | description: | |
| 49 | OPP node describing required MMCX performance point. | |
| 50 | ||
| 51 | required: | |
| 52 | - compatible | |
| 53633a89 TR |
53 | - clocks |
| 54 | - clock-names | |
| 53633a89 | 55 | |
| 93743d24 | 56 | unevaluatedProperties: false |
| 53633a89 TR |
57 | |
| 58 | examples: | |
| 59 | - | | |
| 60 | #include <dt-bindings/clock/qcom,gcc-sm8250.h> | |
| 61 | #include <dt-bindings/clock/qcom,rpmh.h> | |
| 62 | clock-controller@ad00000 { | |
| 63 | compatible = "qcom,sm8250-camcc"; | |
| 64 | reg = <0x0ad00000 0x10000>; | |
| 65 | clocks = <&gcc GCC_CAMERA_AHB_CLK>, | |
| 66 | <&rpmhcc RPMH_CXO_CLK>, | |
| 67 | <&rpmhcc RPMH_CXO_CLK_A>, | |
| 68 | <&sleep_clk>; | |
| 69 | clock-names = "iface", "bi_tcxo", "bi_tcxo_ao", "sleep_clk"; | |
| 70 | #clock-cells = <1>; | |
| 71 | #reset-cells = <1>; | |
| 72 | #power-domain-cells = <1>; | |
| 73 | }; | |
| 74 | ... |