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Commit | Line | Data |
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53633a89 TR |
1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
2 | # Copyright 2019 Unisoc Inc. | |
3 | %YAML 1.2 | |
4 | --- | |
5 | $id: http://devicetree.org/schemas/serial/sprd-uart.yaml# | |
6 | $schema: http://devicetree.org/meta-schemas/core.yaml# | |
7 | ||
8 | title: Spreadtrum serial UART | |
9 | ||
10 | maintainers: | |
11 | - Orson Zhai <orsonzhai@gmail.com> | |
12 | - Baolin Wang <baolin.wang7@gmail.com> | |
13 | - Chunyan Zhang <zhang.lyra@gmail.com> | |
14 | ||
15 | properties: | |
16 | compatible: | |
17 | oneOf: | |
18 | - items: | |
19 | - enum: | |
20 | - sprd,sc9860-uart | |
21 | - sprd,sc9863a-uart | |
22 | - sprd,ums512-uart | |
93743d24 | 23 | - sprd,ums9620-uart |
53633a89 TR |
24 | - const: sprd,sc9836-uart |
25 | - const: sprd,sc9836-uart | |
26 | ||
27 | reg: | |
28 | maxItems: 1 | |
29 | ||
30 | interrupts: | |
31 | maxItems: 1 | |
32 | ||
33 | clocks: | |
34 | minItems: 1 | |
35 | maxItems: 3 | |
36 | ||
37 | clock-names: | |
38 | description: | | |
39 | "enable" for UART module enable clock, "uart" for UART clock, "source" | |
40 | for UART source (parent) clock. | |
41 | items: | |
42 | - const: enable | |
43 | - const: uart | |
44 | - const: source | |
45 | ||
46 | dmas: | |
47 | minItems: 1 | |
48 | maxItems: 2 | |
49 | ||
50 | dma-names: | |
51 | minItems: 1 | |
52 | items: | |
53 | - const: rx | |
54 | - const: tx | |
55 | ||
56 | required: | |
57 | - compatible | |
58 | - reg | |
59 | - interrupts | |
60 | ||
61 | additionalProperties: false | |
62 | ||
63 | examples: | |
64 | - | | |
65 | #include <dt-bindings/interrupt-controller/arm-gic.h> | |
66 | serial@0 { | |
67 | compatible = "sprd,sc9860-uart", "sprd,sc9836-uart"; | |
68 | reg = <0x0 0x100>; | |
69 | interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; | |
70 | dma-names = "rx", "tx"; | |
71 | dmas = <&ap_dma 19>, <&ap_dma 20>; | |
72 | clock-names = "enable", "uart", "source"; | |
73 | clocks = <&clk_ap_apb_gates 9>, <&clk_uart0>, <&ext_26m>; | |
74 | }; | |
75 | ||
76 | ... |