projects / thirdparty / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 53633a89 TR |
1 | # SPDX-License-Identifier: GPL-2.0-only |
| 2 | %YAML 1.2 | |
| 3 | --- | |
| 4 | $id: http://devicetree.org/schemas/watchdog/snps,dw-wdt.yaml# | |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# | |
| 6 | ||
| 7 | title: Synopsys Designware Watchdog Timer | |
| 8 | ||
| 53633a89 TR |
9 | maintainers: |
| 10 | - Jamie Iles <jamie@jamieiles.com> | |
| 11 | ||
| 93743d24 TR |
12 | allOf: |
| 13 | - $ref: watchdog.yaml# | |
| 14 | ||
| 53633a89 TR |
15 | properties: |
| 16 | compatible: | |
| 17 | oneOf: | |
| 18 | - const: snps,dw-wdt | |
| 19 | - items: | |
| 20 | - enum: | |
| 21 | - rockchip,px30-wdt | |
| 22 | - rockchip,rk3066-wdt | |
| 23 | - rockchip,rk3128-wdt | |
| 24 | - rockchip,rk3188-wdt | |
| 25 | - rockchip,rk3228-wdt | |
| 26 | - rockchip,rk3288-wdt | |
| 27 | - rockchip,rk3308-wdt | |
| 28 | - rockchip,rk3328-wdt | |
| 29 | - rockchip,rk3368-wdt | |
| 30 | - rockchip,rk3399-wdt | |
| 31 | - rockchip,rk3568-wdt | |
| 32 | - rockchip,rk3588-wdt | |
| 33 | - rockchip,rv1108-wdt | |
| 34 | - const: snps,dw-wdt | |
| 35 | ||
| 36 | reg: | |
| 37 | maxItems: 1 | |
| 38 | ||
| 39 | interrupts: | |
| 40 | description: DW Watchdog pre-timeout interrupt | |
| 41 | maxItems: 1 | |
| 42 | ||
| 43 | clocks: | |
| 44 | minItems: 1 | |
| 45 | items: | |
| 46 | - description: Watchdog timer reference clock | |
| 47 | - description: APB3 interface clock | |
| 48 | ||
| 49 | clock-names: | |
| 50 | minItems: 1 | |
| 51 | items: | |
| 52 | - const: tclk | |
| 53 | - const: pclk | |
| 54 | ||
| 55 | resets: | |
| 56 | description: Phandle to the DW Watchdog reset lane | |
| 57 | maxItems: 1 | |
| 58 | ||
| 59 | snps,watchdog-tops: | |
| 60 | $ref: /schemas/types.yaml#/definitions/uint32-array | |
| 61 | description: | | |
| 62 | DW APB Watchdog custom timer intervals - Timeout Period ranges (TOPs). | |
| 63 | Each TOP is a number loaded into the watchdog counter at the moment of | |
| 64 | the timer restart. The counter decrementing happens each tick of the | |
| 65 | reference clock. Therefore the TOPs array is equivalent to an array of | |
| 66 | the timer expiration intervals supported by the DW APB Watchdog. Note | |
| 67 | DW APB Watchdog IP-core might be synthesized with fixed TOP values, | |
| 68 | in which case this property is unnecessary with default TOPs utilized. | |
| 69 | default: [0x0001000 0x0002000 0x0004000 0x0008000 | |
| 70 | 0x0010000 0x0020000 0x0040000 0x0080000 | |
| 71 | 0x0100000 0x0200000 0x0400000 0x0800000 | |
| 72 | 0x1000000 0x2000000 0x4000000 0x8000000] | |
| 73 | minItems: 16 | |
| 74 | maxItems: 16 | |
| 75 | ||
| 53633a89 TR |
76 | required: |
| 77 | - compatible | |
| 78 | - reg | |
| 79 | - clocks | |
| 80 | ||
| 93743d24 TR |
81 | unevaluatedProperties: false |
| 82 | ||
| 53633a89 TR |
83 | examples: |
| 84 | - | | |
| 85 | watchdog@ffd02000 { | |
| 86 | compatible = "snps,dw-wdt"; | |
| 87 | reg = <0xffd02000 0x1000>; | |
| 88 | interrupts = <0 171 4>; | |
| 89 | clocks = <&per_base_clk>; | |
| 90 | resets = <&wdt_rst>; | |
| 91 | }; | |
| 92 | ||
| 93 | - | | |
| 94 | watchdog@ffd02000 { | |
| 95 | compatible = "snps,dw-wdt"; | |
| 96 | reg = <0xffd02000 0x1000>; | |
| 97 | interrupts = <0 171 4>; | |
| 98 | clocks = <&per_base_clk>; | |
| 99 | clock-names = "tclk"; | |
| 100 | snps,watchdog-tops = <0x000000FF 0x000001FF 0x000003FF | |
| 101 | 0x000007FF 0x0000FFFF 0x0001FFFF | |
| 102 | 0x0003FFFF 0x0007FFFF 0x000FFFFF | |
| 103 | 0x001FFFFF 0x003FFFFF 0x007FFFFF | |
| 104 | 0x00FFFFFF 0x01FFFFFF 0x03FFFFFF | |
| 105 | 0x07FFFFFF>; | |
| 106 | }; | |
| 107 | ... |