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Commit | Line | Data |
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27e166b8 WD |
1 | ====================================================================== |
2 | Changes since U-Boot 1.1.4: | |
3 | ====================================================================== | |
4 | ||
6ca24c64 | 5 | * Added support for BC3450 board |
6 | Patch by Stefan Strobl, 21. Oct 2005 | |
7 | ||
a367d426 | 8 | * Update for NC650 board: |
9 | - Support rev1 and rev2 hardware | |
10 | - adapt to new NAND layer | |
11 | - add CP850 configuration based on NC650 | |
12 | ||
8419c013 WD |
13 | * MPC5200: enable snooping of DMA transactions on XLB even if no PCI |
14 | is configured; othrwise DMA accesses aren't cache coherent which | |
15 | causes for example USB to fail. | |
16 | ||
cf48eb9a | 17 | * Some code cleanup |
bb74140d | 18 | |
cf48eb9a WD |
19 | * Fix dbau1x00 boards broken by dbau1550 patch |
20 | PLL:s were not set for boards other than 1550. | |
21 | Flash CFI caused card to hang due to undefined CFG_FLASH_BANKS_LIST. | |
22 | Default boot is now bootp for cards other than 1550. | |
23 | Patch by Thomas Lange, 10 Aug 2005 | |
24 | ||
25 | * Fixes common/cmd_flash.c: | |
26 | - fix some compiler/parser error, if using m68k tool chain | |
27 | - optical fix for protect on/off all messages, if using more | |
28 | then one bank | |
29 | Patch by Jens Scharsig, 28 Jul 2005 | |
27e166b8 | 30 | |
b81a4630 WD |
31 | * Fix Quad UART mapping on MCC200 board due to new HW revision |
32 | ||
b28a31ca WD |
33 | * Fix JFFS2 support for legacy NAND driver. |
34 | ||
35 | * Remove dependencies between DoC code and old legacy NAND driver. | |
36 | ||
37 | * Fix PM828_PCI target, for which PCI was *not* configured in. | |
38 | ||
5fbb2cd3 WD |
39 | * Fix Lite5200B support: initialize SDelay register |
40 | See Freescale's AN3221 "MPC5200B SDRAM Initialization and | |
41 | Configuration", 3.3.1 SDelay--MBAR + 0x0190 | |
42 | ||
2662b40c SR |
43 | * Changes/fixes for drivers/cfi_flash.c: |
44 | ||
45 | - Add Intel legacy lock/unlock support to common CFI driver | |
46 | ||
47 | On some Intel flash's (e.g. Intel J3) legacy unlocking is | |
48 | supported, meaning that unlocking of one sector will unlock | |
49 | all sectors of this bank. Using this feature, unlocking | |
50 | of all sectors upon startup (via env var "unlock=yes") will | |
51 | get much faster. | |
52 | ||
53 | - Fixed problem with multiple reads of envronment variable | |
54 | "unlock" as pointed out by Reinhard Arlt & Anders Larsen. | |
55 | ||
56 | - Removed unwanted linefeeds from "protect" command when | |
57 | CFG_FLASH_PROTECTION is enabled. | |
58 | ||
59 | - Changed p3p400 board to use CFG_FLASH_PROTECTION | |
60 | ||
61 | Patch by Stefan Roese, 01 Apr 2006 | |
62 | ||
63 | * Changes/fixes for drivers/cfi_flash.c: | |
64 | - Correctly handle the cases where CFG_HZ != 1000 (several | |
65 | XScale-based boards) | |
66 | - Fix the timeout calculation of buffered writes (off by a | |
67 | factor of 1000) | |
68 | Patch by Anders Larsen, 31 Mar 2006 | |
69 | ||
35118539 SR |
70 | * Updates to common PPC4xx onboard (DDR)SDRAM init code (405 and 440) |
71 | ||
72 | 405 SDRAM: - The SDRAM parameters can now be defined in the board | |
cf48eb9a WD |
73 | config file and the 405 SDRAM controller values will |
74 | be calculated upon bootup (see PPChameleonEVB). | |
75 | When those settings are not defined in the board | |
76 | config file, the register setup will be as it is now, | |
77 | so this implementation should not break any current | |
78 | design using this code. | |
35118539 | 79 | |
cf48eb9a | 80 | Thanks to Andrea Marson from DAVE for this patch. |
35118539 SR |
81 | |
82 | 440 DDR: - Added function sdram_tr1_set to auto calculate the | |
cf48eb9a WD |
83 | TR1 value for the DDR. |
84 | - Added ECC support (see p3p440). | |
35118539 SR |
85 | |
86 | Patch by Stefan Roese, 17 Mar 2006 | |
87 | ||
db28ddb4 WD |
88 | * Fix CONFIG_SKIP_LOWLEVEL_INIT dependency in cpu/arm920t/start.S |
89 | Patch by Peter Menzebach, 13 Oct 2005 [DNX#2006040142000473] | |
90 | ||
534ff676 WD |
91 | * Add support for ymodem protocol download |
92 | Patch by Stefano Babic, 29 Mar 2006 | |
93 | ||
94 | * Memory Map Update for Delta board: U-Boot is at 0x80000000-0x84000000 | |
95 |