[thirdparty/linux.git] / arch / arc / kernel / troubleshoot.c

/*
 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 */

#include <linux/ptrace.h>
#include <linux/module.h>
#include <linux/mm.h>
#include <linux/fs.h>
#include <linux/kdev_t.h>
#include <linux/proc_fs.h>
#include <linux/file.h>
#include <linux/sched/mm.h>
#include <linux/sched/debug.h>

#include <asm/arcregs.h>
#include <asm/irqflags.h>

#define ARC_PATH_MAX	256

/*
 * Common routine to print scratch regs (r0-r12) or callee regs (r13-r25)
 *   -Prints 3 regs per line and a CR.
 *   -To continue, callee regs right after scratch, special handling of CR
 */
static noinline void print_reg_file(long *reg_rev, int start_num)
{
	unsigned int i;
	char buf[512];
	int n = 0, len = sizeof(buf);

	for (i = start_num; i < start_num + 13; i++) {
		n += scnprintf(buf + n, len - n, "r%02u: 0x%08lx\t",
			       i, (unsigned long)*reg_rev);

		if (((i + 1) % 3) == 0)
			n += scnprintf(buf + n, len - n, "\n");

		/* because pt_regs has regs reversed: r12..r0, r25..r13 */
		if (is_isa_arcv2() && start_num == 0)
			reg_rev++;
		else
			reg_rev--;
	}

	if (start_num != 0)
		n += scnprintf(buf + n, len - n, "\n\n");

	/* To continue printing callee regs on same line as scratch regs */
	if (start_num == 0)
		pr_info("%s", buf);
	else
		pr_cont("%s\n", buf);
}

static void show_callee_regs(struct callee_regs *cregs)
{
	print_reg_file(&(cregs->r13), 13);
}

static void print_task_path_n_nm(struct task_struct *tsk)
{
	char *path_nm = NULL;
	struct mm_struct *mm;
	struct file *exe_file;
	char buf[ARC_PATH_MAX];

	mm = get_task_mm(tsk);
	if (!mm)
		goto done;

	exe_file = get_mm_exe_file(mm);
	mmput(mm);

	if (exe_file) {
		path_nm = file_path(exe_file, buf, ARC_PATH_MAX-1);
		fput(exe_file);
	}

done:
	pr_info("Path: %s\n", !IS_ERR(path_nm) ? path_nm : "?");
}

static void show_faulting_vma(unsigned long address)
{
	struct vm_area_struct *vma;
	struct mm_struct *active_mm = current->active_mm;

	/* can't use print_vma_addr() yet as it doesn't check for
	 * non-inclusive vma
	 */
	down_read(&active_mm->mmap_sem);
	vma = find_vma(active_mm, address);

	/* check against the find_vma( ) behaviour which returns the next VMA
	 * if the container VMA is not found
	 */
	if (vma && (vma->vm_start <= address)) {
		char buf[ARC_PATH_MAX];
		char *nm = "?";

		if (vma->vm_file) {
			nm = file_path(vma->vm_file, buf, ARC_PATH_MAX-1);
			if (IS_ERR(nm))
				nm = "?";
		}
		pr_info("    @off 0x%lx in [%s]\n"
			"    VMA: 0x%08lx to 0x%08lx\n",
			vma->vm_start < TASK_UNMAPPED_BASE ?
				address : address - vma->vm_start,
			nm, vma->vm_start, vma->vm_end);
	} else
		pr_info("    @No matching VMA found\n");

	up_read(&active_mm->mmap_sem);
}

static void show_ecr_verbose(struct pt_regs *regs)
{
	unsigned int vec, cause_code;
	unsigned long address;

	pr_info("\n[ECR   ]: 0x%08lx => ", regs->event);

	/* For Data fault, this is data address not instruction addr */
	address = current->thread.fault_address;

	vec = regs->ecr_vec;
	cause_code = regs->ecr_cause;

	/* For DTLB Miss or ProtV, display the memory involved too */
	if (vec == ECR_V_DTLB_MISS) {
		pr_cont("Invalid %s @ 0x%08lx by insn @ 0x%08lx\n",
		       (cause_code == 0x01) ? "Read" :
		       ((cause_code == 0x02) ? "Write" : "EX"),
		       address, regs->ret);
	} else if (vec == ECR_V_ITLB_MISS) {
		pr_cont("Insn could not be fetched\n");
	} else if (vec == ECR_V_MACH_CHK) {
		pr_cont("Machine Check (%s)\n", (cause_code == 0x0) ?
					"Double Fault" : "Other Fatal Err");

	} else if (vec == ECR_V_PROTV) {
		if (cause_code == ECR_C_PROTV_INST_FETCH)
			pr_cont("Execute from Non-exec Page\n");
		else if (cause_code == ECR_C_PROTV_MISALIG_DATA &&
		         IS_ENABLED(CONFIG_ISA_ARCOMPACT))
			pr_cont("Misaligned r/w from 0x%08lx\n", address);
		else
			pr_cont("%s access not allowed on page\n",
				(cause_code == 0x01) ? "Read" :
				((cause_code == 0x02) ? "Write" : "EX"));
	} else if (vec == ECR_V_INSN_ERR) {
		pr_cont("Illegal Insn\n");
#ifdef CONFIG_ISA_ARCV2
	} else if (vec == ECR_V_MEM_ERR) {
		if (cause_code == 0x00)
			pr_cont("Bus Error from Insn Mem\n");
		else if (cause_code == 0x10)
			pr_cont("Bus Error from Data Mem\n");
		else
			pr_cont("Bus Error, check PRM\n");
	} else if (vec == ECR_V_MISALIGN) {
		pr_cont("Misaligned r/w from 0x%08lx\n", address);
#endif
	} else if (vec == ECR_V_TRAP) {
		if (regs->ecr_param == 5)
			pr_cont("gcc generated __builtin_trap\n");
	} else {
		pr_cont("Check Programmer's Manual\n");
	}
}

/************************************************************************
 *  API called by rest of kernel
 ***********************************************************************/

void show_regs(struct pt_regs *regs)
{
	struct task_struct *tsk = current;
	struct callee_regs *cregs;

	/*
	 * generic code calls us with preemption disabled, but some calls
	 * here could sleep, so re-enable to avoid lockdep splat
	 */
	preempt_enable();

	print_task_path_n_nm(tsk);
	show_regs_print_info(KERN_INFO);

	show_ecr_verbose(regs);

	pr_info("[EFA   ]: 0x%08lx\n[BLINK ]: %pS\n[ERET  ]: %pS\n",
		current->thread.fault_address,
		(void *)regs->blink, (void *)regs->ret);

	if (user_mode(regs))
		show_faulting_vma(regs->ret); /* faulting code, not data */

	pr_info("[STAT32]: 0x%08lx", regs->status32);

#define STS_BIT(r, bit)	r->status32 & STATUS_##bit##_MASK ? #bit" " : ""

#ifdef CONFIG_ISA_ARCOMPACT
	pr_cont(" : %2s%2s%2s%2s%2s%2s%2s\n",
			(regs->status32 & STATUS_U_MASK) ? "U " : "K ",
			STS_BIT(regs, DE), STS_BIT(regs, AE),
			STS_BIT(regs, A2), STS_BIT(regs, A1),
			STS_BIT(regs, E2), STS_BIT(regs, E1));
#else
	pr_cont(" : %2s%2s%2s%2s\n",
			STS_BIT(regs, IE),
			(regs->status32 & STATUS_U_MASK) ? "U " : "K ",
			STS_BIT(regs, DE), STS_BIT(regs, AE));
#endif
	pr_info("BTA: 0x%08lx\t SP: 0x%08lx\t FP: 0x%08lx\n",
		regs->bta, regs->sp, regs->fp);
	pr_info("LPS: 0x%08lx\tLPE: 0x%08lx\tLPC: 0x%08lx\n",
	       regs->lp_start, regs->lp_end, regs->lp_count);

	/* print regs->r0 thru regs->r12
	 * Sequential printing was generating horrible code
	 */
	print_reg_file(&(regs->r0), 0);

	/* If Callee regs were saved, display them too */
	cregs = (struct callee_regs *)current->thread.callee_reg;
	if (cregs)
		show_callee_regs(cregs);

	preempt_disable();
}

void show_kernel_fault_diag(const char *str, struct pt_regs *regs,
			    unsigned long address)
{
	current->thread.fault_address = address;

	/* Show fault description */
	pr_info("\n%s\n", str);

	/* Caller and Callee regs */
	show_regs(regs);

	/* Show stack trace if this Fatality happened in kernel mode */
	if (!user_mode(regs))
		show_stacktrace(current, regs);
}
Commit	Line	Data
c08098f2 VG	1	/*
	2	* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License version 2 as
	6	*/
	7
	8	#include <linux/ptrace.h>
0ef88a54 VG	9	#include <linux/module.h>
	10	#include <linux/mm.h>
	11	#include <linux/fs.h>
	12	#include <linux/kdev_t.h>
0ef88a54 VG	13	#include <linux/proc_fs.h>
0ef88a54 VG	14	#include <linux/file.h>
6e84f315	15	#include <linux/sched/mm.h>
b17b0153	16	#include <linux/sched/debug.h>
6e84f315	17
0ef88a54	18	#include <asm/arcregs.h>
1f6ccfff	19	#include <asm/irqflags.h>
0ef88a54	20
ab6c0367 VG	21	#define ARC_PATH_MAX 256
ab6c0367 VG	22
0ef88a54 VG	23	/*
	24	* Common routine to print scratch regs (r0-r12) or callee regs (r13-r25)
	25	* -Prints 3 regs per line and a CR.
	26	* -To continue, callee regs right after scratch, special handling of CR
	27	*/
	28	static noinline void print_reg_file(long *reg_rev, int start_num)
	29	{
	30	unsigned int i;
	31	char buf[512];
	32	int n = 0, len = sizeof(buf);
	33
0ef88a54 VG	34	for (i = start_num; i < start_num + 13; i++) {
	35	n += scnprintf(buf + n, len - n, "r%02u: 0x%08lx\t",
	36	i, (unsigned long)*reg_rev);
	37
	38	if (((i + 1) % 3) == 0)
	39	n += scnprintf(buf + n, len - n, "\n");
	40
bd3c8b11	41	/* because pt_regs has regs reversed: r12..r0, r25..r13 */
1f6ccfff VG	42	if (is_isa_arcv2() && start_num == 0)
	43	reg_rev++;
	44	else
	45	reg_rev--;
0ef88a54 VG	46	}
	47
	48	if (start_num != 0)
	49	n += scnprintf(buf + n, len - n, "\n\n");
	50
bd3c8b11 VG	51	/* To continue printing callee regs on same line as scratch regs */
	52	if (start_num == 0)
	53	pr_info("%s", buf);
	54	else
	55	pr_cont("%s\n", buf);
0ef88a54 VG	56	}
	57
	58	static void show_callee_regs(struct callee_regs *cregs)
	59	{
	60	print_reg_file(&(cregs->r13), 13);
	61	}
	62
ab6c0367	63	static void print_task_path_n_nm(struct task_struct *tsk)
0ef88a54	64	{
0ef88a54 VG	65	char *path_nm = NULL;
	66	struct mm_struct *mm;
	67	struct file *exe_file;
ab6c0367	68	char buf[ARC_PATH_MAX];
0ef88a54 VG	69
	70	mm = get_task_mm(tsk);
	71	if (!mm)
	72	goto done;
	73
	74	exe_file = get_mm_exe_file(mm);
	75	mmput(mm);
	76
	77	if (exe_file) {
ab6c0367	78	path_nm = file_path(exe_file, buf, ARC_PATH_MAX-1);
0ef88a54	79	fput(exe_file);
0ef88a54 VG	80	}
	81
	82	done:
9bf39ab2	83	pr_info("Path: %s\n", !IS_ERR(path_nm) ? path_nm : "?");
0ef88a54	84	}
0ef88a54	85
ab6c0367	86	static void show_faulting_vma(unsigned long address)
0ef88a54 VG	87	{
0ef88a54 VG	88	struct vm_area_struct *vma;
5040573e	89	struct mm_struct *active_mm = current->active_mm;
0ef88a54	90
bd3c8b11 VG	91	/* can't use print_vma_addr() yet as it doesn't check for
	92	* non-inclusive vma
	93	*/
5040573e DB	94	down_read(&active_mm->mmap_sem);
5040573e DB	95	vma = find_vma(active_mm, address);
0ef88a54 VG	96
	97	/* check against the find_vma( ) behaviour which returns the next VMA
	98	* if the container VMA is not found
	99	*/
	100	if (vma && (vma->vm_start <= address)) {
ab6c0367 VG	101	char buf[ARC_PATH_MAX];
	102	char *nm = "?";
	103
1e3bece2	104	if (vma->vm_file) {
ab6c0367	105	nm = file_path(vma->vm_file, buf, ARC_PATH_MAX-1);
1e3bece2 EP	106	if (IS_ERR(nm))
1e3bece2 EP	107	nm = "?";
0ef88a54 VG	108	}
0ef88a54 VG	109	pr_info(" @off 0x%lx in [%s]\n"
bd3c8b11 VG	110	" VMA: 0x%08lx to 0x%08lx\n",
	111	vma->vm_start < TASK_UNMAPPED_BASE ?
	112	address : address - vma->vm_start,
	113	nm, vma->vm_start, vma->vm_end);
5040573e	114	} else
0ef88a54	115	pr_info(" @No matching VMA found\n");
5040573e DB	116
5040573e DB	117	up_read(&active_mm->mmap_sem);
0ef88a54 VG	118	}
	119
	120	static void show_ecr_verbose(struct pt_regs *regs)
	121	{
502a0c77	122	unsigned int vec, cause_code;
0ef88a54 VG	123	unsigned long address;
0ef88a54 VG	124
502a0c77	125	pr_info("\n[ECR ]: 0x%08lx => ", regs->event);
0ef88a54 VG	126
	127	/* For Data fault, this is data address not instruction addr */
	128	address = current->thread.fault_address;
	129
502a0c77 VG	130	vec = regs->ecr_vec;
502a0c77 VG	131	cause_code = regs->ecr_cause;
0ef88a54 VG	132
	133	/* For DTLB Miss or ProtV, display the memory involved too */
	134	if (vec == ECR_V_DTLB_MISS) {
65464152 VG	135	pr_cont("Invalid %s @ 0x%08lx by insn @ 0x%08lx\n",
	136	(cause_code == 0x01) ? "Read" :
	137	((cause_code == 0x02) ? "Write" : "EX"),
0ef88a54 VG	138	address, regs->ret);
	139	} else if (vec == ECR_V_ITLB_MISS) {
	140	pr_cont("Insn could not be fetched\n");
	141	} else if (vec == ECR_V_MACH_CHK) {
aa7e3a5e	142	pr_cont("Machine Check (%s)\n", (cause_code == 0x0) ?
0ef88a54 VG	143	"Double Fault" : "Other Fatal Err");
	144
	145	} else if (vec == ECR_V_PROTV) {
	146	if (cause_code == ECR_C_PROTV_INST_FETCH)
	147	pr_cont("Execute from Non-exec Page\n");
76551468 EP	148	else if (cause_code == ECR_C_PROTV_MISALIG_DATA &&
76551468 EP	149	IS_ENABLED(CONFIG_ISA_ARCOMPACT))
0ef88a54	150	pr_cont("Misaligned r/w from 0x%08lx\n", address);
65464152 VG	151	else
	152	pr_cont("%s access not allowed on page\n",
	153	(cause_code == 0x01) ? "Read" :
	154	((cause_code == 0x02) ? "Write" : "EX"));
0ef88a54 VG	155	} else if (vec == ECR_V_INSN_ERR) {
0ef88a54 VG	156	pr_cont("Illegal Insn\n");
1f6ccfff VG	157	#ifdef CONFIG_ISA_ARCV2
	158	} else if (vec == ECR_V_MEM_ERR) {
	159	if (cause_code == 0x00)
	160	pr_cont("Bus Error from Insn Mem\n");
	161	else if (cause_code == 0x10)
	162	pr_cont("Bus Error from Data Mem\n");
	163	else
	164	pr_cont("Bus Error, check PRM\n");
76551468 EP	165	} else if (vec == ECR_V_MISALIGN) {
76551468 EP	166	pr_cont("Misaligned r/w from 0x%08lx\n", address);
1f6ccfff	167	#endif
f5a16b93 VG	168	} else if (vec == ECR_V_TRAP) {
	169	if (regs->ecr_param == 5)
	170	pr_cont("gcc generated __builtin_trap\n");
0ef88a54 VG	171	} else {
	172	pr_cont("Check Programmer's Manual\n");
	173	}
	174	}
	175
	176	/************************************************************************
	177	* API called by rest of kernel
	178	***********************************************************************/
c08098f2 VG	179
	180	void show_regs(struct pt_regs *regs)
	181	{
0ef88a54 VG	182	struct task_struct *tsk = current;
0ef88a54 VG	183	struct callee_regs *cregs;
0ef88a54	184
f731a8e8 VG	185	/*
	186	* generic code calls us with preemption disabled, but some calls
	187	* here could sleep, so re-enable to avoid lockdep splat
	188	*/
	189	preempt_enable();
	190
ab6c0367	191	print_task_path_n_nm(tsk);
a43cb95d	192	show_regs_print_info(KERN_INFO);
0ef88a54	193
502a0c77	194	show_ecr_verbose(regs);
0ef88a54	195
bd3c8b11 VG	196	pr_info("[EFA ]: 0x%08lx\n[BLINK ]: %pS\n[ERET ]: %pS\n",
	197	current->thread.fault_address,
	198	(void )regs->blink, (void )regs->ret);
0ef88a54	199
bd3c8b11	200	if (user_mode(regs))
ab6c0367	201	show_faulting_vma(regs->ret); /* faulting code, not data */
0ef88a54	202
bd3c8b11 VG	203	pr_info("[STAT32]: 0x%08lx", regs->status32);
bd3c8b11 VG	204
1f6ccfff	205	#define STS_BIT(r, bit) r->status32 & STATUS_##bit##_MASK ? #bit" " : ""
0ef88a54	206
1f6ccfff VG	207	#ifdef CONFIG_ISA_ARCOMPACT
	208	pr_cont(" : %2s%2s%2s%2s%2s%2s%2s\n",
	209	(regs->status32 & STATUS_U_MASK) ? "U " : "K ",
	210	STS_BIT(regs, DE), STS_BIT(regs, AE),
	211	STS_BIT(regs, A2), STS_BIT(regs, A1),
	212	STS_BIT(regs, E2), STS_BIT(regs, E1));
	213	#else
	214	pr_cont(" : %2s%2s%2s%2s\n",
	215	STS_BIT(regs, IE),
	216	(regs->status32 & STATUS_U_MASK) ? "U " : "K ",
	217	STS_BIT(regs, DE), STS_BIT(regs, AE));
	218	#endif
bd3c8b11 VG	219	pr_info("BTA: 0x%08lx\t SP: 0x%08lx\t FP: 0x%08lx\n",
bd3c8b11 VG	220	regs->bta, regs->sp, regs->fp);
0ef88a54 VG	221	pr_info("LPS: 0x%08lx\tLPE: 0x%08lx\tLPC: 0x%08lx\n",
	222	regs->lp_start, regs->lp_end, regs->lp_count);
	223
	224	/* print regs->r0 thru regs->r12
	225	* Sequential printing was generating horrible code
	226	*/
	227	print_reg_file(&(regs->r0), 0);
	228
	229	/* If Callee regs were saved, display them too */
	230	cregs = (struct callee_regs *)current->thread.callee_reg;
	231	if (cregs)
	232	show_callee_regs(cregs);
f731a8e8 VG	233
f731a8e8 VG	234	preempt_disable();
c08098f2 VG	235	}
	236
	237	void show_kernel_fault_diag(const char str, struct pt_regs regs,
38a9ff6d	238	unsigned long address)
c08098f2	239	{
0ef88a54	240	current->thread.fault_address = address;
0ef88a54	241
aa7e3a5e JA	242	/* Show fault description */
	243	pr_info("\n%s\n", str);
	244
0ef88a54 VG	245	/* Caller and Callee regs */
	246	show_regs(regs);
	247
	248	/* Show stack trace if this Fatality happened in kernel mode */
	249	if (!user_mode(regs))
	250	show_stacktrace(current, regs);
c08098f2	251	}