]> git.ipfire.org Git - people/ms/u-boot.git/blame - arch/arc/lib/start.S
ARC: HSDK: DTS: Add cgu-clk node
[people/ms/u-boot.git] / arch / arc / lib / start.S
CommitLineData
2f16ac9d
AB
1/*
2 * Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#include <asm-offsets.h>
8#include <config.h>
4d93617d 9#include <linux/linkage.h>
2f16ac9d
AB
10#include <asm/arcregs.h>
11
4d93617d 12ENTRY(_start)
cf628f77
AB
13; ARCompact devices are not supposed to be SMP so master/slave check
14; makes no sense.
15#ifdef CONFIG_ISA_ARCV2
6cba327b
AB
16 ; Non-masters will be halted immediately, they might be kicked later
17 ; by platform code right before passing control to the Linux kernel
18 ; in bootm.c:boot_jump_linux().
19 lr r5, [identity]
20 lsr r5, r5, 8
21 bmsk r5, r5, 7
22 cmp r5, 0
23 mov.nz r0, r5
24 bz .Lmaster_proceed
25 flag 1
26 nop
27 nop
28 nop
29
30.Lmaster_proceed:
cf628f77 31#endif
6cba327b 32
20a58ac0
IG
33 /* Setup interrupt vector base that matches "__text_start" */
34 sr __ivt_start, [ARC_AUX_INTR_VEC_BASE]
35
ef639e6f
AB
36 ; Disable/enable I-cache according to configuration
37 lr r5, [ARC_BCR_IC_BUILD]
38 breq r5, 0, 1f ; I$ doesn't exist
39 lr r5, [ARC_AUX_IC_CTRL]
40#ifndef CONFIG_SYS_ICACHE_OFF
41 bclr r5, r5, 0 ; 0 - Enable, 1 is Disable
42#else
43 bset r5, r5, 0 ; I$ exists, but is not used
44#endif
45 sr r5, [ARC_AUX_IC_CTRL]
46
471:
48 ; Disable/enable D-cache according to configuration
49 lr r5, [ARC_BCR_DC_BUILD]
50 breq r5, 0, 1f ; D$ doesn't exist
51 lr r5, [ARC_AUX_DC_CTRL]
52 bclr r5, r5, 6 ; Invalidate (discard w/o wback)
53#ifndef CONFIG_SYS_DCACHE_OFF
54 bclr r5, r5, 0 ; Enable (+Inv)
55#else
56 bset r5, r5, 0 ; Disable (+Inv)
57#endif
58 sr r5, [ARC_AUX_DC_CTRL]
20a58ac0 59
ef639e6f 601:
6eb15e50 61#ifdef CONFIG_ISA_ARCV2
ef639e6f
AB
62 ; Disable System-Level Cache (SLC)
63 lr r5, [ARC_BCR_SLC]
64 breq r5, 0, 1f ; SLC doesn't exist
65 lr r5, [ARC_AUX_SLC_CTRL]
66 bclr r5, r5, 6 ; Invalidate (discard w/o wback)
67 bclr r5, r5, 0 ; Enable (+Inv)
68 sr r5, [ARC_AUX_SLC_CTRL]
69
701:
6eb15e50 71#endif
ef639e6f 72
ecc30663 73 /* Establish C runtime stack and frame */
ef639e6f
AB
74 mov %sp, CONFIG_SYS_INIT_SP_ADDR
75 mov %fp, %sp
20a58ac0 76
ecc30663 77 /* Allocate reserved area from current top of stack */
f56d625e 78 mov %r0, %sp
ecc30663
AA
79 bl board_init_f_alloc_reserve
80 /* Set stack below reserved area, adjust frame pointer accordingly */
f56d625e
AB
81 mov %sp, %r0
82 mov %fp, %sp
83
ecc30663
AA
84 /* Initialize reserved area - note: r0 already contains address */
85 bl board_init_f_init_reserve
86
20a58ac0
IG
87 /* Zero the one and only argument of "board_init_f" */
88 mov_s %r0, 0
89 j board_init_f
4d93617d 90ENDPROC(_start)
20a58ac0 91
2f16ac9d 92/*
3fb80163 93 * void board_init_f_r_trampoline(stack-pointer address)
2f16ac9d
AB
94 *
95 * This "function" does not return, instead it continues in RAM
96 * after relocating the monitor code.
97 *
3fb80163 98 * r0 = new stack-pointer
2f16ac9d 99 */
3fb80163
AB
100ENTRY(board_init_f_r_trampoline)
101 /* Set up the stack- and frame-pointers */
102 mov %sp, %r0
2f16ac9d
AB
103 mov %fp, %sp
104
3fb80163
AB
105 /* Update position of intterupt vector table */
106 lr %r0, [ARC_AUX_INTR_VEC_BASE]
107 ld %r1, [%r25, GD_RELOC_OFF]
108 add %r0, %r0, %r1
109 sr %r0, [ARC_AUX_INTR_VEC_BASE]
2f16ac9d 110
3fb80163
AB
111 /* Re-enter U-Boot by calling board_init_f_r */
112 j board_init_f_r
113ENDPROC(board_init_f_r_trampoline)