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dd84058d
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1menu "ARM architecture"
2 depends on ARM
3
4config SYS_ARCH
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5 default "arm"
6
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7config ARM64
8 bool
bb6b142f 9 select PHYS_64BIT
067716ba 10 select SYS_CACHE_SHIFT_6
016a954e 11
49e93875
SW
12if ARM64
13config POSITION_INDEPENDENT
14 bool "Generate position-independent pre-relocation code"
15 help
16 U-Boot expects to be linked to a specific hard-coded address, and to
17 be loaded to and run from that address. This option lifts that
18 restriction, thus allowing the code to be loaded to and executed
19 from almost any address. This logic relies on the relocation
20 information that is embedded into the binary to support U-Boot
21 relocating itself to the top-of-RAM later during execution.
e6c90448 22
382de4a7
MY
23config INIT_SP_RELATIVE
24 bool "Specify the early stack pointer relative to the .bss section"
e6c90448
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25 help
26 U-Boot typically uses a hard-coded value for the stack pointer
382de4a7 27 before relocation. Enable this option to instead calculate the
e6c90448
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28 initial SP at run-time. This is useful to avoid hard-coding addresses
29 into U-Boot, so that can be loaded and executed at arbitrary
382de4a7
MY
30 addresses and thus avoid using arbitrary addresses at runtime.
31
32 If this option is enabled, the early stack pointer is set to
33 &_bss_start with a offset value added. The offset is specified by
34 SYS_INIT_SP_BSS_OFFSET.
35
36config SYS_INIT_SP_BSS_OFFSET
37 int "Early stack offset from the .bss base address"
38 depends on INIT_SP_RELATIVE
39 default 524288
40 help
41 This option's value is the offset added to &_bss_start in order to
e6c90448
SW
42 calculate the stack pointer. This offset should be large enough so
43 that the early malloc region, global data (gd), and early stack usage
44 do not overlap any appended DTB.
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45
46config LINUX_KERNEL_IMAGE_HEADER
47 bool
48 help
49 Place a Linux kernel image header at the start of the U-Boot binary.
50 The format of the header is described in the Linux kernel source at
51 Documentation/arm64/booting.txt. This feature is useful since the
52 image header reports the amount of memory (BSS and similar) that
53 U-Boot needs to use, but which isn't part of the binary.
54
55if LINUX_KERNEL_IMAGE_HEADER
56config LNX_KRNL_IMG_TEXT_OFFSET_BASE
57 hex
58 help
59 The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
60 TEXT_OFFSET value written in to the Linux kernel image header.
61endif
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62endif
63
64config STATIC_RELA
65 bool
66 default y if ARM64 && !POSITION_INDEPENDENT
67
37217f0e
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68config DMA_ADDR_T_64BIT
69 bool
70 default y if ARM64
71
2e07c249 72config HAS_VBAR
e009bfa4 73 bool
2e07c249 74
62e92077 75config HAS_THUMB2
e009bfa4 76 bool
62e92077 77
111a6af9
PE
78# Used for compatibility with asm files copied from the kernel
79config ARM_ASM_UNIFIED
80 bool
81 default y
82
83# Used for compatibility with asm files copied from the kernel
84config THUMB2_KERNEL
85 bool
86
a0aba8a2
TW
87config SYS_ICACHE_OFF
88 bool "Do not enable icache"
89 default n
90 help
91 Do not enable instruction cache in U-Boot.
92
10015025
TW
93config SPL_SYS_ICACHE_OFF
94 bool "Do not enable icache in SPL"
95 depends on SPL
96 default SYS_ICACHE_OFF
97 help
98 Do not enable instruction cache in SPL.
99
a0aba8a2
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100config SYS_DCACHE_OFF
101 bool "Do not enable dcache"
102 default n
103 help
104 Do not enable data cache in U-Boot.
105
10015025
TW
106config SPL_SYS_DCACHE_OFF
107 bool "Do not enable dcache in SPL"
108 depends on SPL
109 default SYS_DCACHE_OFF
110 help
111 Do not enable data cache in SPL.
112
f4bcd767
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113config SYS_ARM_CACHE_CP15
114 bool "CP15 based cache enabling support"
115 help
116 Select this if your processor suports enabling caches by using
117 CP15 registers.
118
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119config SYS_ARM_MMU
120 bool "MMU-based Paged Memory Management Support"
f4bcd767 121 select SYS_ARM_CACHE_CP15
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122 help
123 Select if you want MMU-based virtualised addressing space
124 support by paged memory management.
125
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126config SYS_ARM_MPU
127 bool 'Use the ARM v7 PMSA Compliant MPU'
128 help
129 Some ARM systems without an MMU have instead a Memory Protection
130 Unit (MPU) that defines the type and permissions for regions of
131 memory.
132 If your CPU has an MPU then you should choose 'y' here unless you
133 know that you do not want to use the MPU.
134
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135# If set, the workarounds for these ARM errata are applied early during U-Boot
136# startup. Note that in general these options force the workarounds to be
137# applied; no CPU-type/version detection exists, unlike the similar options in
138# the Linux kernel. Do not set these options unless they apply! Also note that
139# the following can be machine specific errata. These do have ability to
140# provide rudimentary version and machine specific checks, but expect no
141# product checks:
142# CONFIG_ARM_ERRATA_430973
143# CONFIG_ARM_ERRATA_454179
144# CONFIG_ARM_ERRATA_621766
145# CONFIG_ARM_ERRATA_798870
146# CONFIG_ARM_ERRATA_801819
7b37a9c7 147# CONFIG_ARM_CORTEX_A8_CVE_2017_5715
c2ca3fdf 148# CONFIG_ARM_CORTEX_A15_CVE_2017_5715
7b37a9c7 149
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150config ARM_ERRATA_430973
151 bool
152
153config ARM_ERRATA_454179
154 bool
155
156config ARM_ERRATA_621766
157 bool
158
159config ARM_ERRATA_716044
160 bool
161
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162config ARM_ERRATA_725233
163 bool
164
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165config ARM_ERRATA_742230
166 bool
167
168config ARM_ERRATA_743622
169 bool
170
171config ARM_ERRATA_751472
172 bool
173
174config ARM_ERRATA_761320
175 bool
176
177config ARM_ERRATA_773022
178 bool
179
180config ARM_ERRATA_774769
181 bool
182
183config ARM_ERRATA_794072
184 bool
185
186config ARM_ERRATA_798870
187 bool
188
189config ARM_ERRATA_801819
190 bool
191
192config ARM_ERRATA_826974
193 bool
194
195config ARM_ERRATA_828024
196 bool
197
198config ARM_ERRATA_829520
199 bool
200
201config ARM_ERRATA_833069
202 bool
203
204config ARM_ERRATA_833471
205 bool
206
11d94319 207config ARM_ERRATA_845369
6e7bdde4 208 bool
11d94319 209
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NM
210config ARM_ERRATA_852421
211 bool
212
213config ARM_ERRATA_852423
214 bool
215
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AW
216config ARM_ERRATA_855873
217 bool
218
7b37a9c7
NM
219config ARM_CORTEX_A8_CVE_2017_5715
220 bool
221
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NM
222config ARM_CORTEX_A15_CVE_2017_5715
223 bool
224
2e07c249 225config CPU_ARM720T
e009bfa4 226 bool
067716ba 227 select SYS_CACHE_SHIFT_5
7240b80e 228 imply SYS_ARM_MMU
2e07c249
GS
229
230config CPU_ARM920T
e009bfa4 231 bool
067716ba 232 select SYS_CACHE_SHIFT_5
7240b80e 233 imply SYS_ARM_MMU
2e07c249
GS
234
235config CPU_ARM926EJS
e009bfa4 236 bool
067716ba 237 select SYS_CACHE_SHIFT_5
7240b80e 238 imply SYS_ARM_MMU
2e07c249
GS
239
240config CPU_ARM946ES
e009bfa4 241 bool
067716ba 242 select SYS_CACHE_SHIFT_5
7240b80e 243 imply SYS_ARM_MMU
2e07c249
GS
244
245config CPU_ARM1136
e009bfa4 246 bool
067716ba 247 select SYS_CACHE_SHIFT_5
7240b80e 248 imply SYS_ARM_MMU
2e07c249
GS
249
250config CPU_ARM1176
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TR
251 bool
252 select HAS_VBAR
067716ba 253 select SYS_CACHE_SHIFT_5
7240b80e 254 imply SYS_ARM_MMU
2e07c249 255
acf15001 256config CPU_V7A
e009bfa4 257 bool
e009bfa4 258 select HAS_THUMB2
5ed063d1 259 select HAS_VBAR
067716ba 260 select SYS_CACHE_SHIFT_6
7240b80e 261 imply SYS_ARM_MMU
2e07c249 262
12d8a729 263config CPU_V7M
264 bool
e009bfa4 265 select HAS_THUMB2
f2ef2043 266 select SYS_ARM_MPU
5ed063d1 267 select SYS_CACHE_SHIFT_5
ea37f0b3 268 select SYS_THUMB_BUILD
5ed063d1 269 select THUMB2_KERNEL
12d8a729 270
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271config CPU_V7R
272 bool
273 select HAS_THUMB2
f2ef2043 274 select SYS_ARM_CACHE_CP15
5ed063d1
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275 select SYS_ARM_MPU
276 select SYS_CACHE_SHIFT_6
4bbd6b1d 277
2e07c249 278config CPU_PXA
e009bfa4 279 bool
067716ba 280 select SYS_CACHE_SHIFT_5
7240b80e 281 imply SYS_ARM_MMU
2e07c249
GS
282
283config CPU_SA1100
e009bfa4 284 bool
067716ba 285 select SYS_CACHE_SHIFT_5
7240b80e 286 imply SYS_ARM_MMU
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GS
287
288config SYS_CPU
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289 default "arm720t" if CPU_ARM720T
290 default "arm920t" if CPU_ARM920T
291 default "arm926ejs" if CPU_ARM926EJS
292 default "arm946es" if CPU_ARM946ES
293 default "arm1136" if CPU_ARM1136
294 default "arm1176" if CPU_ARM1176
acf15001 295 default "armv7" if CPU_V7A
4bbd6b1d 296 default "armv7" if CPU_V7R
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TR
297 default "armv7m" if CPU_V7M
298 default "pxa" if CPU_PXA
299 default "sa1100" if CPU_SA1100
01541eec 300 default "armv8" if ARM64
2e07c249 301
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MV
302config SYS_ARM_ARCH
303 int
304 default 4 if CPU_ARM720T
305 default 4 if CPU_ARM920T
306 default 5 if CPU_ARM926EJS
307 default 5 if CPU_ARM946ES
308 default 6 if CPU_ARM1136
309 default 6 if CPU_ARM1176
acf15001 310 default 7 if CPU_V7A
66020a67 311 default 7 if CPU_V7M
4bbd6b1d 312 default 7 if CPU_V7R
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313 default 5 if CPU_PXA
314 default 4 if CPU_SA1100
315 default 8 if ARM64
316
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317config SYS_CACHE_SHIFT_5
318 bool
319
320config SYS_CACHE_SHIFT_6
321 bool
322
323config SYS_CACHE_SHIFT_7
324 bool
325
326config SYS_CACHELINE_SIZE
327 int
328 default 128 if SYS_CACHE_SHIFT_7
329 default 64 if SYS_CACHE_SHIFT_6
330 default 32 if SYS_CACHE_SHIFT_5
331
1bf33015
AF
332config ARCH_CPU_INIT
333 bool "Enable ARCH_CPU_INIT"
334 help
335 Some architectures require a call to arch_cpu_init()
336 Say Y here to enable it
337
7842b6a9
AP
338config SYS_ARCH_TIMER
339 bool "ARM Generic Timer support"
acf15001 340 depends on CPU_V7A || ARM64
7842b6a9
AP
341 default y if ARM64
342 help
343 The ARM Generic Timer (aka arch-timer) provides an architected
344 interface to a timer source on an SoC.
345 It is mandantory for ARMv8 implementation and widely available
346 on ARMv7 systems.
347
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348config ARM_SMCCC
349 bool "Support for ARM SMC Calling Convention (SMCCC)"
acf15001 350 depends on CPU_V7A || ARM64
573a3811 351 select ARM_PSCI_FW
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MY
352 help
353 Say Y here if you want to enable ARM SMC Calling Convention.
354 This should be enabled if U-Boot needs to communicate with system
355 firmware (for example, PSCI) according to SMCCC.
356
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357config SEMIHOSTING
358 bool "support boot from semihosting"
359 help
360 In emulated environments, semihosting is a way for
361 the hosted environment to call out to the emulator to
362 retrieve files from the host machine.
363
3a649407
TR
364config SYS_THUMB_BUILD
365 bool "Build U-Boot using the Thumb instruction set"
366 depends on !ARM64
367 help
368 Use this flag to build U-Boot using the Thumb instruction set for
369 ARM architectures. Thumb instruction set provides better code
370 density. For ARM architectures that support Thumb2 this flag will
371 result in Thumb2 code generated by GCC.
372
373config SPL_SYS_THUMB_BUILD
374 bool "Build SPL using the Thumb instruction set"
375 default y if SYS_THUMB_BUILD
05705566 376 depends on !ARM64 && SPL
3a649407
TR
377 help
378 Use this flag to build SPL using the Thumb instruction set for
379 ARM architectures. Thumb instruction set provides better code
380 density. For ARM architectures that support Thumb2 this flag will
381 result in Thumb2 code generated by GCC.
382
1e32c519
KY
383config TPL_SYS_THUMB_BUILD
384 bool "Build TPL using the Thumb instruction set"
385 default y if SYS_THUMB_BUILD
386 depends on TPL && !ARM64
387 help
388 Use this flag to build SPL using the Thumb instruction set for
389 ARM architectures. Thumb instruction set provides better code
390 density. For ARM architectures that support Thumb2 this flag will
391 result in Thumb2 code generated by GCC.
392
393
f3e9bec8
PF
394config SYS_L2CACHE_OFF
395 bool "L2cache off"
396 help
397 If SoC does not support L2CACHE or one do not want to enable
398 L2CACHE, choose this option.
399
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AP
400config ENABLE_ARM_SOC_BOOT0_HOOK
401 bool "prepare BOOT0 header"
402 help
403 If the SoC's BOOT0 requires a header area filled with (magic)
7d531e8a
SG
404 values, then choose this option, and create a file included as
405 <asm/arch/boot0.h> which contains the required assembler code.
cdaa633f 406
85db5831
AP
407config ARM_CORTEX_CPU_IS_UP
408 bool
409 default n
410
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FE
411config USE_ARCH_MEMCPY
412 bool "Use an assembly optimized implementation of memcpy"
40d5534c
TR
413 default y
414 depends on !ARM64
415 help
416 Enable the generation of an optimized version of memcpy.
417 Such implementation may be faster under some conditions
418 but may increase the binary size.
419
420config SPL_USE_ARCH_MEMCPY
f8136e68 421 bool "Use an assembly optimized implementation of memcpy for SPL"
40d5534c 422 default y if USE_ARCH_MEMCPY
05705566 423 depends on !ARM64 && SPL
be72591b
FE
424 help
425 Enable the generation of an optimized version of memcpy.
426 Such implementation may be faster under some conditions
427 but may increase the binary size.
428
1e32c519
KY
429config TPL_USE_ARCH_MEMCPY
430 bool "Use an assembly optimized implementation of memcpy for TPL"
431 default y if USE_ARCH_MEMCPY
05705566 432 depends on !ARM64 && TPL
1e32c519
KY
433 help
434 Enable the generation of an optimized version of memcpy.
435 Such implementation may be faster under some conditions
436 but may increase the binary size.
437
be72591b
FE
438config USE_ARCH_MEMSET
439 bool "Use an assembly optimized implementation of memset"
40d5534c
TR
440 default y
441 depends on !ARM64
442 help
443 Enable the generation of an optimized version of memset.
444 Such implementation may be faster under some conditions
445 but may increase the binary size.
446
447config SPL_USE_ARCH_MEMSET
f8136e68 448 bool "Use an assembly optimized implementation of memset for SPL"
40d5534c 449 default y if USE_ARCH_MEMSET
05705566 450 depends on !ARM64 && SPL
be72591b
FE
451 help
452 Enable the generation of an optimized version of memset.
453 Such implementation may be faster under some conditions
454 but may increase the binary size.
455
1e32c519
KY
456config TPL_USE_ARCH_MEMSET
457 bool "Use an assembly optimized implementation of memset for TPL"
458 default y if USE_ARCH_MEMSET
05705566 459 depends on !ARM64 && TPL
1e32c519
KY
460 help
461 Enable the generation of an optimized version of memset.
462 Such implementation may be faster under some conditions
463 but may increase the binary size.
464
085201c2
SDPP
465config SET_STACK_SIZE
466 bool "Enable an option to set max stack size that can be used"
a69814c8 467 default y if ARCH_VERSAL || ARCH_ZYNQMP
085201c2
SDPP
468 help
469 This will enable an option to set max stack size that can be
470 used by u-boot.
471
472config STACK_SIZE
473 hex "Define max stack size that can be used by u-boot"
474 depends on SET_STACK_SIZE
a69814c8 475 default 0x4000000 if ARCH_VERSAL || ARCH_ZYNQMP
085201c2
SDPP
476 help
477 Defines Max stack size that can be used by u-boot so that the
478 initrd_high will be calculated as base stack pointer minus this
479 stack size.
480
ec6617c3
AW
481config ARM64_SUPPORT_AARCH32
482 bool "ARM64 system support AArch32 execution state"
05705566
AF
483 depends on ARM64
484 default y if !TARGET_THUNDERX_88XX
ec6617c3
AW
485 help
486 This ARM64 system supports AArch32 execution state.
487
dd84058d
MY
488choice
489 prompt "Target select"
b928e658 490 default TARGET_HIKEY
dd84058d 491
4614b891
MY
492config ARCH_AT91
493 bool "Atmel AT91"
f58e9460 494 select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
dd84058d
MY
495
496config TARGET_EDB93XX
497 bool "Support edb93xx"
2e07c249 498 select CPU_ARM920T
884f9013 499 select PL010_SERIAL
dd84058d 500
dd84058d
MY
501config TARGET_ASPENITE
502 bool "Support aspenite"
2e07c249 503 select CPU_ARM926EJS
dd84058d
MY
504
505config TARGET_GPLUGD
506 bool "Support gplugd"
2e07c249 507 select CPU_ARM926EJS
dd84058d 508
3491ba63
MY
509config ARCH_DAVINCI
510 bool "TI DaVinci"
2e07c249 511 select CPU_ARM926EJS
15dc63d6 512 imply CMD_SAVES
3491ba63
MY
513 help
514 Support for TI's DaVinci platform.
dd84058d 515
47539e23
MY
516config KIRKWOOD
517 bool "Marvell Kirkwood"
4585601a 518 select ARCH_MISC_INIT
5ed063d1
MS
519 select BOARD_EARLY_INIT_F
520 select CPU_ARM926EJS
dd84058d 521
c3d89140 522config ARCH_MVEBU
21b29fc6 523 bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
9cffb233 524 select DM
e3b9c98a 525 select DM_ETH
1d51ea19 526 select DM_SERIAL
09a54c00
SR
527 select DM_SPI
528 select DM_SPI_FLASH
5ed063d1
MS
529 select OF_CONTROL
530 select OF_SEPARATE
f1b1f770 531 select SPI
08a00cba 532 imply CMD_DM
a4884831 533
dd84058d
MY
534config TARGET_APF27
535 bool "Support apf27"
2e07c249 536 select CPU_ARM926EJS
02627356 537 select SUPPORT_SPL
dd84058d 538
22f2be7a
MY
539config ORION5X
540 bool "Marvell Orion"
2e07c249 541 select CPU_ARM926EJS
dd84058d 542
dd84058d
MY
543config TARGET_SPEAR300
544 bool "Support spear300"
a5d67547 545 select BOARD_EARLY_INIT_F
5ed063d1 546 select CPU_ARM926EJS
d10fc50f 547 select PL011_SERIAL
5ed063d1 548 imply CMD_SAVES
dd84058d
MY
549
550config TARGET_SPEAR310
551 bool "Support spear310"
a5d67547 552 select BOARD_EARLY_INIT_F
5ed063d1 553 select CPU_ARM926EJS
d10fc50f 554 select PL011_SERIAL
5ed063d1 555 imply CMD_SAVES
dd84058d
MY
556
557config TARGET_SPEAR320
558 bool "Support spear320"
a5d67547 559 select BOARD_EARLY_INIT_F
5ed063d1 560 select CPU_ARM926EJS
d10fc50f 561 select PL011_SERIAL
5ed063d1 562 imply CMD_SAVES
dd84058d
MY
563
564config TARGET_SPEAR600
565 bool "Support spear600"
a5d67547 566 select BOARD_EARLY_INIT_F
5ed063d1 567 select CPU_ARM926EJS
d10fc50f 568 select PL011_SERIAL
5ed063d1 569 imply CMD_SAVES
dd84058d 570
9fa32b12
VM
571config TARGET_STV0991
572 bool "Support stv0991"
acf15001 573 select CPU_V7A
cac0ca76
MY
574 select DM
575 select DM_SERIAL
e67abcaa
VM
576 select DM_SPI
577 select DM_SPI_FLASH
5ed063d1 578 select PL01X_SERIAL
f1b1f770 579 select SPI
e67abcaa 580 select SPI_FLASH
08a00cba 581 imply CMD_DM
9fa32b12 582
dd84058d
MY
583config TARGET_X600
584 bool "Support x600"
e5ec4815 585 select BOARD_LATE_INIT
2e07c249 586 select CPU_ARM926EJS
d10fc50f 587 select PL011_SERIAL
5ed063d1 588 select SUPPORT_SPL
dd84058d 589
dd84058d
MY
590config TARGET_WOODBURN
591 bool "Support woodburn"
2e07c249 592 select CPU_ARM1136
dd84058d
MY
593
594config TARGET_WOODBURN_SD
595 bool "Support woodburn_sd"
2e07c249 596 select CPU_ARM1136
02627356 597 select SUPPORT_SPL
dd84058d
MY
598
599config TARGET_FLEA3
600 bool "Support flea3"
2e07c249 601 select CPU_ARM1136
dd84058d
MY
602
603config TARGET_MX35PDK
604 bool "Support mx35pdk"
e5ec4815 605 select BOARD_LATE_INIT
2e07c249 606 select CPU_ARM1136
dd84058d 607
ddf6bd48
MY
608config ARCH_BCM283X
609 bool "Broadcom BCM283X family"
58d423b8 610 select DM
58d423b8 611 select DM_GPIO
5ed063d1 612 select DM_SERIAL
76709096 613 select OF_CONTROL
cf2c7784 614 select PL01X_SERIAL
ae5326a6 615 select SERIAL_SEARCH_ALL
08a00cba 616 imply CMD_DM
91d27a17 617 imply FAT_WRITE
46414296 618
ea1a7de5
PR
619config ARCH_BCM63158
620 bool "Broadcom BCM63158 family"
621 select DM
622 select OF_CONTROL
623 imply CMD_DM
624
40b59b05
PR
625config ARCH_BCM6858
626 bool "Broadcom BCM6858 family"
627 select DM
628 select OF_CONTROL
629 imply CMD_DM
630
dd84058d
MY
631config TARGET_VEXPRESS_CA15_TC2
632 bool "Support vexpress_ca15_tc2"
acf15001 633 select CPU_V7A
ea624e19
HG
634 select CPU_V7_HAS_NONSEC
635 select CPU_V7_HAS_VIRT
d10fc50f 636 select PL011_SERIAL
dd84058d 637
894c3ad2
TF
638config ARCH_BCMSTB
639 bool "Broadcom BCM7XXX family"
640 select CPU_V7A
641 select DM
642 select OF_CONTROL
643 select OF_PRIOR_STAGE
08a00cba 644 imply CMD_DM
894c3ad2
TF
645 help
646 This enables support for Broadcom ARM-based set-top box
647 chipsets, including the 7445 family of chips.
648
dd84058d
MY
649config TARGET_VEXPRESS_CA5X2
650 bool "Support vexpress_ca5x2"
acf15001 651 select CPU_V7A
d10fc50f 652 select PL011_SERIAL
dd84058d
MY
653
654config TARGET_VEXPRESS_CA9X4
655 bool "Support vexpress_ca9x4"
acf15001 656 select CPU_V7A
d10fc50f 657 select PL011_SERIAL
dd84058d 658
43486e4c
SR
659config TARGET_BCM23550_W1D
660 bool "Support bcm23550_w1d"
acf15001 661 select CPU_V7A
221a949e 662 imply CRC32_VERIFY
91d27a17 663 imply FAT_WRITE
43486e4c 664
dd84058d
MY
665config TARGET_BCM28155_AP
666 bool "Support bcm28155_ap"
acf15001 667 select CPU_V7A
221a949e 668 imply CRC32_VERIFY
91d27a17 669 imply FAT_WRITE
dd84058d 670
abb1678c
SR
671config TARGET_BCMCYGNUS
672 bool "Support bcmcygnus"
acf15001 673 select CPU_V7A
5ed063d1
MS
674 imply BCM_SF2_ETH
675 imply BCM_SF2_ETH_GMAC
551c3934 676 imply CMD_HASH
5ed063d1 677 imply CRC32_VERIFY
91d27a17 678 imply FAT_WRITE
221a949e 679 imply HASH_VERIFY
c89782dc 680 imply NETDEVICES
9dec5270 681
abb1678c
SR
682config TARGET_BCMNSP
683 bool "Support bcmnsp"
acf15001 684 select CPU_V7A
9dec5270 685
274bced8
JM
686config TARGET_BCMNS2
687 bool "Support Broadcom Northstar2"
688 select ARM64
689 help
690 Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
691 ARMv8 Cortex-A57 processors targeting a broad range of networking
692 applications
693
72df68cc
MY
694config ARCH_EXYNOS
695 bool "Samsung EXYNOS"
58d423b8 696 select DM
5ed063d1 697 select DM_GPIO
fc47cf9d 698 select DM_I2C
5ed063d1 699 select DM_KEYBOARD
58d423b8
MY
700 select DM_SERIAL
701 select DM_SPI
5ed063d1 702 select DM_SPI_FLASH
f1b1f770 703 select SPI
c96d9036 704 imply SYS_THUMB_BUILD
08a00cba 705 imply CMD_DM
91d27a17 706 imply FAT_WRITE
dd84058d 707
311757be
SG
708config ARCH_S5PC1XX
709 bool "Samsung S5PC1XX"
acf15001 710 select CPU_V7A
58d423b8 711 select DM
58d423b8 712 select DM_GPIO
08848e9c 713 select DM_I2C
5ed063d1 714 select DM_SERIAL
08a00cba 715 imply CMD_DM
311757be 716
ef2b694c
MY
717config ARCH_HIGHBANK
718 bool "Calxeda Highbank"
acf15001 719 select CPU_V7A
d10fc50f 720 select PL011_SERIAL
dd84058d 721
5cbbd9bd
MY
722config ARCH_INTEGRATOR
723 bool "ARM Ltd. Integrator family"
3f394e70
LW
724 select DM
725 select DM_SERIAL
cf2c7784 726 select PL01X_SERIAL
08a00cba 727 imply CMD_DM
5cbbd9bd 728
c338f09e
MY
729config ARCH_KEYSTONE
730 bool "TI Keystone"
5ed063d1 731 select CMD_POWEROFF
acf15001 732 select CPU_V7A
02627356 733 select SUPPORT_SPL
7842b6a9 734 select SYS_ARCH_TIMER
5ed063d1 735 select SYS_THUMB_BUILD
d56b4b19 736 imply CMD_MTDPARTS
15dc63d6 737 imply CMD_SAVES
5ed063d1 738 imply FIT
dd84058d 739
586bde93
LV
740config ARCH_K3
741 bool "Texas Instruments' K3 Architecture"
742 select SPL
743 select SUPPORT_SPL
744 select FIT
745
a93fbf4a
MY
746config ARCH_OMAP2PLUS
747 bool "TI OMAP2+"
acf15001 748 select CPU_V7A
0680f1b1 749 select SPL_BOARD_INIT if SPL
ff6c3125 750 select SPL_STACK_R if SPL
a93fbf4a
MY
751 select SUPPORT_SPL
752 imply FIT
753
bfcef28a
BG
754config ARCH_MESON
755 bool "Amlogic Meson"
7325f6cf 756 imply DISTRO_DEFAULTS
bfcef28a
BG
757 help
758 Support for the Meson SoC family developed by Amlogic Inc.,
759 targeted at media players and tablet computers. We currently
760 support the S905 (GXBaby) 64-bit SoC.
761
cbd2fba1
RL
762config ARCH_MEDIATEK
763 bool "MediaTek SoCs"
764 select BINMAN
765 select DM
766 select OF_CONTROL
767 select SPL_DM if SPL
768 select SPL_LIBCOMMON_SUPPORT if SPL
769 select SPL_LIBGENERIC_SUPPORT if SPL
770 select SPL_OF_CONTROL if SPL
771 select SUPPORT_SPL
772 help
773 Support for the MediaTek SoCs family developed by MediaTek Inc.
774 Please refer to doc/README.mediatek for more information.
775
ee54dfea
VZ
776config ARCH_LPC32XX
777 bool "NXP LPC32xx platform"
778 select CPU_ARM926EJS
779 select DM
780 select DM_GPIO
781 select DM_SERIAL
782 select SPL_DM if SPL
783 select SUPPORT_SPL
784 imply CMD_DM
785
b2b8b9be
PF
786config ARCH_IMX8
787 bool "NXP i.MX8 platform"
788 select ARM64
789 select DM
790 select OF_CONTROL
791
cd357ad1 792config ARCH_IMX8M
7a7391fd
PF
793 bool "NXP i.MX8M platform"
794 select ARM64
795 select DM
796 select SUPPORT_SPL
08a00cba 797 imply CMD_DM
7a7391fd 798
c5343d4e
SA
799config ARCH_MX23
800 bool "NXP i.MX23 family"
801 select CPU_ARM926EJS
802 select PL011_SERIAL
803 select SUPPORT_SPL
804
07df697e
FE
805config ARCH_MX25
806 bool "NXP MX25"
807 select CPU_ARM926EJS
8bbff6a7 808 imply MXC_GPIO
07df697e 809
25c5b4e1
SA
810config ARCH_MX28
811 bool "NXP i.MX28 family"
812 select CPU_ARM926EJS
813 select PL011_SERIAL
814 select SUPPORT_SPL
815
3159ec64
ML
816config ARCH_MX31
817 bool "NXP i.MX31 family"
818 select CPU_ARM1136
819
e90a08da 820config ARCH_MX7ULP
6e7bdde4 821 bool "NXP MX7ULP"
acf15001 822 select CPU_V7A
e90a08da 823 select ROM_UNIFIED_SECTIONS
8bbff6a7 824 imply MXC_GPIO
e90a08da 825
1a8150d4
AA
826config ARCH_MX7
827 bool "Freescale MX7"
5ed063d1
MS
828 select ARCH_MISC_INIT
829 select BOARD_EARLY_INIT_F
acf15001 830 select CPU_V7A
2c2e2c9e
YS
831 select SYS_FSL_HAS_SEC if SECURE_BOOT
832 select SYS_FSL_SEC_COMPAT_4
90b80386 833 select SYS_FSL_SEC_LE
8bbff6a7 834 imply MXC_GPIO
1a8150d4 835
89ebc821
BB
836config ARCH_MX6
837 bool "Freescale MX6"
acf15001 838 select CPU_V7A
2c2e2c9e
YS
839 select SYS_FSL_HAS_SEC if SECURE_BOOT
840 select SYS_FSL_SEC_COMPAT_4
90b80386 841 select SYS_FSL_SEC_LE
3a649407 842 select SYS_THUMB_BUILD if SPL
8bbff6a7 843 imply MXC_GPIO
89ebc821 844
b529993e
PT
845if ARCH_MX6
846config SPL_LDSCRIPT
6e7bdde4 847 default "arch/arm/mach-omap2/u-boot-spl.lds"
b529993e
PT
848endif
849
424ee3d1
AR
850config ARCH_MX5
851 bool "Freescale MX5"
a5d67547 852 select BOARD_EARLY_INIT_F
5ed063d1 853 select CPU_V7A
8bbff6a7 854 imply MXC_GPIO
424ee3d1 855
97775d26
MS
856config ARCH_OWL
857 bool "Actions Semi OWL SoCs"
858 select ARM64
859 select DM
860 select DM_SERIAL
861 select OF_CONTROL
08a00cba 862 imply CMD_DM
97775d26 863
32f11829
TT
864config ARCH_QEMU
865 bool "QEMU Virtual Platform"
70a64a07 866 select ARCH_SUPPORT_TFABOOT
32f11829
TT
867 select DM
868 select DM_SERIAL
869 select OF_CONTROL
cf2c7784 870 select PL01X_SERIAL
08a00cba 871 imply CMD_DM
a47c1b5b
AT
872 imply DM_RTC
873 imply RTC_PL031
32f11829 874
1cc95f6e 875config ARCH_RMOBILE
f40b9898 876 bool "Renesas ARM SoCs"
35295964 877 select BOARD_EARLY_INIT_F if !RZA1
1cc95f6e
NI
878 select DM
879 select DM_SERIAL
08a00cba 880 imply CMD_DM
91d27a17 881 imply FAT_WRITE
3a649407 882 imply SYS_THUMB_BUILD
00e4b57e 883 imply ARCH_MISC_INIT if DISPLAY_CPUINFO
dd84058d 884
9702ec00
EP
885config TARGET_S32V234EVB
886 bool "Support s32v234evb"
887 select ARM64
c01e4a1a 888 select SYS_FSL_ERRATUM_ESDHC111
9702ec00 889
08592136
MK
890config ARCH_SNAPDRAGON
891 bool "Qualcomm Snapdragon SoCs"
892 select ARM64
893 select DM
894 select DM_GPIO
895 select DM_SERIAL
5ed063d1 896 select MSM_SMEM
08592136
MK
897 select OF_CONTROL
898 select OF_SEPARATE
654dd4a8 899 select SMEM
5ed063d1 900 select SPMI
08a00cba 901 imply CMD_DM
08592136 902
7865f4b0
MY
903config ARCH_SOCFPGA
904 bool "Altera SOCFPGA family"
48befc00 905 select ARCH_EARLY_INIT_R
d6a61da4 906 select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
5ed063d1 907 select ARM64 if TARGET_SOCFPGA_STRATIX10
a684729a 908 select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
1d9aa3e5 909 select DM
73172753 910 select DM_SERIAL
a684729a 911 select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
48befc00 912 select OF_CONTROL
00057eea 913 select SPL_DM_RESET if DM_RESET
5ed063d1 914 select SPL_DM_SERIAL
48befc00 915 select SPL_LIBCOMMON_SUPPORT
48befc00 916 select SPL_LIBGENERIC_SUPPORT
48befc00
MV
917 select SPL_NAND_SUPPORT if SPL_NAND_DENALI
918 select SPL_OF_CONTROL
5ed063d1 919 select SPL_SEPARATE_BSS if TARGET_SOCFPGA_STRATIX10
48befc00 920 select SPL_SERIAL_SUPPORT
ef72ba0b 921 select SPL_SYSRESET
48befc00
MV
922 select SPL_WATCHDOG_SUPPORT
923 select SUPPORT_SPL
73172753 924 select SYS_NS16550
a684729a 925 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
ef72ba0b
SG
926 select SYSRESET
927 select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
63b312d8 928 select SYSRESET_SOCFPGA_S10 if TARGET_SOCFPGA_STRATIX10
08a00cba 929 imply CMD_DM
d56b4b19 930 imply CMD_MTDPARTS
221a949e 931 imply CRC32_VERIFY
fef4a545
SG
932 imply DM_SPI
933 imply DM_SPI_FLASH
91d27a17 934 imply FAT_WRITE
aef44283
SG
935 imply SPL
936 imply SPL_DM
a9024dc1
SG
937 imply SPL_LIBDISK_SUPPORT
938 imply SPL_MMC_SUPPORT
fef4a545 939 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
f48db4ed 940 imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
a9024dc1
SG
941 imply SPL_SPI_FLASH_SUPPORT
942 imply SPL_SPI_SUPPORT
aaa64803 943 imply L2X0_CACHE
dd84058d 944
2c7e3b90
IC
945config ARCH_SUNXI
946 bool "Support sunxi (Allwinner) SoCs"
d6a0c78a 947 select BINMAN
88bb800d 948 select CMD_GPIO
0878a8a7 949 select CMD_MMC if MMC
2997ee50 950 select CMD_USB if DISTRO_DEFAULTS
e236ff0a 951 select CLK
b6006baf 952 select DM
45368827 953 select DM_ETH
211d57a4
HG
954 select DM_GPIO
955 select DM_KEYBOARD
bb3362b0
JT
956 select DM_MMC if MMC
957 select DM_SCSI if SCSI
45368827 958 select DM_SERIAL
2997ee50 959 select DM_USB if DISTRO_DEFAULTS
d75111a7 960 select OF_BOARD_SETUP
b6006baf
HG
961 select OF_CONTROL
962 select OF_SEPARATE
6f6b7cfa 963 select SPECIFY_CONSOLE_INDEX
ab43de80
TR
964 select SPL_STACK_R if SPL
965 select SPL_SYS_MALLOC_SIMPLE if SPL
3a649407 966 select SPL_SYS_THUMB_BUILD if !ARM64
10cfbaab 967 select SUNXI_GPIO
5ed063d1 968 select SYS_NS16550
ce2e44d8 969 select SYS_THUMB_BUILD if !ARM64
2997ee50 970 select USB if DISTRO_DEFAULTS
2997ee50 971 select USB_KEYBOARD if DISTRO_DEFAULTS
5ed063d1 972 select USB_STORAGE if DISTRO_DEFAULTS
8c7d2296 973 select USE_TINY_PRINTF
08a00cba 974 imply CMD_DM
a12fb0e3 975 imply CMD_GPT
c6cca10b 976 imply CMD_UBI if NAND
7325f6cf 977 imply DISTRO_DEFAULTS
91d27a17 978 imply FAT_WRITE
2f13cf35 979 imply FIT
eff264d7 980 imply OF_LIBFDT_OVERLAY
af83a604
MY
981 imply PRE_CONSOLE_BUFFER
982 imply SPL_GPIO_SUPPORT
983 imply SPL_LIBCOMMON_SUPPORT
af83a604 984 imply SPL_LIBGENERIC_SUPPORT
4aa2ba3a 985 imply SPL_MMC_SUPPORT if MMC
af83a604
MY
986 imply SPL_POWER_SUPPORT
987 imply SPL_SERIAL_SUPPORT
654b02b1 988 imply USB_GADGET
8ebe4f42 989
ec48b6c9
MS
990config ARCH_VERSAL
991 bool "Support Xilinx Versal Platform"
992 select ARM64
993 select CLK
994 select DM
fa797157
MS
995 select DM_ETH if NET
996 select DM_MMC if MMC
ec48b6c9
MS
997 select DM_SERIAL
998 select OF_CONTROL
bfd092f9 999 imply BOARD_LATE_INIT
ec48b6c9 1000
7966b437
SA
1001config ARCH_VF610
1002 bool "Freescale Vybrid"
acf15001 1003 select CPU_V7A
c01e4a1a 1004 select SYS_FSL_ERRATUM_ESDHC111
d56b4b19 1005 imply CMD_MTDPARTS
5bbc265b 1006 imply NAND
e7b860fa 1007
5ca269a4 1008config ARCH_ZYNQ
b8d4497f 1009 bool "Xilinx Zynq based platform"
5ed063d1 1010 select BOARD_EARLY_INIT_F if WDT
5ed063d1
MS
1011 select CLK
1012 select CLK_ZYNQ
acf15001 1013 select CPU_V7A
8981f05c 1014 select DM
c4a142f4 1015 select DM_ETH if NET
c4a142f4 1016 select DM_MMC if MMC
42800ffa 1017 select DM_SERIAL
5ed063d1 1018 select DM_SPI
9f7a4502 1019 select DM_SPI_FLASH
dec49e86 1020 select DM_USB if USB
5ed063d1 1021 select OF_CONTROL
f1b1f770 1022 select SPI
5ed063d1
MS
1023 select SPL_BOARD_INIT if SPL
1024 select SPL_CLK if SPL
1025 select SPL_DM if SPL
1026 select SPL_OF_CONTROL if SPL
1027 select SPL_SEPARATE_BSS if SPL
1028 select SUPPORT_SPL
1029 imply ARCH_EARLY_INIT_R
8eb55e19 1030 imply BOARD_LATE_INIT
d315628e 1031 imply CMD_CLK
08a00cba 1032 imply CMD_DM
72c3033f 1033 imply CMD_SPL
5ed063d1 1034 imply FAT_WRITE
dd84058d 1035
1d6c54ec
MS
1036config ARCH_ZYNQMP_R5
1037 bool "Xilinx ZynqMP R5 based platform"
5ed063d1 1038 select CLK
1d6c54ec 1039 select CPU_V7R
1d6c54ec 1040 select DM
6f96fb50
MS
1041 select DM_ETH if NET
1042 select DM_MMC if MMC
1d6c54ec 1043 select DM_SERIAL
5ed063d1 1044 select OF_CONTROL
08a00cba 1045 imply CMD_DM
687ab545 1046 imply DM_USB_GADGET
1d6c54ec 1047
0b54a9dd 1048config ARCH_ZYNQMP
b8d4497f 1049 bool "Xilinx ZynqMP based platform"
84c7204b 1050 select ARM64
5ed063d1 1051 select CLK
c2490bf5 1052 select DM
fb693108
MS
1053 select DM_ETH if NET
1054 select DM_MMC if MMC
c2490bf5 1055 select DM_SERIAL
088f83ee
MS
1056 select DM_SPI if SPI
1057 select DM_SPI_FLASH if DM_SPI
5ed063d1
MS
1058 select DM_USB if USB
1059 select OF_CONTROL
0680f1b1 1060 select SPL_BOARD_INIT if SPL
2f03968e 1061 select SPL_CLK if SPL
850e7795 1062 select SPL_SEPARATE_BSS if SPL
5ed063d1 1063 select SUPPORT_SPL
8eb55e19 1064 imply BOARD_LATE_INIT
08a00cba 1065 imply CMD_DM
91d27a17 1066 imply FAT_WRITE
22270ca0 1067 imply MP
687ab545 1068 imply DM_USB_GADGET
84c7204b 1069
ddd960e6
MY
1070config TEGRA
1071 bool "NVIDIA Tegra"
7325f6cf 1072 imply DISTRO_DEFAULTS
91d27a17 1073 imply FAT_WRITE
dd84058d 1074
f91afc4d 1075config TARGET_VEXPRESS64_AEMV8A
dd84058d 1076 bool "Support vexpress_aemv8a"
016a954e 1077 select ARM64
cf2c7784 1078 select PL01X_SERIAL
dd84058d 1079
f91afc4d
LW
1080config TARGET_VEXPRESS64_BASE_FVP
1081 bool "Support Versatile Express ARMv8a FVP BASE model"
1082 select ARM64
cf2c7784 1083 select PL01X_SERIAL
5ed063d1 1084 select SEMIHOSTING
f91afc4d 1085
ffc10373
LW
1086config TARGET_VEXPRESS64_JUNO
1087 bool "Support Versatile Express Juno Development Platform"
1088 select ARM64
cf2c7784 1089 select PL01X_SERIAL
ffc10373 1090
44937214
PK
1091config TARGET_LS2080A_EMU
1092 bool "Support ls2080a_emu"
fb2bf8c2 1093 select ARCH_LS2080A
5ed063d1 1094 select ARCH_MISC_INIT
016a954e 1095 select ARM64
23b5877c 1096 select ARMV8_MULTIENTRY
32413125 1097 select FSL_DDR_SYNC_REFRESH
44937214
PK
1098 help
1099 Support for Freescale LS2080A_EMU platform
1100 The LS2080A Development System (EMULATOR) is a pre silicon
1101 development platform that supports the QorIQ LS2080A
1102 Layerscape Architecture processor.
dd84058d 1103
44937214
PK
1104config TARGET_LS2080A_SIMU
1105 bool "Support ls2080a_simu"
fb2bf8c2 1106 select ARCH_LS2080A
5ed063d1 1107 select ARCH_MISC_INIT
016a954e 1108 select ARM64
23b5877c 1109 select ARMV8_MULTIENTRY
acf40f50 1110 select BOARD_LATE_INIT
44937214
PK
1111 help
1112 Support for Freescale LS2080A_SIMU platform
1113 The LS2080A Development System (QDS) is a pre silicon
1114 development platform that supports the QorIQ LS2080A
1115 Layerscape Architecture processor.
dd84058d 1116
7769776a
AK
1117config TARGET_LS1088AQDS
1118 bool "Support ls1088aqds"
1119 select ARCH_LS1088A
5ed063d1 1120 select ARCH_MISC_INIT
7769776a
AK
1121 select ARM64
1122 select ARMV8_MULTIENTRY
6324d506 1123 select ARCH_SUPPORT_TFABOOT
7769776a 1124 select BOARD_LATE_INIT
91fded62 1125 select SUPPORT_SPL
32413125 1126 select FSL_DDR_INTERACTIVE if !SD_BOOT
7769776a
AK
1127 help
1128 Support for NXP LS1088AQDS platform
1129 The LS1088A Development System (QDS) is a high-performance
1130 development platform that supports the QorIQ LS1088A
1131 Layerscape Architecture processor.
1132
44937214
PK
1133config TARGET_LS2080AQDS
1134 bool "Support ls2080aqds"
fb2bf8c2 1135 select ARCH_LS2080A
5ed063d1 1136 select ARCH_MISC_INIT
7288c2c2
YS
1137 select ARM64
1138 select ARMV8_MULTIENTRY
6324d506 1139 select ARCH_SUPPORT_TFABOOT
e5ec4815 1140 select BOARD_LATE_INIT
b2d5ac59 1141 select SUPPORT_SPL
fedb428c 1142 imply SCSI
9fd95ef0 1143 imply SCSI_AHCI
32413125
RB
1144 select FSL_DDR_BIST
1145 select FSL_DDR_INTERACTIVE if !SPL
7288c2c2 1146 help
44937214
PK
1147 Support for Freescale LS2080AQDS platform
1148 The LS2080A Development System (QDS) is a high-performance
1149 development platform that supports the QorIQ LS2080A
7288c2c2
YS
1150 Layerscape Architecture processor.
1151
44937214
PK
1152config TARGET_LS2080ARDB
1153 bool "Support ls2080ardb"
fb2bf8c2 1154 select ARCH_LS2080A
5ed063d1 1155 select ARCH_MISC_INIT
e2b65ea9
YS
1156 select ARM64
1157 select ARMV8_MULTIENTRY
6324d506 1158 select ARCH_SUPPORT_TFABOOT
e5ec4815 1159 select BOARD_LATE_INIT
32eda7cc 1160 select SUPPORT_SPL
32413125
RB
1161 select FSL_DDR_BIST
1162 select FSL_DDR_INTERACTIVE if !SPL
fedb428c 1163 imply SCSI
9fd95ef0 1164 imply SCSI_AHCI
e2b65ea9 1165 help
44937214
PK
1166 Support for Freescale LS2080ARDB platform.
1167 The LS2080A Reference design board (RDB) is a high-performance
1168 development platform that supports the QorIQ LS2080A
e2b65ea9
YS
1169 Layerscape Architecture processor.
1170
3049a583
PJ
1171config TARGET_LS2081ARDB
1172 bool "Support ls2081ardb"
1173 select ARCH_LS2080A
5ed063d1 1174 select ARCH_MISC_INIT
3049a583
PJ
1175 select ARM64
1176 select ARMV8_MULTIENTRY
1177 select BOARD_LATE_INIT
1178 select SUPPORT_SPL
3049a583
PJ
1179 help
1180 Support for Freescale LS2081ARDB platform.
1181 The LS2081A Reference design board (RDB) is a high-performance
1182 development platform that supports the QorIQ LS2081A/LS2041A
1183 Layerscape Architecture processor.
1184
58c3e620
PJ
1185config TARGET_LX2160ARDB
1186 bool "Support lx2160ardb"
1187 select ARCH_LX2160A
1188 select ARCH_MISC_INIT
1189 select ARM64
1190 select ARMV8_MULTIENTRY
6324d506 1191 select ARCH_SUPPORT_TFABOOT
58c3e620
PJ
1192 select BOARD_LATE_INIT
1193 help
1194 Support for NXP LX2160ARDB platform.
1195 The lx2160ardb (LX2160A Reference design board (RDB)
1196 is a high-performance development platform that supports the
1197 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1198
1eba723c
PB
1199config TARGET_LX2160AQDS
1200 bool "Support lx2160aqds"
1201 select ARCH_LX2160A
1202 select ARCH_MISC_INIT
1203 select ARM64
1204 select ARMV8_MULTIENTRY
6324d506 1205 select ARCH_SUPPORT_TFABOOT
1eba723c
PB
1206 select BOARD_LATE_INIT
1207 help
1208 Support for NXP LX2160AQDS platform.
1209 The lx2160aqds (LX2160A QorIQ Development System (QDS)
1210 is a high-performance development platform that supports the
1211 QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
1212
11ac2363
PG
1213config TARGET_HIKEY
1214 bool "Support HiKey 96boards Consumer Edition Platform"
1215 select ARM64
efd7b60a
PG
1216 select DM
1217 select DM_GPIO
9c71bcdc 1218 select DM_SERIAL
cd593ed6 1219 select OF_CONTROL
cf2c7784 1220 select PL01X_SERIAL
6f6b7cfa 1221 select SPECIFY_CONSOLE_INDEX
08a00cba 1222 imply CMD_DM
11ac2363
PG
1223 help
1224 Support for HiKey 96boards platform. It features a HI6220
1225 SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
1226
c62c7ef7
MS
1227config TARGET_HIKEY960
1228 bool "Support HiKey960 96boards Consumer Edition Platform"
1229 select ARM64
1230 select DM
1231 select DM_SERIAL
1232 select OF_CONTROL
1233 select PL01X_SERIAL
1234 imply CMD_DM
1235 help
1236 Support for HiKey960 96boards platform. It features a HI3660
1237 SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
1238
d754254f
JRO
1239config TARGET_POPLAR
1240 bool "Support Poplar 96boards Enterprise Edition Platform"
1241 select ARM64
1242 select DM
d754254f
JRO
1243 select DM_SERIAL
1244 select DM_USB
5ed063d1 1245 select OF_CONTROL
cf2c7784 1246 select PL01X_SERIAL
08a00cba 1247 imply CMD_DM
d754254f
JRO
1248 help
1249 Support for Poplar 96boards EE platform. It features a HI3798cv200
1250 SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
1251 making it capable of running any commercial set-top solution based on
1252 Linux or Android.
1253
9d044fcb
PK
1254config TARGET_LS1012AQDS
1255 bool "Support ls1012aqds"
9533acf3 1256 select ARCH_LS1012A
9d044fcb 1257 select ARM64
6324d506 1258 select ARCH_SUPPORT_TFABOOT
e5ec4815 1259 select BOARD_LATE_INIT
9d044fcb
PK
1260 help
1261 Support for Freescale LS1012AQDS platform.
1262 The LS1012A Development System (QDS) is a high-performance
1263 development platform that supports the QorIQ LS1012A
1264 Layerscape Architecture processor.
1265
3b6e3898
PK
1266config TARGET_LS1012ARDB
1267 bool "Support ls1012ardb"
9533acf3 1268 select ARCH_LS1012A
3b6e3898 1269 select ARM64
6324d506 1270 select ARCH_SUPPORT_TFABOOT
e5ec4815 1271 select BOARD_LATE_INIT
fedb428c 1272 imply SCSI
9fd95ef0 1273 imply SCSI_AHCI
3b6e3898
PK
1274 help
1275 Support for Freescale LS1012ARDB platform.
1276 The LS1012A Reference design board (RDB) is a high-performance
1277 development platform that supports the QorIQ LS1012A
1278 Layerscape Architecture processor.
1279
b0ce187b
BU
1280config TARGET_LS1012A2G5RDB
1281 bool "Support ls1012a2g5rdb"
1282 select ARCH_LS1012A
1283 select ARM64
6324d506 1284 select ARCH_SUPPORT_TFABOOT
b0ce187b
BU
1285 select BOARD_LATE_INIT
1286 imply SCSI
1287 help
1288 Support for Freescale LS1012A2G5RDB platform.
1289 The LS1012A 2G5 Reference design board (RDB) is a high-performance
1290 development platform that supports the QorIQ LS1012A
1291 Layerscape Architecture processor.
1292
9629ccdd
BU
1293config TARGET_LS1012AFRWY
1294 bool "Support ls1012afrwy"
1295 select ARCH_LS1012A
1296 select ARM64
6324d506 1297 select ARCH_SUPPORT_TFABOOT
5ed063d1 1298 select BOARD_LATE_INIT
9629ccdd
BU
1299 imply SCSI
1300 imply SCSI_AHCI
1301 help
1302 Support for Freescale LS1012AFRWY platform.
1303 The LS1012A FRWY board (FRWY) is a high-performance
1304 development platform that supports the QorIQ LS1012A
1305 Layerscape Architecture processor.
1306
ff78aa2b
PK
1307config TARGET_LS1012AFRDM
1308 bool "Support ls1012afrdm"
9533acf3 1309 select ARCH_LS1012A
ff78aa2b 1310 select ARM64
6324d506 1311 select ARCH_SUPPORT_TFABOOT
ff78aa2b
PK
1312 help
1313 Support for Freescale LS1012AFRDM platform.
1314 The LS1012A Freedom board (FRDM) is a high-performance
1315 development platform that supports the QorIQ LS1012A
1316 Layerscape Architecture processor.
1317
f278a217
YT
1318config TARGET_LS1028AQDS
1319 bool "Support ls1028aqds"
1320 select ARCH_LS1028A
1321 select ARM64
1322 select ARMV8_MULTIENTRY
6324d506 1323 select ARCH_SUPPORT_TFABOOT
acf40f50 1324 select BOARD_LATE_INIT
a02a9421 1325 select ARCH_MISC_INIT
f278a217
YT
1326 help
1327 Support for Freescale LS1028AQDS platform
1328 The LS1028A Development System (QDS) is a high-performance
1329 development platform that supports the QorIQ LS1028A
1330 Layerscape Architecture processor.
1331
353f36d9
YT
1332config TARGET_LS1028ARDB
1333 bool "Support ls1028ardb"
1334 select ARCH_LS1028A
1335 select ARM64
1336 select ARMV8_MULTIENTRY
6324d506 1337 select ARCH_SUPPORT_TFABOOT
353f36d9
YT
1338 help
1339 Support for Freescale LS1028ARDB platform
1340 The LS1028A Development System (RDB) is a high-performance
1341 development platform that supports the QorIQ LS1028A
1342 Layerscape Architecture processor.
1343
e84a324b
AK
1344config TARGET_LS1088ARDB
1345 bool "Support ls1088ardb"
1346 select ARCH_LS1088A
5ed063d1 1347 select ARCH_MISC_INIT
e84a324b
AK
1348 select ARM64
1349 select ARMV8_MULTIENTRY
6324d506 1350 select ARCH_SUPPORT_TFABOOT
e84a324b 1351 select BOARD_LATE_INIT
099f4093 1352 select SUPPORT_SPL
32413125 1353 select FSL_DDR_INTERACTIVE if !SD_BOOT
e84a324b
AK
1354 help
1355 Support for NXP LS1088ARDB platform.
1356 The LS1088A Reference design board (RDB) is a high-performance
1357 development platform that supports the QorIQ LS1088A
1358 Layerscape Architecture processor.
1359
550e3dc0 1360config TARGET_LS1021AQDS
0de15707 1361 bool "Support ls1021aqds"
5ed063d1
MS
1362 select ARCH_LS1021A
1363 select ARCH_SUPPORT_PSCI
1364 select BOARD_EARLY_INIT_F
e5ec4815 1365 select BOARD_LATE_INIT
acf15001 1366 select CPU_V7A
adee1d4c
HZ
1367 select CPU_V7_HAS_NONSEC
1368 select CPU_V7_HAS_VIRT
5e8bd7e1 1369 select LS1_DEEP_SLEEP
5ed063d1 1370 select SUPPORT_SPL
d26e34c4 1371 select SYS_FSL_DDR
32413125 1372 select FSL_DDR_INTERACTIVE
fedb428c 1373 imply SCSI
217f92bb 1374
c8a7d9da 1375config TARGET_LS1021ATWR
0de15707 1376 bool "Support ls1021atwr"
5ed063d1
MS
1377 select ARCH_LS1021A
1378 select ARCH_SUPPORT_PSCI
1379 select BOARD_EARLY_INIT_F
e5ec4815 1380 select BOARD_LATE_INIT
acf15001 1381 select CPU_V7A
adee1d4c
HZ
1382 select CPU_V7_HAS_NONSEC
1383 select CPU_V7_HAS_VIRT
5e8bd7e1 1384 select LS1_DEEP_SLEEP
5ed063d1 1385 select SUPPORT_SPL
fedb428c 1386 imply SCSI
c8a7d9da 1387
87821220
JW
1388config TARGET_LS1021ATSN
1389 bool "Support ls1021atsn"
1390 select ARCH_LS1021A
1391 select ARCH_SUPPORT_PSCI
1392 select BOARD_EARLY_INIT_F
1393 select BOARD_LATE_INIT
1394 select CPU_V7A
1395 select CPU_V7_HAS_NONSEC
1396 select CPU_V7_HAS_VIRT
1397 select LS1_DEEP_SLEEP
1398 select SUPPORT_SPL
1399 imply SCSI
1400
20c700f8
FL
1401config TARGET_LS1021AIOT
1402 bool "Support ls1021aiot"
5ed063d1
MS
1403 select ARCH_LS1021A
1404 select ARCH_SUPPORT_PSCI
e5ec4815 1405 select BOARD_LATE_INIT
acf15001 1406 select CPU_V7A
20c700f8
FL
1407 select CPU_V7_HAS_NONSEC
1408 select CPU_V7_HAS_VIRT
1409 select SUPPORT_SPL
fedb428c 1410 imply SCSI
20c700f8
FL
1411 help
1412 Support for Freescale LS1021AIOT platform.
1413 The LS1021A Freescale board (IOT) is a high-performance
1414 development platform that supports the QorIQ LS1021A
1415 Layerscape Architecture processor.
1416
02b5d2ed
SX
1417config TARGET_LS1043AQDS
1418 bool "Support ls1043aqds"
0a37cf8f 1419 select ARCH_LS1043A
02b5d2ed
SX
1420 select ARM64
1421 select ARMV8_MULTIENTRY
6324d506 1422 select ARCH_SUPPORT_TFABOOT
5ed063d1 1423 select BOARD_EARLY_INIT_F
e5ec4815 1424 select BOARD_LATE_INIT
02b5d2ed 1425 select SUPPORT_SPL
32413125 1426 select FSL_DDR_INTERACTIVE if !SPL
fedb428c 1427 imply SCSI
f11e492a 1428 imply SCSI_AHCI
02b5d2ed
SX
1429 help
1430 Support for Freescale LS1043AQDS platform.
1431
f3a8e2b7
MH
1432config TARGET_LS1043ARDB
1433 bool "Support ls1043ardb"
0a37cf8f 1434 select ARCH_LS1043A
f3a8e2b7 1435 select ARM64
831c068f 1436 select ARMV8_MULTIENTRY
6324d506 1437 select ARCH_SUPPORT_TFABOOT
5ed063d1 1438 select BOARD_EARLY_INIT_F
e5ec4815 1439 select BOARD_LATE_INIT
3ad44729 1440 select SUPPORT_SPL
f3a8e2b7
MH
1441 help
1442 Support for Freescale LS1043ARDB platform.
1443
126fe70d
SX
1444config TARGET_LS1046AQDS
1445 bool "Support ls1046aqds"
da28e58a 1446 select ARCH_LS1046A
126fe70d
SX
1447 select ARM64
1448 select ARMV8_MULTIENTRY
6324d506 1449 select ARCH_SUPPORT_TFABOOT
5ed063d1 1450 select BOARD_EARLY_INIT_F
e5ec4815 1451 select BOARD_LATE_INIT
126fe70d 1452 select DM_SPI_FLASH if DM_SPI
5ed063d1 1453 select SUPPORT_SPL
32413125
RB
1454 select FSL_DDR_BIST if !SPL
1455 select FSL_DDR_INTERACTIVE if !SPL
1456 select FSL_DDR_INTERACTIVE if !SPL
fedb428c 1457 imply SCSI
126fe70d
SX
1458 help
1459 Support for Freescale LS1046AQDS platform.
1460 The LS1046A Development System (QDS) is a high-performance
1461 development platform that supports the QorIQ LS1046A
1462 Layerscape Architecture processor.
1463
dd02936f
MH
1464config TARGET_LS1046ARDB
1465 bool "Support ls1046ardb"
da28e58a 1466 select ARCH_LS1046A
dd02936f
MH
1467 select ARM64
1468 select ARMV8_MULTIENTRY
6324d506 1469 select ARCH_SUPPORT_TFABOOT
5ed063d1 1470 select BOARD_EARLY_INIT_F
e5ec4815 1471 select BOARD_LATE_INIT
dd02936f 1472 select DM_SPI_FLASH if DM_SPI
dccef2ec 1473 select POWER_MC34VR500
5ed063d1 1474 select SUPPORT_SPL
32413125
RB
1475 select FSL_DDR_BIST
1476 select FSL_DDR_INTERACTIVE if !SPL
fedb428c 1477 imply SCSI
dd02936f
MH
1478 help
1479 Support for Freescale LS1046ARDB platform.
1480 The LS1046A Reference Design Board (RDB) is a high-performance
1481 development platform that supports the QorIQ LS1046A
1482 Layerscape Architecture processor.
1483
d90c7ac7
VS
1484config TARGET_LS1046AFRWY
1485 bool "Support ls1046afrwy"
1486 select ARCH_LS1046A
1487 select ARM64
1488 select ARMV8_MULTIENTRY
6324d506 1489 select ARCH_SUPPORT_TFABOOT
d90c7ac7
VS
1490 select BOARD_EARLY_INIT_F
1491 select BOARD_LATE_INIT
1492 select DM_SPI_FLASH if DM_SPI
1493 imply SCSI
1494 help
1495 Support for Freescale LS1046AFRWY platform.
1496 The LS1046A Freeway Board (FRWY) is a high-performance
1497 development platform that supports the QorIQ LS1046A
1498 Layerscape Architecture processor.
dd84058d
MY
1499config TARGET_H2200
1500 bool "Support h2200"
2e07c249 1501 select CPU_PXA
dd84058d 1502
dd84058d
MY
1503config TARGET_COLIBRI_PXA270
1504 bool "Support colibri_pxa270"
2e07c249 1505 select CPU_PXA
dd84058d 1506
66cba041 1507config ARCH_UNIPHIER
b6ef3a3f 1508 bool "Socionext UniPhier SoCs"
e5ec4815 1509 select BOARD_LATE_INIT
4e819950 1510 select DM
b800cbde 1511 select DM_GPIO
4e819950 1512 select DM_I2C
4aceb3f8 1513 select DM_MMC
4fb96c48 1514 select DM_RESET
b5550e49 1515 select DM_SERIAL
47a79f65 1516 select DM_USB
65fce763 1517 select OF_BOARD_SETUP
b5550e49
MY
1518 select OF_CONTROL
1519 select OF_LIBFDT
27350c92 1520 select PINCTRL
0680f1b1 1521 select SPL_BOARD_INIT if SPL
561ca649
MY
1522 select SPL_DM if SPL
1523 select SPL_LIBCOMMON_SUPPORT if SPL
1524 select SPL_LIBGENERIC_SUPPORT if SPL
1525 select SPL_OF_CONTROL if SPL
1526 select SPL_PINCTRL if SPL
b5550e49 1527 select SUPPORT_SPL
08a00cba 1528 imply CMD_DM
7ef5b1e7 1529 imply DISTRO_DEFAULTS
91d27a17 1530 imply FAT_WRITE
b6ef3a3f
MY
1531 help
1532 Support for UniPhier SoC family developed by Socionext Inc.
1533 (formerly, System LSI Business Division of Panasonic Corporation)
66cba041 1534
0a61ee88 1535config STM32
2514c2d0 1536 bool "Support STMicroelectronics STM32 MCU with cortex M"
ed09a554 1537 select CPU_V7M
66562414
KL
1538 select DM
1539 select DM_SERIAL
08a00cba 1540 imply CMD_DM
ed09a554 1541
94e9a4ef
PC
1542config ARCH_STI
1543 bool "Support STMicrolectronics SoCs"
5ed063d1 1544 select BLK
acf15001 1545 select CPU_V7A
214a17e6 1546 select DM
eee20f81 1547 select DM_MMC
584861ff 1548 select DM_RESET
5ed063d1 1549 select DM_SERIAL
08a00cba 1550 imply CMD_DM
94e9a4ef
PC
1551 help
1552 Support for STMicroelectronics STiH407/10 SoC family.
1553 This SoC is used on Linaro 96Board STiH410-B2260
1554
2514c2d0
PD
1555config ARCH_STM32MP
1556 bool "Support STMicroelectronics STM32MP Socs with cortex A"
08772f6e 1557 select ARCH_MISC_INIT
2514c2d0
PD
1558 select BOARD_LATE_INIT
1559 select CLK
1560 select DM
1561 select DM_GPIO
1562 select DM_RESET
1563 select DM_SERIAL
5ed063d1 1564 select MISC
2514c2d0
PD
1565 select OF_CONTROL
1566 select OF_LIBFDT
05d36936 1567 select OF_SYSTEM_SETUP
2514c2d0
PD
1568 select PINCTRL
1569 select REGMAP
1570 select SUPPORT_SPL
1571 select SYSCON
86634a93 1572 select SYSRESET
2514c2d0 1573 select SYS_THUMB_BUILD
09259fce 1574 imply SPL_SYSRESET
08a00cba 1575 imply CMD_DM
c16cc4f6 1576 imply CMD_POWEROFF
f219361d 1577 imply OF_LIBFDT_OVERLAY
b4ae34b6 1578 imply ENV_VARS_UBOOT_RUNTIME_CONFIG
ce3772ca 1579 imply USE_PREBOOT
2514c2d0
PD
1580 help
1581 Support for STM32MP SoC family developed by STMicroelectronics,
1582 MPUs based on ARM cortex A core
abf2678f
PD
1583 U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
1584 FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
1585 chain.
1586 SPL is the unsecure FSBL for the basic boot chain.
2514c2d0 1587
2444dae5
SG
1588config ARCH_ROCKCHIP
1589 bool "Support Rockchip SoCs"
aa15038c 1590 select BLK
2444dae5 1591 select DM
aa15038c
SG
1592 select DM_GPIO
1593 select DM_I2C
1594 select DM_MMC
5ed063d1
MS
1595 select DM_PWM
1596 select DM_REGULATOR
aa15038c
SG
1597 select DM_SERIAL
1598 select DM_SPI
1599 select DM_SPI_FLASH
892742df 1600 select DM_USB if USB
14ad6eb2 1601 select ENABLE_ARM_SOC_BOOT0_HOOK
5ed063d1 1602 select OF_CONTROL
f1b1f770 1603 select SPI
5ed063d1
MS
1604 select SPL_DM if SPL
1605 select SPL_SYS_MALLOC_SIMPLE if SPL
1606 select SYS_MALLOC_F
1607 select SYS_THUMB_BUILD if !ARM64
1608 imply ADC
08a00cba 1609 imply CMD_DM
b0a569da 1610 imply DEBUG_UART_BOARD_INIT
7325f6cf 1611 imply DISTRO_DEFAULTS
91d27a17 1612 imply FAT_WRITE
8e8bcccc 1613 imply SARADC_ROCKCHIP
5ed063d1 1614 imply SPL_SYSRESET
c3c0331d 1615 imply SYS_NS16550
5ed063d1
MS
1616 imply TPL_SYSRESET
1617 imply USB_FUNCTION_FASTBOOT
2444dae5 1618
746f985a
ST
1619config TARGET_THUNDERX_88XX
1620 bool "Support ThunderX 88xx"
b4ba1693 1621 select ARM64
746f985a 1622 select OF_CONTROL
cf2c7784 1623 select PL01X_SERIAL
5ed063d1 1624 select SYS_CACHE_SHIFT_7
746f985a 1625
4697abea 1626config ARCH_ASPEED
1627 bool "Support Aspeed SoCs"
4697abea 1628 select DM
5ed063d1 1629 select OF_CONTROL
08a00cba 1630 imply CMD_DM
4697abea 1631
dd84058d
MY
1632endchoice
1633
6324d506
AT
1634config ARCH_SUPPORT_TFABOOT
1635 bool
1636
1637config TFABOOT
1638 bool "Support for booting from TF-A"
1639 depends on ARCH_SUPPORT_TFABOOT
1640 default n
1641 help
1642 Enabling this will make a U-Boot binary that is capable of being
1643 booted via TF-A.
1644
5fbed8f2
AD
1645config TI_SECURE_DEVICE
1646 bool "HS Device Type Support"
3a543a80 1647 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
5fbed8f2
AD
1648 help
1649 If a high secure (HS) device type is being used, this config
1650 must be set. This option impacts various aspects of the
1651 build system (to create signed boot images that can be
1652 authenticated) and the code. See the doc/README.ti-secure
1653 file for further details.
1654
9c4b0131
TR
1655if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
1656config ISW_ENTRY_ADDR
1657 hex "Address in memory or XIP address of bootloader entry point"
1658 default 0x402F4000 if AM43XX
1659 default 0x402F0400 if AM33XX
1660 default 0x40301350 if OMAP54XX
1661 help
1662 After any reset, the boot ROM searches the boot media for a valid
1663 boot image. For non-XIP devices, the ROM then copies the image into
1664 internal memory. For all boot modes, after the ROM processes the
1665 boot image it eventually computes the entry point address depending
1666 on the device type (secure/non-secure), boot media (xip/non-xip) and
1667 image headers.
1668endif
1669
4697abea 1670source "arch/arm/mach-aspeed/Kconfig"
1671
4614b891
MY
1672source "arch/arm/mach-at91/Kconfig"
1673
ddf6bd48 1674source "arch/arm/mach-bcm283x/Kconfig"
3491ba63 1675
894c3ad2
TF
1676source "arch/arm/mach-bcmstb/Kconfig"
1677
ddf6bd48 1678source "arch/arm/mach-davinci/Kconfig"
34e609ca 1679
77b55e8c 1680source "arch/arm/mach-exynos/Kconfig"
72df68cc 1681
72a8ff4b 1682source "arch/arm/mach-highbank/Kconfig"
ef2b694c 1683
5cbbd9bd
MY
1684source "arch/arm/mach-integrator/Kconfig"
1685
586bde93
LV
1686source "arch/arm/mach-k3/Kconfig"
1687
39a72345 1688source "arch/arm/mach-keystone/Kconfig"
c338f09e 1689
56f86e39 1690source "arch/arm/mach-kirkwood/Kconfig"
47539e23 1691
ee54dfea
VZ
1692source "arch/arm/cpu/arm926ejs/lpc32xx/Kconfig"
1693
c3d89140
SR
1694source "arch/arm/mach-mvebu/Kconfig"
1695
0a37cf8f
YS
1696source "arch/arm/cpu/armv7/ls102xa/Kconfig"
1697
07df697e
FE
1698source "arch/arm/mach-imx/mx2/Kconfig"
1699
3159ec64
ML
1700source "arch/arm/mach-imx/mx3/Kconfig"
1701
7a7391fd
PF
1702source "arch/arm/mach-imx/mx5/Kconfig"
1703
1704source "arch/arm/mach-imx/mx6/Kconfig"
e90a08da 1705
552a848e 1706source "arch/arm/mach-imx/mx7/Kconfig"
1a8150d4 1707
7a7391fd 1708source "arch/arm/mach-imx/mx7ulp/Kconfig"
89ebc821 1709
b2b8b9be
PF
1710source "arch/arm/mach-imx/imx8/Kconfig"
1711
cd357ad1 1712source "arch/arm/mach-imx/imx8m/Kconfig"
424ee3d1 1713
c5343d4e
SA
1714source "arch/arm/mach-imx/mxs/Kconfig"
1715
983e3700 1716source "arch/arm/mach-omap2/Kconfig"
6384726d 1717
da28e58a
YS
1718source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
1719
3e93b4e6 1720source "arch/arm/mach-orion5x/Kconfig"
22f2be7a 1721
97775d26
MS
1722source "arch/arm/mach-owl/Kconfig"
1723
badbb63c 1724source "arch/arm/mach-rmobile/Kconfig"
f40b9898 1725
bfcef28a
BG
1726source "arch/arm/mach-meson/Kconfig"
1727
cbd2fba1
RL
1728source "arch/arm/mach-mediatek/Kconfig"
1729
32f11829
TT
1730source "arch/arm/mach-qemu/Kconfig"
1731
2444dae5
SG
1732source "arch/arm/mach-rockchip/Kconfig"
1733
225f5eec 1734source "arch/arm/mach-s5pc1xx/Kconfig"
311757be 1735
08592136
MK
1736source "arch/arm/mach-snapdragon/Kconfig"
1737
7865f4b0
MY
1738source "arch/arm/mach-socfpga/Kconfig"
1739
94e9a4ef
PC
1740source "arch/arm/mach-sti/Kconfig"
1741
0a61ee88
VM
1742source "arch/arm/mach-stm32/Kconfig"
1743
2514c2d0
PD
1744source "arch/arm/mach-stm32mp/Kconfig"
1745
3abfd887
MY
1746source "arch/arm/mach-sunxi/Kconfig"
1747
09f455dc 1748source "arch/arm/mach-tegra/Kconfig"
ddd960e6 1749
4c425570 1750source "arch/arm/mach-uniphier/Kconfig"
66cba041 1751
7966b437
SA
1752source "arch/arm/cpu/armv7/vf610/Kconfig"
1753
0107f240 1754source "arch/arm/mach-zynq/Kconfig"
ddd960e6 1755
274ccb5b
MS
1756source "arch/arm/mach-zynqmp/Kconfig"
1757
ec48b6c9
MS
1758source "arch/arm/mach-versal/Kconfig"
1759
1d6c54ec
MS
1760source "arch/arm/mach-zynqmp-r5/Kconfig"
1761
ea624e19
HG
1762source "arch/arm/cpu/armv7/Kconfig"
1763
23b5877c
LW
1764source "arch/arm/cpu/armv8/Kconfig"
1765
552a848e 1766source "arch/arm/mach-imx/Kconfig"
a05a6045 1767
d8ccbe93 1768source "board/bosch/shc/Kconfig"
45123804 1769source "board/bosch/guardian/Kconfig"
dd84058d 1770source "board/CarMediaLab/flea3/Kconfig"
dd84058d 1771source "board/Marvell/aspenite/Kconfig"
dd84058d 1772source "board/Marvell/gplugd/Kconfig"
dd84058d 1773source "board/armadeus/apf27/Kconfig"
dd84058d
MY
1774source "board/armltd/vexpress/Kconfig"
1775source "board/armltd/vexpress64/Kconfig"
43486e4c 1776source "board/broadcom/bcm23550_w1d/Kconfig"
dd84058d 1777source "board/broadcom/bcm28155_ap/Kconfig"
be2fc084 1778source "board/broadcom/bcm963158/Kconfig"
40b59b05 1779source "board/broadcom/bcm968580xref/Kconfig"
abb1678c
SR
1780source "board/broadcom/bcmcygnus/Kconfig"
1781source "board/broadcom/bcmnsp/Kconfig"
274bced8 1782source "board/broadcom/bcmns2/Kconfig"
746f985a 1783source "board/cavium/thunderx/Kconfig"
dd84058d 1784source "board/cirrus/edb93xx/Kconfig"
85ab0452 1785source "board/eets/pdu001/Kconfig"
6f332765 1786source "board/emulation/qemu-arm/Kconfig"
44937214
PK
1787source "board/freescale/ls2080a/Kconfig"
1788source "board/freescale/ls2080aqds/Kconfig"
1789source "board/freescale/ls2080ardb/Kconfig"
e84a324b 1790source "board/freescale/ls1088a/Kconfig"
353f36d9 1791source "board/freescale/ls1028a/Kconfig"
550e3dc0 1792source "board/freescale/ls1021aqds/Kconfig"
02b5d2ed 1793source "board/freescale/ls1043aqds/Kconfig"
c8a7d9da 1794source "board/freescale/ls1021atwr/Kconfig"
87821220 1795source "board/freescale/ls1021atsn/Kconfig"
20c700f8 1796source "board/freescale/ls1021aiot/Kconfig"
126fe70d 1797source "board/freescale/ls1046aqds/Kconfig"
f3a8e2b7 1798source "board/freescale/ls1043ardb/Kconfig"
dd02936f 1799source "board/freescale/ls1046ardb/Kconfig"
d90c7ac7 1800source "board/freescale/ls1046afrwy/Kconfig"
9d044fcb 1801source "board/freescale/ls1012aqds/Kconfig"
3b6e3898 1802source "board/freescale/ls1012ardb/Kconfig"
ff78aa2b 1803source "board/freescale/ls1012afrdm/Kconfig"
58c3e620 1804source "board/freescale/lx2160a/Kconfig"
dd84058d 1805source "board/freescale/mx35pdk/Kconfig"
9702ec00 1806source "board/freescale/s32v234evb/Kconfig"
ab38bf6a 1807source "board/grinn/chiliboard/Kconfig"
dd84058d
MY
1808source "board/gumstix/pepper/Kconfig"
1809source "board/h2200/Kconfig"
345243ed 1810source "board/hisilicon/hikey/Kconfig"
c62c7ef7 1811source "board/hisilicon/hikey960/Kconfig"
d754254f 1812source "board/hisilicon/poplar/Kconfig"
a96c08f5 1813source "board/isee/igep003x/Kconfig"
dd84058d 1814source "board/phytec/pcm051/Kconfig"
dd84058d 1815source "board/silica/pengwyn/Kconfig"
dd84058d
MY
1816source "board/spear/spear300/Kconfig"
1817source "board/spear/spear310/Kconfig"
1818source "board/spear/spear320/Kconfig"
1819source "board/spear/spear600/Kconfig"
1820source "board/spear/x600/Kconfig"
9fa32b12 1821source "board/st/stv0991/Kconfig"
9d1b2987 1822source "board/tcl/sl50/Kconfig"
eba6589f 1823source "board/ucRobotics/bubblegum_96/Kconfig"
a2bc4321 1824source "board/birdland/bav335x/Kconfig"
dd84058d 1825source "board/toradex/colibri_pxa270/Kconfig"
d8d33b6d 1826source "board/variscite/dart_6ul/Kconfig"
6ce89324 1827source "board/vscom/baltos/Kconfig"
dd84058d 1828source "board/woodburn/Kconfig"
6da4f67a 1829source "board/xilinx/Kconfig"
37e3a36a 1830source "board/xilinx/zynq/Kconfig"
c436bf92 1831source "board/xilinx/zynqmp/Kconfig"
dd84058d 1832
51b17d49
MY
1833source "arch/arm/Kconfig.debug"
1834
dd84058d 1835endmenu
b529993e
PT
1836
1837config SPL_LDSCRIPT
6e7bdde4
MS
1838 default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
1839 default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
b529993e
PT
1840 default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64
1841
1842