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ARM: dts: am437x: cm-t43: add dual emac support
[thirdparty/kernel/stable.git] / arch / arm / boot / dts / am437x-cm-t43.dts
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1/*
2 * Copyright (C) 2015 CompuLab, Ltd. - http://www.compulab.co.il/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9/dts-v1/;
10
11#include <dt-bindings/pinctrl/am43xx.h>
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/interrupt-controller/irq.h>
14#include "am4372.dtsi"
15
16/ {
17 model = "CompuLab CM-T43";
18 compatible = "compulab,am437x-cm-t43", "ti,am4372", "ti,am43";
19
20 leds {
21 compatible = "gpio-leds";
22
23 ledb {
24 label = "cm-t43:green";
25 gpios = <&gpio0 24 GPIO_ACTIVE_HIGH>;
26 linux,default-trigger = "heartbeat";
27 };
28 };
29};
30
31&am43xx_pinmux {
32 pinctrl-names = "default";
33 pinctrl-0 = <&cm_t43_led_pins>;
34
35 cm_t43_led_pins: cm_t43_led_pins {
36 pinctrl-single,pins = <
37 AM4372_IOPAD(0xa78, MUX_MODE7)
38 >;
39 };
40
41 i2c0_pins: i2c0_pins {
42 pinctrl-single,pins = <
43 AM4372_IOPAD(0x988, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
44 AM4372_IOPAD(0x98c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
45 >;
46 };
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47
48 spi0_pins: pinmux_spi0_pins {
49 pinctrl-single,pins = <
50 AM4372_IOPAD(0x950, PIN_INPUT | MUX_MODE0) /* spi0_sclk.spi0_sclk */
51 AM4372_IOPAD(0x954, PIN_INPUT | MUX_MODE0) /* spi0_d0.spi0_d0 */
52 AM4372_IOPAD(0x958, PIN_OUTPUT | MUX_MODE0) /* spi0_d1.spi0_d1 */
53 AM4372_IOPAD(0x95C, PIN_OUTPUT | MUX_MODE0) /* spi0_cs0.spi0_cs0 */
54 >;
55 };
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56
57 nand_flash_x8: nand_flash_x8 {
58 pinctrl-single,pins = <
59 AM4372_IOPAD(0x800, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
60 AM4372_IOPAD(0x804, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
61 AM4372_IOPAD(0x808, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
62 AM4372_IOPAD(0x80c, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
63 AM4372_IOPAD(0x810, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
64 AM4372_IOPAD(0x814, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
65 AM4372_IOPAD(0x818, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
66 AM4372_IOPAD(0x81c, PIN_INPUT | PULL_DISABLE | MUX_MODE0)
67 AM4372_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0)
68 AM4372_IOPAD(0x874, PIN_OUTPUT_PULLUP | MUX_MODE0)
69 AM4372_IOPAD(0x87c, PIN_OUTPUT_PULLUP | MUX_MODE0)
70 AM4372_IOPAD(0x898, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
71 AM4372_IOPAD(0x894, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
72 AM4372_IOPAD(0x890, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
73 AM4372_IOPAD(0x89c, PIN_OUTPUT_PULLDOWN | MUX_MODE0)
74 >;
75 };
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76
77 cpsw_default: cpsw_default {
78 pinctrl-single,pins = <
79 /* Slave 1 */
80 AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_txen */
81 AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rxctl */
82 AM4372_IOPAD(0x91c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_txd3 */
83 AM4372_IOPAD(0x920, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_txd2 */
84 AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_txd1 */
85 AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_txd0 */
86 AM4372_IOPAD(0x92c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rmii1_tclk */
87 AM4372_IOPAD(0x930, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rmii1_rclk */
88 AM4372_IOPAD(0x934, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rxd3 */
89 AM4372_IOPAD(0x938, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rxd2 */
90 AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rxd1 */
91 AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rxd0 */
92 AM4372_IOPAD(0xa74, MUX_MODE3)
93 /* Slave 2 */
94 AM4372_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.txen */
95 AM4372_IOPAD(0x844, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rxctl */
96 AM4372_IOPAD(0x848, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.txd3 */
97 AM4372_IOPAD(0x84c, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.txd2 */
98 AM4372_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.txd1 */
99 AM4372_IOPAD(0x854, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.txd0 */
100 AM4372_IOPAD(0x858, PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.tclk */
101 AM4372_IOPAD(0x85c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rclk */
102 AM4372_IOPAD(0x860, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rxd3 */
103 AM4372_IOPAD(0x864, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rxd2 */
104 AM4372_IOPAD(0x868, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rxd1 */
105 AM4372_IOPAD(0x86c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rxd0 */
106 AM4372_IOPAD(0xa38, MUX_MODE7)
107 >;
108 };
109
110 davinci_mdio_default: davinci_mdio_default {
111 pinctrl-single,pins = <
112 /* MDIO */
113 AM4372_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
114 AM4372_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
115 >;
116 };
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117};
118
119&gpmc {
120 status = "okay";
121 pinctrl-names = "default";
122 pinctrl-0 = <&nand_flash_x8>;
123 ranges = <0 0 0x08000000 0x1000000>;
124 nand@0,0 {
125 reg = <0 0 0>;
126 ti,nand-ecc-opt = "bch8";
127 ti,elm-id = <&elm>;
128
129 nand-bus-width = <8>;
130 gpmc,device-width = <1>;
131 gpmc,sync-clk-ps = <0>;
132 gpmc,cs-on-ns = <0>;
133 gpmc,cs-rd-off-ns = <44>;
134 gpmc,cs-wr-off-ns = <44>;
135 gpmc,adv-on-ns = <6>;
136 gpmc,adv-rd-off-ns = <34>;
137 gpmc,adv-wr-off-ns = <44>;
138 gpmc,we-on-ns = <0>;
139 gpmc,we-off-ns = <40>;
140 gpmc,oe-on-ns = <0>;
141 gpmc,oe-off-ns = <54>;
142 gpmc,access-ns = <64>;
143 gpmc,rd-cycle-ns = <82>;
144 gpmc,wr-cycle-ns = <82>;
145 gpmc,wait-on-read = "true";
146 gpmc,wait-on-write = "true";
147 gpmc,bus-turnaround-ns = <0>;
148 gpmc,cycle2cycle-delay-ns = <0>;
149 gpmc,clk-activation-ns = <0>;
150 gpmc,wait-monitoring-ns = <0>;
151 gpmc,wr-access-ns = <40>;
152 gpmc,wr-data-mux-bus-ns = <0>;
153
154 gpmc,wait-pin = <0>;
155
156 #address-cells = <1>;
157 #size-cells = <1>;
158 /* MTD partition table */
159 partition@0 {
160 label = "kernel";
161 reg = <0x0 0x00980000>;
162 };
163 partition@980000 {
164 label = "dtb";
165 reg = <0x00980000 0x00080000>;
166 };
167 partition@a00000 {
168 label = "rootfs";
169 reg = <0x00a00000 0x0>;
170 };
171 };
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172};
173
174&i2c0 {
175 status = "okay";
176 pinctrl-names = "default";
177 pinctrl-0 = <&i2c0_pins>;
178 clock-frequency = <100000>;
989d21ec 179
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180 tps65218: tps65218@24 {
181 compatible = "ti,tps65218";
182 reg = <0x24>;
183 interrupts = <GIC_SPI 7 IRQ_TYPE_NONE>; /* NMIn */
184 interrupt-parent = <&gic>;
185 interrupt-controller;
186 #interrupt-cells = <2>;
187
188 dcdc1: regulator-dcdc1 {
189 compatible = "ti,tps65218-dcdc1";
190 regulator-name = "vdd_core";
191 regulator-min-microvolt = <912000>;
192 regulator-max-microvolt = <1144000>;
193 regulator-boot-on;
194 regulator-always-on;
195 };
196
197 dcdc2: regulator-dcdc2 {
198 compatible = "ti,tps65218-dcdc2";
199 regulator-name = "vdd_mpu";
200 regulator-min-microvolt = <912000>;
201 regulator-max-microvolt = <1378000>;
202 regulator-boot-on;
203 regulator-always-on;
204 };
205
206 dcdc3: regulator-dcdc3 {
207 compatible = "ti,tps65218-dcdc3";
208 regulator-name = "vdcdc3";
209 regulator-suspend-enable;
210 regulator-min-microvolt = <1500000>;
211 regulator-max-microvolt = <1500000>;
212 regulator-boot-on;
213 regulator-always-on;
214 };
215
216 dcdc5: regulator-dcdc5 {
217 compatible = "ti,tps65218-dcdc5";
218 regulator-name = "v1_0bat";
219 regulator-min-microvolt = <1000000>;
220 regulator-max-microvolt = <1000000>;
221 regulator-boot-on;
222 regulator-always-on;
223 };
224
225 dcdc6: regulator-dcdc6 {
226 compatible = "ti,tps65218-dcdc6";
227 regulator-name = "v1_8bat";
228 regulator-min-microvolt = <1800000>;
229 regulator-max-microvolt = <1800000>;
230 regulator-boot-on;
231 regulator-always-on;
232 };
233
234 ldo1: regulator-ldo1 {
235 compatible = "ti,tps65218-ldo1";
236 regulator-min-microvolt = <1800000>;
237 regulator-max-microvolt = <1800000>;
238 regulator-boot-on;
239 regulator-always-on;
240 };
241 };
242
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243 eeprom_module: at24@50 {
244 compatible = "atmel,24c02";
245 reg = <0x50>;
246 pagesize = <16>;
247 };
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248};
249
250&gpio0 {
251 status = "okay";
252};
253
254&gpio1 {
255 status = "okay";
256};
257
258&gpio2 {
259 status = "okay";
260};
261
262&gpio3 {
263 status = "okay";
264};
265
266&gpio4 {
267 status = "okay";
268};
269
270&gpio5 {
271 status = "okay";
272};
273
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274&spi0 {
275 status = "okay";
276 pinctrl-names = "default";
277 pinctrl-0 = <&spi0_pins>;
278 dmas = <&edma 16
279 &edma 17>;
280 dma-names = "tx0", "rx0";
281
282 flash: w25q64cvzpig@0 {
283 #address-cells = <1>;
284 #size-cells = <1>;
285 compatible = "jedec,spi-nor";
286 reg = <0>;
287 spi-max-frequency = <20000000>;
288 partition@0 {
289 label = "uboot";
290 reg = <0x0 0xc0000>;
291 };
292
293 partition@c0000 {
294 label = "uboot environment";
295 reg = <0xc0000 0x40000>;
296 };
297
298 partition@100000 {
299 label = "reserved";
300 reg = <0x100000 0x100000>;
301 };
302 };
303};
304
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305&mac {
306 pinctrl-names = "default";
307 pinctrl-0 = <&cpsw_default>;
308 dual_emac = <1>;
309 status = "okay";
310};
311
312&davinci_mdio {
313 pinctrl-names = "default";
314 pinctrl-0 = <&davinci_mdio_default>;
315 status = "okay";
316};
317
318&cpsw_emac0 {
319 phy_id = <&davinci_mdio>, <0>;
320 phy-mode = "rgmii-txid";
321 dual_emac_res_vlan = <1>;
322};
323
324&cpsw_emac1 {
325 phy_id = <&davinci_mdio>, <1>;
326 phy-mode = "rgmii-txid";
327 dual_emac_res_vlan = <2>;
328};
329
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330&elm {
331 status = "okay";
332};
333
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334&uart0 {
335 status = "okay";
336};
337
338&cpu {
4bbbd23c 339 cpu0-supply = <&dcdc2>;
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340 operating-points = <1000000 1330000>,
341 <800000 1260000>,
342 <720000 1200000>,
343 <600000 1100000>,
344 <300000 950000>;
345};