[people/arne_f/kernel.git] / arch / arm / boot / dts / imx23.dtsi

/*
 * Copyright 2012 Freescale Semiconductor, Inc.
 *
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */

/include/ "skeleton.dtsi"

/ {
	interrupt-parent = <&icoll>;

	aliases {
		gpio0 = &gpio0;
		gpio1 = &gpio1;
		gpio2 = &gpio2;
		serial0 = &auart0;
		serial1 = &auart1;
	};

	cpus {
		cpu@0 {
			compatible = "arm,arm926ejs";
		};
	};

	apb@80000000 {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0x80000000 0x80000>;
		ranges;

		apbh@80000000 {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x80000000 0x40000>;
			ranges;

			icoll: interrupt-controller@80000000 {
				compatible = "fsl,imx23-icoll", "fsl,mxs-icoll";
				interrupt-controller;
				#interrupt-cells = <1>;
				reg = <0x80000000 0x2000>;
			};

			dma-apbh@80004000 {
				compatible = "fsl,imx23-dma-apbh";
				reg = <0x80004000 2000>;
			};

			ecc@80008000 {
				reg = <0x80008000 2000>;
				status = "disabled";
			};

			bch@8000a000 {
				reg = <0x8000a000 2000>;
				status = "disabled";
			};

			gpmi-nand@8000c000 {
				reg = <0x8000c000 2000>;
				status = "disabled";
			};

			ssp0: ssp@80010000 {
				reg = <0x80010000 2000>;
				interrupts = <15 14>;
				fsl,ssp-dma-channel = <1>;
				status = "disabled";
			};

			etm@80014000 {
				reg = <0x80014000 2000>;
				status = "disabled";
			};

			pinctrl@80018000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx23-pinctrl", "simple-bus";
				reg = <0x80018000 2000>;

				gpio0: gpio@0 {
					compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
					interrupts = <16>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				gpio1: gpio@1 {
					compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
					interrupts = <17>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				gpio2: gpio@2 {
					compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
					interrupts = <18>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				duart_pins_a: duart@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x11a2 /* MX23_PAD_PWM0__DUART_RX */
						0x11b2 /* MX23_PAD_PWM1__DUART_TX */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

				auart0_pins_a: auart0@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x01c0 /* MX23_PAD_AUART1_RX__AUART1_RX */
						0x01d0 /* MX23_PAD_AUART1_TX__AUART1_TX */
						0x01a0 /* MX23_PAD_AUART1_CTS__AUART1_CTS */
						0x01b0 /* MX23_PAD_AUART1_RTS__AUART1_RTS */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

				mmc0_4bit_pins_a: mmc0-4bit@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */
						0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */
						0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */
						0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */
						0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */
						0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */
						0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
					>;
					fsl,drive-strength = <1>;
					fsl,voltage = <1>;
					fsl,pull-up = <1>;
				};

				mmc0_8bit_pins_a: mmc0-8bit@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */
						0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */
						0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */
						0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */
						0x0082 /* MX23_PAD_GPMI_D08__SSP1_DATA4 */
						0x0092 /* MX23_PAD_GPMI_D09__SSP1_DATA5 */
						0x00a2 /* MX23_PAD_GPMI_D10__SSP1_DATA6 */
						0x00b2 /* MX23_PAD_GPMI_D11__SSP1_DATA7 */
						0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */
						0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */
						0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
					>;
					fsl,drive-strength = <1>;
					fsl,voltage = <1>;
					fsl,pull-up = <1>;
				};

				mmc0_pins_fixup: mmc0-pins-fixup {
					fsl,pinmux-ids = <
						0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */
						0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
					>;
					fsl,pull-up = <0>;
				};

				pwm2_pins_a: pwm2@0 {
					reg = <0>;
					fsl,pinmux-ids = <
						0x11c0 /* MX23_PAD_PWM2__PWM2 */
					>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};
			};

			digctl@8001c000 {
				reg = <0x8001c000 2000>;
				status = "disabled";
			};

			emi@80020000 {
				reg = <0x80020000 2000>;
				status = "disabled";
			};

			dma-apbx@80024000 {
				compatible = "fsl,imx23-dma-apbx";
				reg = <0x80024000 2000>;
			};

			dcp@80028000 {
				reg = <0x80028000 2000>;
				status = "disabled";
			};

			pxp@8002a000 {
				reg = <0x8002a000 2000>;
				status = "disabled";
			};

			ocotp@8002c000 {
				reg = <0x8002c000 2000>;
				status = "disabled";
			};

			axi-ahb@8002e000 {
				reg = <0x8002e000 2000>;
				status = "disabled";
			};

			lcdif@80030000 {
				reg = <0x80030000 2000>;
				status = "disabled";
			};

			ssp1: ssp@80034000 {
				reg = <0x80034000 2000>;
				interrupts = <2 20>;
				fsl,ssp-dma-channel = <2>;
				status = "disabled";
			};

			tvenc@80038000 {
				reg = <0x80038000 2000>;
				status = "disabled";
			};
                };

		apbx@80040000 {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x80040000 0x40000>;
			ranges;

			clkctl@80040000 {
				reg = <0x80040000 2000>;
				status = "disabled";
			};

			saif0: saif@80042000 {
				reg = <0x80042000 2000>;
				status = "disabled";
			};

			power@80044000 {
				reg = <0x80044000 2000>;
				status = "disabled";
			};

			saif1: saif@80046000 {
				reg = <0x80046000 2000>;
				status = "disabled";
			};

			audio-out@80048000 {
				reg = <0x80048000 2000>;
				status = "disabled";
			};

			audio-in@8004c000 {
				reg = <0x8004c000 2000>;
				status = "disabled";
			};

			lradc@80050000 {
				reg = <0x80050000 2000>;
				status = "disabled";
			};

			spdif@80054000 {
				reg = <0x80054000 2000>;
				status = "disabled";
			};

			i2c@80058000 {
				reg = <0x80058000 2000>;
				status = "disabled";
			};

			rtc@8005c000 {
				compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc";
				reg = <0x8005c000 2000>;
				interrupts = <22>;
			};

			pwm: pwm@80064000 {
				compatible = "fsl,imx23-pwm";
				reg = <0x80064000 2000>;
				#pwm-cells = <2>;
				fsl,pwm-number = <5>;
				status = "disabled";
			};

			timrot@80068000 {
				reg = <0x80068000 2000>;
				status = "disabled";
			};

			auart0: serial@8006c000 {
				compatible = "fsl,imx23-auart";
				reg = <0x8006c000 0x2000>;
				interrupts = <24 25 23>;
				status = "disabled";
			};

			auart1: serial@8006e000 {
				compatible = "fsl,imx23-auart";
				reg = <0x8006e000 0x2000>;
				interrupts = <59 60 58>;
				status = "disabled";
			};

			duart: serial@80070000 {
				compatible = "arm,pl011", "arm,primecell";
				reg = <0x80070000 0x2000>;
				interrupts = <0>;
				status = "disabled";
			};

			usbphy@8007c000 {
				reg = <0x8007c000 0x2000>;
				status = "disabled";
			};
		};
	};

	ahb@80080000 {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0x80080000 0x80000>;
		ranges;

		usbctrl@80080000 {
			reg = <0x80080000 0x10000>;
			status = "disabled";
		};
	};
};
Commit	Line	Data
2954ff39 SG	1	/*
	2	* Copyright 2012 Freescale Semiconductor, Inc.
	3	*
	4	* The code contained herein is licensed under the GNU General Public
	5	* License. You may obtain a copy of the GNU General Public License
	6	* Version 2 or later at the following locations:
	7	*
	8	* http://www.opensource.org/licenses/gpl-license.html
	9	* http://www.gnu.org/copyleft/gpl.html
	10	*/
	11
	12	/include/ "skeleton.dtsi"
	13
	14	/ {
	15	interrupt-parent = <&icoll>;
	16
ce4c6f9b SG	17	aliases {
	18	gpio0 = &gpio0;
	19	gpio1 = &gpio1;
	20	gpio2 = &gpio2;
a4508394 SG	21	serial0 = &auart0;
a4508394 SG	22	serial1 = &auart1;
ce4c6f9b SG	23	};
ce4c6f9b SG	24
2954ff39 SG	25	cpus {
	26	cpu@0 {
	27	compatible = "arm,arm926ejs";
	28	};
	29	};
	30
	31	apb@80000000 {
	32	compatible = "simple-bus";
	33	#address-cells = <1>;
	34	#size-cells = <1>;
	35	reg = <0x80000000 0x80000>;
	36	ranges;
	37
	38	apbh@80000000 {
	39	compatible = "simple-bus";
	40	#address-cells = <1>;
	41	#size-cells = <1>;
	42	reg = <0x80000000 0x40000>;
	43	ranges;
	44
	45	icoll: interrupt-controller@80000000 {
	46	compatible = "fsl,imx23-icoll", "fsl,mxs-icoll";
	47	interrupt-controller;
	48	#interrupt-cells = <1>;
	49	reg = <0x80000000 0x2000>;
	50	};
	51
	52	dma-apbh@80004000 {
84f3570a	53	compatible = "fsl,imx23-dma-apbh";
2954ff39	54	reg = <0x80004000 2000>;
2954ff39 SG	55	};
	56
	57	ecc@80008000 {
	58	reg = <0x80008000 2000>;
	59	status = "disabled";
	60	};
	61
	62	bch@8000a000 {
	63	reg = <0x8000a000 2000>;
	64	status = "disabled";
	65	};
	66
a217c46c	67	gpmi-nand@8000c000 {
2954ff39 SG	68	reg = <0x8000c000 2000>;
	69	status = "disabled";
	70	};
	71
	72	ssp0: ssp@80010000 {
	73	reg = <0x80010000 2000>;
be1ce308 SG	74	interrupts = <15 14>;
be1ce308 SG	75	fsl,ssp-dma-channel = <1>;
2954ff39 SG	76	status = "disabled";
	77	};
	78
	79	etm@80014000 {
	80	reg = <0x80014000 2000>;
	81	status = "disabled";
	82	};
	83
	84	pinctrl@80018000 {
	85	#address-cells = <1>;
	86	#size-cells = <0>;
ce4c6f9b	87	compatible = "fsl,imx23-pinctrl", "simple-bus";
2954ff39 SG	88	reg = <0x80018000 2000>;
2954ff39 SG	89
ce4c6f9b SG	90	gpio0: gpio@0 {
	91	compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
	92	interrupts = <16>;
	93	gpio-controller;
	94	#gpio-cells = <2>;
	95	interrupt-controller;
	96	#interrupt-cells = <2>;
	97	};
	98
	99	gpio1: gpio@1 {
	100	compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
	101	interrupts = <17>;
	102	gpio-controller;
	103	#gpio-cells = <2>;
	104	interrupt-controller;
	105	#interrupt-cells = <2>;
	106	};
	107
	108	gpio2: gpio@2 {
	109	compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
	110	interrupts = <18>;
	111	gpio-controller;
	112	#gpio-cells = <2>;
	113	interrupt-controller;
	114	#interrupt-cells = <2>;
	115	};
	116
2954ff39 SG	117	duart_pins_a: duart@0 {
2954ff39 SG	118	reg = <0>;
f14da767 SG	119	fsl,pinmux-ids = <
	120	0x11a2 /* MX23_PAD_PWM0__DUART_RX */
	121	0x11b2 /* MX23_PAD_PWM1__DUART_TX */
	122	>;
2954ff39 SG	123	fsl,drive-strength = <0>;
	124	fsl,voltage = <1>;
	125	fsl,pull-up = <0>;
	126	};
be1ce308	127
a4508394 SG	128	auart0_pins_a: auart0@0 {
	129	reg = <0>;
	130	fsl,pinmux-ids = <
	131	0x01c0 /* MX23_PAD_AUART1_RX__AUART1_RX */
	132	0x01d0 /* MX23_PAD_AUART1_TX__AUART1_TX */
	133	0x01a0 /* MX23_PAD_AUART1_CTS__AUART1_CTS */
	134	0x01b0 /* MX23_PAD_AUART1_RTS__AUART1_RTS */
	135	>;
	136	fsl,drive-strength = <0>;
	137	fsl,voltage = <1>;
	138	fsl,pull-up = <0>;
	139	};
	140
72beabae SG	141	mmc0_4bit_pins_a: mmc0-4bit@0 {
	142	reg = <0>;
	143	fsl,pinmux-ids = <
	144	0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */
	145	0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */
	146	0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */
	147	0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */
	148	0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */
	149	0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */
	150	0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
	151	>;
	152	fsl,drive-strength = <1>;
	153	fsl,voltage = <1>;
	154	fsl,pull-up = <1>;
	155	};
	156
be1ce308 SG	157	mmc0_8bit_pins_a: mmc0-8bit@0 {
be1ce308 SG	158	reg = <0>;
f14da767 SG	159	fsl,pinmux-ids = <
	160	0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */
	161	0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */
	162	0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */
	163	0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */
	164	0x0082 /* MX23_PAD_GPMI_D08__SSP1_DATA4 */
	165	0x0092 /* MX23_PAD_GPMI_D09__SSP1_DATA5 */
	166	0x00a2 /* MX23_PAD_GPMI_D10__SSP1_DATA6 */
	167	0x00b2 /* MX23_PAD_GPMI_D11__SSP1_DATA7 */
	168	0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */
	169	0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */
	170	0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
	171	>;
be1ce308 SG	172	fsl,drive-strength = <1>;
	173	fsl,voltage = <1>;
	174	fsl,pull-up = <1>;
	175	};
	176
	177	mmc0_pins_fixup: mmc0-pins-fixup {
f14da767 SG	178	fsl,pinmux-ids = <
	179	0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */
	180	0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
	181	>;
be1ce308 SG	182	fsl,pull-up = <0>;
be1ce308 SG	183	};
52f7176b SG	184
	185	pwm2_pins_a: pwm2@0 {
	186	reg = <0>;
	187	fsl,pinmux-ids = <
	188	0x11c0 /* MX23_PAD_PWM2__PWM2 */
	189	>;
	190	fsl,drive-strength = <0>;
	191	fsl,voltage = <1>;
	192	fsl,pull-up = <0>;
	193	};
2954ff39 SG	194	};
	195
	196	digctl@8001c000 {
	197	reg = <0x8001c000 2000>;
	198	status = "disabled";
	199	};
	200
	201	emi@80020000 {
	202	reg = <0x80020000 2000>;
	203	status = "disabled";
	204	};
	205
	206	dma-apbx@80024000 {
84f3570a	207	compatible = "fsl,imx23-dma-apbx";
2954ff39	208	reg = <0x80024000 2000>;
2954ff39 SG	209	};
	210
	211	dcp@80028000 {
	212	reg = <0x80028000 2000>;
	213	status = "disabled";
	214	};
	215
	216	pxp@8002a000 {
	217	reg = <0x8002a000 2000>;
	218	status = "disabled";
	219	};
	220
	221	ocotp@8002c000 {
	222	reg = <0x8002c000 2000>;
	223	status = "disabled";
	224	};
	225
	226	axi-ahb@8002e000 {
	227	reg = <0x8002e000 2000>;
	228	status = "disabled";
	229	};
	230
	231	lcdif@80030000 {
	232	reg = <0x80030000 2000>;
	233	status = "disabled";
	234	};
	235
	236	ssp1: ssp@80034000 {
	237	reg = <0x80034000 2000>;
be1ce308 SG	238	interrupts = <2 20>;
be1ce308 SG	239	fsl,ssp-dma-channel = <2>;
2954ff39 SG	240	status = "disabled";
	241	};
	242
	243	tvenc@80038000 {
	244	reg = <0x80038000 2000>;
	245	status = "disabled";
	246	};
	247	};
	248
	249	apbx@80040000 {
	250	compatible = "simple-bus";
	251	#address-cells = <1>;
	252	#size-cells = <1>;
	253	reg = <0x80040000 0x40000>;
	254	ranges;
	255
	256	clkctl@80040000 {
	257	reg = <0x80040000 2000>;
	258	status = "disabled";
	259	};
	260
	261	saif0: saif@80042000 {
	262	reg = <0x80042000 2000>;
	263	status = "disabled";
	264	};
	265
	266	power@80044000 {
	267	reg = <0x80044000 2000>;
	268	status = "disabled";
	269	};
	270
	271	saif1: saif@80046000 {
	272	reg = <0x80046000 2000>;
	273	status = "disabled";
	274	};
	275
	276	audio-out@80048000 {
	277	reg = <0x80048000 2000>;
	278	status = "disabled";
	279	};
	280
	281	audio-in@8004c000 {
	282	reg = <0x8004c000 2000>;
	283	status = "disabled";
	284	};
	285
	286	lradc@80050000 {
	287	reg = <0x80050000 2000>;
	288	status = "disabled";
	289	};
	290
	291	spdif@80054000 {
	292	reg = <0x80054000 2000>;
	293	status = "disabled";
	294	};
	295
	296	i2c@80058000 {
	297	reg = <0x80058000 2000>;
	298	status = "disabled";
	299	};
	300
	301	rtc@8005c000 {
f98c990c	302	compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc";
2954ff39	303	reg = <0x8005c000 2000>;
f98c990c	304	interrupts = <22>;
2954ff39 SG	305	};
2954ff39 SG	306
52f7176b SG	307	pwm: pwm@80064000 {
52f7176b SG	308	compatible = "fsl,imx23-pwm";
2954ff39	309	reg = <0x80064000 2000>;
52f7176b SG	310	#pwm-cells = <2>;
52f7176b SG	311	fsl,pwm-number = <5>;
2954ff39 SG	312	status = "disabled";
	313	};
	314
	315	timrot@80068000 {
	316	reg = <0x80068000 2000>;
	317	status = "disabled";
	318	};
	319
	320	auart0: serial@8006c000 {
a4508394	321	compatible = "fsl,imx23-auart";
2954ff39	322	reg = <0x8006c000 0x2000>;
a4508394	323	interrupts = <24 25 23>;
2954ff39 SG	324	status = "disabled";
	325	};
	326
	327	auart1: serial@8006e000 {
a4508394	328	compatible = "fsl,imx23-auart";
2954ff39	329	reg = <0x8006e000 0x2000>;
a4508394	330	interrupts = <59 60 58>;
2954ff39 SG	331	status = "disabled";
	332	};
	333
	334	duart: serial@80070000 {
	335	compatible = "arm,pl011", "arm,primecell";
	336	reg = <0x80070000 0x2000>;
	337	interrupts = <0>;
	338	status = "disabled";
	339	};
	340
	341	usbphy@8007c000 {
	342	reg = <0x8007c000 0x2000>;
	343	status = "disabled";
	344	};
	345	};
	346	};
	347
	348	ahb@80080000 {
	349	compatible = "simple-bus";
	350	#address-cells = <1>;
	351	#size-cells = <1>;
	352	reg = <0x80080000 0x80000>;
	353	ranges;
	354
	355	usbctrl@80080000 {
	356	reg = <0x80080000 0x10000>;
	357	status = "disabled";
	358	};
	359	};
	360	};