projects / thirdparty / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| fcaf2036 | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
| db890dad MSP |
2 | /* |
| 3 | * Copyright 2012 Markus Pargmann, Pengutronix | |
| db890dad MSP |
4 | */ |
| 5 | ||
| 5ac7bfb6 | 6 | #include "imx27-phytec-phycard-s-som.dtsi" |
| db890dad MSP |
7 | |
| 8 | / { | |
| 9 | model = "Phytec pca100 rapid development kit"; | |
| 10 | compatible = "phytec,imx27-pca100-rdk", "phytec,imx27-pca100", "fsl,imx27"; | |
| 11 | ||
| 48f51963 SH |
12 | chosen { |
| 13 | stdout-path = &uart1; | |
| 14 | }; | |
| 15 | ||
| db890dad MSP |
16 | display: display { |
| 17 | model = "Primeview-PD050VL1"; | |
| db890dad MSP |
18 | bits-per-pixel = <16>; /* non-standard but required */ |
| 19 | fsl,pcr = <0xf0c88080>; /* non-standard but required */ | |
| 20 | display-timings { | |
| aae15b14 | 21 | native-mode = <&timing0>; |
| db890dad MSP |
22 | timing0: 640x480 { |
| 23 | hactive = <640>; | |
| 24 | vactive = <480>; | |
| 25 | hback-porch = <112>; | |
| 26 | hfront-porch = <36>; | |
| 27 | hsync-len = <32>; | |
| 28 | vback-porch = <33>; | |
| 29 | vfront-porch = <33>; | |
| 30 | vsync-len = <2>; | |
| 31 | clock-frequency = <25000000>; | |
| 32 | }; | |
| 33 | }; | |
| 34 | }; | |
| 38918b72 MSP |
35 | |
| 36 | regulators { | |
| 37 | compatible = "simple-bus"; | |
| 352d318c SG |
38 | #address-cells = <1>; |
| 39 | #size-cells = <0>; | |
| 38918b72 | 40 | |
| 352d318c | 41 | reg_3v3: regulator@0 { |
| 38918b72 | 42 | compatible = "regulator-fixed"; |
| 352d318c | 43 | reg = <0>; |
| 38918b72 MSP |
44 | regulator-name = "3V3"; |
| 45 | regulator-min-microvolt = <3300000>; | |
| 46 | regulator-max-microvolt = <3300000>; | |
| 47 | regulator-always-on; | |
| 48 | }; | |
| 49 | }; | |
| db890dad MSP |
50 | }; |
| 51 | ||
| 52 | &fb { | |
| 53 | display = <&display>; | |
| 54 | status = "okay"; | |
| 55 | }; | |
| 56 | ||
| b9d6bfaa | 57 | &i2c1 { |
| 61664d0b MSP |
58 | pinctrl-names = "default"; |
| 59 | pinctrl-0 = <&pinctrl_i2c1>; | |
| b9d6bfaa MSP |
60 | status = "okay"; |
| 61 | ||
| 62 | rtc@51 { | |
| 63 | compatible = "nxp,pcf8563"; | |
| 64 | reg = <0x51>; | |
| 65 | }; | |
| 38918b72 MSP |
66 | |
| 67 | adc@64 { | |
| 68 | compatible = "maxim,max1037"; | |
| 69 | vcc-supply = <®_3v3>; | |
| 70 | reg = <0x64>; | |
| 71 | }; | |
| b9d6bfaa MSP |
72 | }; |
| 73 | ||
| 61664d0b MSP |
74 | &iomuxc { |
| 75 | imx27-phycard-s-rdk { | |
| 76 | pinctrl_i2c1: i2c1grp { | |
| 77 | fsl,pins = < | |
| 0caf3435 FE |
78 | MX27_PAD_I2C_DATA__I2C_DATA 0x0 |
| 79 | MX27_PAD_I2C_CLK__I2C_CLK 0x0 | |
| 61664d0b MSP |
80 | >; |
| 81 | }; | |
| 82 | ||
| 83 | pinctrl_owire1: owire1grp { | |
| 84 | fsl,pins = < | |
| 85 | MX27_PAD_RTCK__OWIRE 0x0 | |
| 86 | >; | |
| 87 | }; | |
| 88 | ||
| 51aba325 AS |
89 | pinctrl_sdhc2: sdhc2grp { |
| 90 | fsl,pins = < | |
| 91 | MX27_PAD_SD2_CLK__SD2_CLK 0x0 | |
| 92 | MX27_PAD_SD2_CMD__SD2_CMD 0x0 | |
| 93 | MX27_PAD_SD2_D0__SD2_D0 0x0 | |
| 94 | MX27_PAD_SD2_D1__SD2_D1 0x0 | |
| 95 | MX27_PAD_SD2_D2__SD2_D2 0x0 | |
| 96 | MX27_PAD_SD2_D3__SD2_D3 0x0 | |
| 97 | MX27_PAD_SSI3_RXDAT__GPIO3_29 0x0 /* CD */ | |
| 98 | >; | |
| 99 | }; | |
| 100 | ||
| 61664d0b MSP |
101 | pinctrl_uart1: uart1grp { |
| 102 | fsl,pins = < | |
| 103 | MX27_PAD_UART1_TXD__UART1_TXD 0x0 | |
| 104 | MX27_PAD_UART1_RXD__UART1_RXD 0x0 | |
| 105 | MX27_PAD_UART1_CTS__UART1_CTS 0x0 | |
| 106 | MX27_PAD_UART1_RTS__UART1_RTS 0x0 | |
| 107 | >; | |
| 108 | }; | |
| 109 | ||
| 110 | pinctrl_uart2: uart2grp { | |
| 111 | fsl,pins = < | |
| 112 | MX27_PAD_UART2_TXD__UART2_TXD 0x0 | |
| 113 | MX27_PAD_UART2_RXD__UART2_RXD 0x0 | |
| 114 | MX27_PAD_UART2_CTS__UART2_CTS 0x0 | |
| 115 | MX27_PAD_UART2_RTS__UART2_RTS 0x0 | |
| 116 | >; | |
| 117 | }; | |
| 118 | ||
| 119 | pinctrl_uart3: uart3grp { | |
| 120 | fsl,pins = < | |
| 121 | MX27_PAD_UART3_TXD__UART3_TXD 0x0 | |
| 122 | MX27_PAD_UART3_RXD__UART3_RXD 0x0 | |
| 123 | MX27_PAD_UART3_CTS__UART3_CTS 0x0 | |
| 124 | MX27_PAD_UART3_RTS__UART3_RTS 0x0 | |
| 125 | >; | |
| 126 | }; | |
| 127 | }; | |
| 128 | }; | |
| 129 | ||
| b9d6bfaa | 130 | &owire { |
| 61664d0b MSP |
131 | pinctrl-names = "default"; |
| 132 | pinctrl-0 = <&pinctrl_owire1>; | |
| b9d6bfaa MSP |
133 | status = "okay"; |
| 134 | }; | |
| 135 | ||
| db890dad | 136 | &sdhci2 { |
| 51aba325 AS |
137 | pinctrl-names = "default"; |
| 138 | pinctrl-0 = <&pinctrl_sdhc2>; | |
| 6ece55b3 | 139 | cd-gpios = <&gpio3 29 GPIO_ACTIVE_HIGH>; |
| db890dad MSP |
140 | status = "okay"; |
| 141 | }; | |
| 142 | ||
| 143 | &uart1 { | |
| 2e7c416c | 144 | uart-has-rtscts; |
| 61664d0b MSP |
145 | pinctrl-names = "default"; |
| 146 | pinctrl-0 = <&pinctrl_uart1>; | |
| db890dad MSP |
147 | status = "okay"; |
| 148 | }; | |
| 149 | ||
| 150 | &uart2 { | |
| 2e7c416c | 151 | uart-has-rtscts; |
| 61664d0b MSP |
152 | pinctrl-names = "default"; |
| 153 | pinctrl-0 = <&pinctrl_uart2>; | |
| db890dad MSP |
154 | status = "okay"; |
| 155 | }; | |
| 156 | ||
| 157 | &uart3 { | |
| 2e7c416c | 158 | uart-has-rtscts; |
| 61664d0b MSP |
159 | pinctrl-names = "default"; |
| 160 | pinctrl-0 = <&pinctrl_uart3>; | |
| db890dad MSP |
161 | status = "okay"; |
| 162 | }; |