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[thirdparty/linux.git] / arch / arm / boot / dts / imx7d-pico.dtsi
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1/*
2 * Copyright 2017 NXP
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43/dts-v1/;
44
45#include "imx7d.dtsi"
46
47/ {
48 model = "Technexion Pico i.MX7D Board";
49 compatible = "technexion,imx7d-pico", "fsl,imx7d";
50
ad00e080 51 memory@80000000 {
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52 reg = <0x80000000 0x80000000>;
53 };
54
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55 reg_ap6212: regulator-ap6212 {
56 compatible = "regulator-fixed";
57 pinctrl-names = "default";
58 pinctrl-0 = <&pinctrl_reg_ap6212>;
59 regulator-name = "AP6212";
60 regulator-min-microvolt = <3300000>;
61 regulator-max-microvolt = <3300000>;
62 gpio = <&gpio4 16 GPIO_ACTIVE_HIGH>;
63 enable-active-high;
64 };
65
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66 reg_2p5v: regulator-2p5v {
67 compatible = "regulator-fixed";
68 regulator-name = "2P5V";
69 regulator-min-microvolt = <2500000>;
70 regulator-max-microvolt = <2500000>;
71 regulator-always-on;
72 };
73
74 reg_3p3v: regulator-3p3v {
75 compatible = "regulator-fixed";
76 regulator-name = "3P3V";
77 regulator-min-microvolt = <3300000>;
78 regulator-max-microvolt = <3300000>;
79 regulator-always-on;
80 };
81
82 reg_usb_otg1_vbus: regulator-usb-otg1-vbus {
83 compatible = "regulator-fixed";
84 regulator-name = "usb_otg1_vbus";
85 regulator-min-microvolt = <5000000>;
86 regulator-max-microvolt = <5000000>;
87 gpio = <&gpio4 5 GPIO_ACTIVE_LOW>;
88 };
89
90 reg_usb_otg2_vbus: regulator-usb-otg2-vbus {
91 compatible = "regulator-fixed";
92 regulator-name = "usb_otg2_vbus";
93 regulator-min-microvolt = <5000000>;
94 regulator-max-microvolt = <5000000>;
95 };
96
97 reg_vref_1v8: regulator-vref-1v8 {
98 compatible = "regulator-fixed";
99 regulator-name = "vref-1v8";
100 regulator-min-microvolt = <1800000>;
101 regulator-max-microvolt = <1800000>;
102 };
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103
104 usdhc2_pwrseq: usdhc2_pwrseq {
105 compatible = "mmc-pwrseq-simple";
106 clocks = <&clks IMX7D_CLKO2_ROOT_DIV>;
107 clock-names = "ext_clock";
108 };
109};
110
111&clks {
112 assigned-clocks = <&clks IMX7D_CLKO2_ROOT_SRC>,
113 <&clks IMX7D_CLKO2_ROOT_DIV>;
114 assigned-clock-parents = <&clks IMX7D_CKIL>;
115 assigned-clock-rates = <0>, <32768>;
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116};
117
118&i2c4 {
119 pinctrl-names = "default";
120 pinctrl-0 = <&pinctrl_i2c4>;
121 status = "okay";
122
8dccafaa 123 pmic: pfuze3000@8 {
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124 compatible = "fsl,pfuze3000";
125 reg = <0x08>;
126
127 regulators {
128 sw1a_reg: sw1a {
129 regulator-min-microvolt = <700000>;
130 regulator-max-microvolt = <3300000>;
131 regulator-boot-on;
132 regulator-always-on;
133 regulator-ramp-delay = <6250>;
134 };
135 /* use sw1c_reg to align with pfuze100/pfuze200 */
136 sw1c_reg: sw1b {
137 regulator-min-microvolt = <700000>;
138 regulator-max-microvolt = <1475000>;
139 regulator-boot-on;
140 regulator-always-on;
141 regulator-ramp-delay = <6250>;
142 };
143
144 sw2_reg: sw2 {
145 regulator-min-microvolt = <1800000>;
146 regulator-max-microvolt = <1850000>;
147 regulator-boot-on;
148 regulator-always-on;
149 };
150
151 sw3a_reg: sw3 {
152 regulator-min-microvolt = <900000>;
153 regulator-max-microvolt = <1650000>;
154 regulator-boot-on;
155 regulator-always-on;
156 };
157
158 swbst_reg: swbst {
159 regulator-min-microvolt = <5000000>;
160 regulator-max-microvolt = <5150000>;
161 };
162
163 snvs_reg: vsnvs {
164 regulator-min-microvolt = <1000000>;
165 regulator-max-microvolt = <3000000>;
166 regulator-boot-on;
167 regulator-always-on;
168 };
169
170 vref_reg: vrefddr {
171 regulator-boot-on;
172 regulator-always-on;
173 };
174
175 vgen1_reg: vldo1 {
176 regulator-min-microvolt = <1800000>;
177 regulator-max-microvolt = <3300000>;
178 regulator-always-on;
179 };
180
181 vgen2_reg: vldo2 {
182 regulator-min-microvolt = <800000>;
183 regulator-max-microvolt = <1550000>;
184 };
185
186 vgen3_reg: vccsd {
187 regulator-min-microvolt = <2850000>;
188 regulator-max-microvolt = <3300000>;
189 regulator-always-on;
190 };
191
192 vgen4_reg: v33 {
193 regulator-min-microvolt = <2850000>;
194 regulator-max-microvolt = <3300000>;
195 regulator-always-on;
196 };
197
198 vgen5_reg: vldo3 {
199 regulator-min-microvolt = <1800000>;
200 regulator-max-microvolt = <3300000>;
201 regulator-always-on;
202 };
203
204 vgen6_reg: vldo4 {
205 regulator-min-microvolt = <1800000>;
206 regulator-max-microvolt = <3300000>;
207 regulator-always-on;
208 };
209 };
210 };
211};
212
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213&usdhc2 { /* Wifi SDIO */
214 pinctrl-names = "default";
c3b9ab5d 215 pinctrl-0 = <&pinctrl_usdhc2 &pinctrl_wifi_clk>;
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216 no-1-8-v;
217 non-removable;
218 keep-power-in-suspend;
219 wakeup-source;
220 vmmc-supply = <&reg_ap6212>;
c3b9ab5d 221 mmc-pwrseq = <&usdhc2_pwrseq>;
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222 status = "okay";
223};
224
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225&usdhc3 {
226 pinctrl-names = "default", "state_100mhz", "state_200mhz";
227 pinctrl-0 = <&pinctrl_usdhc3>;
228 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
229 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
230 assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
231 assigned-clock-rates = <400000000>;
232 bus-width = <8>;
bdc111bd 233 no-1-8-v;
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234 fsl,tuning-step = <2>;
235 non-removable;
236 status = "okay";
237};
238
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239&wdog1 {
240 pinctrl-names = "default";
241 pinctrl-0 = <&pinctrl_wdog>;
242 fsl,ext-reset-output;
243 status = "okay";
244};
245
23c787a9 246&iomuxc {
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247 pinctrl_i2c4: i2c4grp {
248 fsl,pins = <
249 MX7D_PAD_SAI1_RX_BCLK__I2C4_SDA 0x4000007f
250 MX7D_PAD_SAI1_RX_SYNC__I2C4_SCL 0x4000007f
251 >;
252 };
253
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254 pinctrl_reg_ap6212: regap6212grp {
255 fsl,pins = <
256 MX7D_PAD_ECSPI1_SCLK__GPIO4_IO16 0x59
257 >;
258 };
259
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260 pinctrl_usdhc2: usdhc2grp {
261 fsl,pins = <
262 MX7D_PAD_SD2_CMD__SD2_CMD 0x59
263 MX7D_PAD_SD2_CLK__SD2_CLK 0x19
264 MX7D_PAD_SD2_DATA0__SD2_DATA0 0x59
265 MX7D_PAD_SD2_DATA1__SD2_DATA1 0x59
266 MX7D_PAD_SD2_DATA2__SD2_DATA2 0x59
267 MX7D_PAD_SD2_DATA3__SD2_DATA3 0x59
268 >;
269 };
270
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271 pinctrl_usdhc3: usdhc3grp {
272 fsl,pins = <
273 MX7D_PAD_SD3_CMD__SD3_CMD 0x59
274 MX7D_PAD_SD3_CLK__SD3_CLK 0x19
275 MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59
276 MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59
277 MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59
278 MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59
279 MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59
280 MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59
281 MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59
282 MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59
283 >;
284 };
285
286 pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
287 fsl,pins = <
288 MX7D_PAD_SD3_CMD__SD3_CMD 0x5a
289 MX7D_PAD_SD3_CLK__SD3_CLK 0x1a
290 MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a
291 MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a
292 MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a
293 MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5a
294 MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5a
295 MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5a
296 MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5a
297 MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5a
298 >;
299 };
300
301 pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
302 fsl,pins = <
303 MX7D_PAD_SD3_CMD__SD3_CMD 0x5b
304 MX7D_PAD_SD3_CLK__SD3_CLK 0x1b
305 MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b
306 MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b
307 MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b
308 MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5b
309 MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5b
310 MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5b
311 MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5b
312 MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5b
313 >;
314 };
315};
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316
317&iomuxc_lpsr {
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318 pinctrl_wifi_clk: wificlkgrp {
319 fsl,pins = <
320 MX7D_PAD_LPSR_GPIO1_IO03__CCM_CLKO2 0x7d
321 >;
322 };
323
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324 pinctrl_wdog: wdoggrp {
325 fsl,pins = <
37de44f2 326 MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x74
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327 >;
328 };
329};