projects / thirdparty / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| 7239280c JL |
1 | /* |
| 2 | * Copyright 2013-2014 Freescale Semiconductor, Inc. | |
| 3 | * | |
| 4 | * This file is dual-licensed: you can use it either under the terms | |
| 5 | * of the GPL or the X11 license, at your option. Note that this dual | |
| 6 | * licensing only applies to this file, and not this project as a | |
| 7 | * whole. | |
| 8 | * | |
| 9 | * a) This file is free software; you can redistribute it and/or | |
| 10 | * modify it under the terms of the GNU General Public License as | |
| 11 | * published by the Free Software Foundation; either version 2 of | |
| 12 | * the License, or (at your option) any later version. | |
| 13 | * | |
| 14 | * This file is distributed in the hope that it will be useful, | |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 17 | * GNU General Public License for more details. | |
| 18 | * | |
| 19 | * You should have received a copy of the GNU General Public | |
| 20 | * License along with this file; if not, write to the Free | |
| 21 | * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, | |
| 22 | * MA 02110-1301 USA | |
| 23 | * | |
| 24 | * Or, alternatively, | |
| 25 | * | |
| 26 | * b) Permission is hereby granted, free of charge, to any person | |
| 27 | * obtaining a copy of this software and associated documentation | |
| 28 | * files (the "Software"), to deal in the Software without | |
| 29 | * restriction, including without limitation the rights to use, | |
| 30 | * copy, modify, merge, publish, distribute, sublicense, and/or | |
| 31 | * sell copies of the Software, and to permit persons to whom the | |
| 32 | * Software is furnished to do so, subject to the following | |
| 33 | * conditions: | |
| 34 | * | |
| 35 | * The above copyright notice and this permission notice shall be | |
| 36 | * included in all copies or substantial portions of the Software. | |
| 37 | * | |
| 38 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
| 39 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES | |
| 40 | * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
| 41 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT | |
| 42 | * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, | |
| 43 | * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
| 44 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
| 45 | * OTHER DEALINGS IN THE SOFTWARE. | |
| 46 | */ | |
| 47 | ||
| 48 | #include "skeleton64.dtsi" | |
| 49 | #include <dt-bindings/interrupt-controller/arm-gic.h> | |
| 4d9e9cbb | 50 | #include <dt-bindings/thermal/thermal.h> |
| 7239280c JL |
51 | |
| 52 | / { | |
| 53 | compatible = "fsl,ls1021a"; | |
| 54 | interrupt-parent = <&gic>; | |
| 55 | ||
| 56 | aliases { | |
| 816aa61c | 57 | crypto = &crypto; |
| d69cb5d7 CM |
58 | ethernet0 = &enet0; |
| 59 | ethernet1 = &enet1; | |
| 60 | ethernet2 = &enet2; | |
| 7239280c JL |
61 | serial0 = &lpuart0; |
| 62 | serial1 = &lpuart1; | |
| 63 | serial2 = &lpuart2; | |
| 64 | serial3 = &lpuart3; | |
| 65 | serial4 = &lpuart4; | |
| 66 | serial5 = &lpuart5; | |
| 67 | sysclk = &sysclk; | |
| 68 | }; | |
| 69 | ||
| 70 | cpus { | |
| 71 | #address-cells = <1>; | |
| 72 | #size-cells = <0>; | |
| 73 | ||
| 4d9e9cbb | 74 | cpu0: cpu@f00 { |
| 7239280c JL |
75 | compatible = "arm,cortex-a7"; |
| 76 | device_type = "cpu"; | |
| 77 | reg = <0xf00>; | |
| b6f5e701 | 78 | clocks = <&clockgen 1 0>; |
| 4d9e9cbb | 79 | #cooling-cells = <2>; |
| 7239280c JL |
80 | }; |
| 81 | ||
| 4d9e9cbb | 82 | cpu1: cpu@f01 { |
| 7239280c JL |
83 | compatible = "arm,cortex-a7"; |
| 84 | device_type = "cpu"; | |
| 85 | reg = <0xf01>; | |
| b6f5e701 | 86 | clocks = <&clockgen 1 0>; |
| 47768f37 | 87 | #cooling-cells = <2>; |
| 7239280c JL |
88 | }; |
| 89 | }; | |
| 90 | ||
| b6f5e701 YT |
91 | sysclk: sysclk { |
| 92 | compatible = "fixed-clock"; | |
| 93 | #clock-cells = <0>; | |
| 94 | clock-frequency = <100000000>; | |
| 95 | clock-output-names = "sysclk"; | |
| 96 | }; | |
| 97 | ||
| 7239280c JL |
98 | timer { |
| 99 | compatible = "arm,armv7-timer"; | |
| 100 | interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, | |
| 101 | <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, | |
| 102 | <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, | |
| 103 | <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; | |
| 104 | }; | |
| 105 | ||
| 106 | pmu { | |
| 107 | compatible = "arm,cortex-a7-pmu"; | |
| 108 | interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, | |
| 109 | <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; | |
| 6742139b | 110 | interrupt-affinity = <&cpu0>, <&cpu1>; |
| 7239280c JL |
111 | }; |
| 112 | ||
| 7eaec553 RV |
113 | reboot { |
| 114 | compatible = "syscon-reboot"; | |
| 115 | regmap = <&dcfg>; | |
| 116 | offset = <0xb0>; | |
| 117 | mask = <0x02>; | |
| 7239280c JL |
118 | }; |
| 119 | ||
| 120 | soc { | |
| 121 | compatible = "simple-bus"; | |
| 122 | #address-cells = <2>; | |
| 123 | #size-cells = <2>; | |
| 124 | device_type = "soc"; | |
| 125 | interrupt-parent = <&gic>; | |
| 126 | ranges; | |
| 127 | ||
| 128 | gic: interrupt-controller@1400000 { | |
| 387720c9 | 129 | compatible = "arm,gic-400", "arm,cortex-a7-gic"; |
| 7239280c JL |
130 | #interrupt-cells = <3>; |
| 131 | interrupt-controller; | |
| 132 | reg = <0x0 0x1401000 0x0 0x1000>, | |
| 387720c9 | 133 | <0x0 0x1402000 0x0 0x2000>, |
| 7239280c JL |
134 | <0x0 0x1404000 0x0 0x2000>, |
| 135 | <0x0 0x1406000 0x0 0x2000>; | |
| 136 | interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; | |
| 137 | ||
| 138 | }; | |
| 139 | ||
| f4a458fd | 140 | msi1: msi-controller@1570e00 { |
| c9041ea3 | 141 | compatible = "fsl,ls1021a-msi"; |
| f4a458fd ML |
142 | reg = <0x0 0x1570e00 0x0 0x8>; |
| 143 | msi-controller; | |
| 144 | interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>; | |
| 145 | }; | |
| 146 | ||
| 147 | msi2: msi-controller@1570e08 { | |
| c9041ea3 | 148 | compatible = "fsl,ls1021a-msi"; |
| f4a458fd ML |
149 | reg = <0x0 0x1570e08 0x0 0x8>; |
| 150 | msi-controller; | |
| 151 | interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>; | |
| 152 | }; | |
| 153 | ||
| 7239280c JL |
154 | ifc: ifc@1530000 { |
| 155 | compatible = "fsl,ifc", "simple-bus"; | |
| 156 | reg = <0x0 0x1530000 0x0 0x10000>; | |
| 157 | interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; | |
| 158 | }; | |
| 159 | ||
| 160 | dcfg: dcfg@1ee0000 { | |
| 161 | compatible = "fsl,ls1021a-dcfg", "syscon"; | |
| 162 | reg = <0x0 0x1ee0000 0x0 0x10000>; | |
| 163 | big-endian; | |
| 164 | }; | |
| 165 | ||
| 85f8ee78 SL |
166 | qspi: quadspi@1550000 { |
| 167 | compatible = "fsl,ls1021a-qspi"; | |
| 168 | #address-cells = <1>; | |
| 169 | #size-cells = <0>; | |
| 170 | reg = <0x0 0x1550000 0x0 0x10000>, | |
| 171 | <0x0 0x40000000 0x0 0x40000000>; | |
| 172 | reg-names = "QuadSPI", "QuadSPI-memory"; | |
| 173 | interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>; | |
| 174 | clock-names = "qspi_en", "qspi"; | |
| 175 | clocks = <&clockgen 4 1>, <&clockgen 4 1>; | |
| 176 | big-endian; | |
| 177 | status = "disabled"; | |
| 178 | }; | |
| 179 | ||
| 7239280c | 180 | esdhc: esdhc@1560000 { |
| d5c7b4d5 | 181 | compatible = "fsl,ls1021a-esdhc", "fsl,esdhc"; |
| 7239280c JL |
182 | reg = <0x0 0x1560000 0x0 0x10000>; |
| 183 | interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; | |
| 184 | clock-frequency = <0>; | |
| 185 | voltage-ranges = <1800 1800 3300 3300>; | |
| 186 | sdhci,auto-cmd12; | |
| 187 | big-endian; | |
| 188 | bus-width = <4>; | |
| 189 | status = "disabled"; | |
| 190 | }; | |
| 191 | ||
| 318f05e5 TY |
192 | sata: sata@3200000 { |
| 193 | compatible = "fsl,ls1021a-ahci"; | |
| 194 | reg = <0x0 0x3200000 0x0 0x10000>, | |
| 195 | <0x0 0x20220520 0x0 0x4>; | |
| 196 | reg-names = "ahci", "sata-ecc"; | |
| 197 | interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; | |
| b6f5e701 | 198 | clocks = <&clockgen 4 1>; |
| 318f05e5 TY |
199 | dma-coherent; |
| 200 | status = "disabled"; | |
| 201 | }; | |
| 202 | ||
| 7239280c JL |
203 | scfg: scfg@1570000 { |
| 204 | compatible = "fsl,ls1021a-scfg", "syscon"; | |
| 205 | reg = <0x0 0x1570000 0x0 0x10000>; | |
| 4fe6be0f | 206 | big-endian; |
| 7239280c JL |
207 | }; |
| 208 | ||
| 816aa61c HG |
209 | crypto: crypto@1700000 { |
| 210 | compatible = "fsl,sec-v5.0", "fsl,sec-v4.0"; | |
| 211 | fsl,sec-era = <7>; | |
| 212 | #address-cells = <1>; | |
| 213 | #size-cells = <1>; | |
| 214 | reg = <0x0 0x1700000 0x0 0x100000>; | |
| 215 | ranges = <0x0 0x0 0x1700000 0x100000>; | |
| 216 | interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; | |
| 217 | ||
| 218 | sec_jr0: jr@10000 { | |
| 219 | compatible = "fsl,sec-v5.0-job-ring", | |
| 220 | "fsl,sec-v4.0-job-ring"; | |
| 221 | reg = <0x10000 0x10000>; | |
| 222 | interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; | |
| 223 | }; | |
| 224 | ||
| 225 | sec_jr1: jr@20000 { | |
| 226 | compatible = "fsl,sec-v5.0-job-ring", | |
| 227 | "fsl,sec-v4.0-job-ring"; | |
| 228 | reg = <0x20000 0x10000>; | |
| 229 | interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; | |
| 230 | }; | |
| 231 | ||
| 232 | sec_jr2: jr@30000 { | |
| 233 | compatible = "fsl,sec-v5.0-job-ring", | |
| 234 | "fsl,sec-v4.0-job-ring"; | |
| 235 | reg = <0x30000 0x10000>; | |
| 236 | interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; | |
| 237 | }; | |
| 238 | ||
| 239 | sec_jr3: jr@40000 { | |
| 240 | compatible = "fsl,sec-v5.0-job-ring", | |
| 241 | "fsl,sec-v4.0-job-ring"; | |
| 242 | reg = <0x40000 0x10000>; | |
| 243 | interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; | |
| 244 | }; | |
| 245 | ||
| 246 | }; | |
| 247 | ||
| 7239280c | 248 | clockgen: clocking@1ee1000 { |
| b6f5e701 YT |
249 | compatible = "fsl,ls1021a-clockgen"; |
| 250 | reg = <0x0 0x1ee1000 0x0 0x1000>; | |
| 251 | #clock-cells = <2>; | |
| 252 | clocks = <&sysclk>; | |
| 7239280c JL |
253 | }; |
| 254 | ||
| 4d9e9cbb HJ |
255 | tmu: tmu@1f00000 { |
| 256 | compatible = "fsl,qoriq-tmu"; | |
| 257 | reg = <0x0 0x1f00000 0x0 0x10000>; | |
| 258 | interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; | |
| 259 | fsl,tmu-range = <0xb0000 0xa0026 0x80048 0x30061>; | |
| 260 | fsl,tmu-calibration = <0x00000000 0x0000000f | |
| 261 | 0x00000001 0x00000017 | |
| 262 | 0x00000002 0x0000001e | |
| 263 | 0x00000003 0x00000026 | |
| 264 | 0x00000004 0x0000002e | |
| 265 | 0x00000005 0x00000035 | |
| 266 | 0x00000006 0x0000003d | |
| 267 | 0x00000007 0x00000044 | |
| 268 | 0x00000008 0x0000004c | |
| 269 | 0x00000009 0x00000053 | |
| 270 | 0x0000000a 0x0000005b | |
| 271 | 0x0000000b 0x00000064 | |
| 272 | ||
| 273 | 0x00010000 0x00000011 | |
| 274 | 0x00010001 0x0000001c | |
| 275 | 0x00010002 0x00000024 | |
| 276 | 0x00010003 0x0000002b | |
| 277 | 0x00010004 0x00000034 | |
| 278 | 0x00010005 0x00000039 | |
| 279 | 0x00010006 0x00000042 | |
| 280 | 0x00010007 0x0000004c | |
| 281 | 0x00010008 0x00000051 | |
| 282 | 0x00010009 0x0000005a | |
| 283 | 0x0001000a 0x00000063 | |
| 284 | ||
| 285 | 0x00020000 0x00000013 | |
| 286 | 0x00020001 0x00000019 | |
| 287 | 0x00020002 0x00000024 | |
| 288 | 0x00020003 0x0000002c | |
| 289 | 0x00020004 0x00000035 | |
| 290 | 0x00020005 0x0000003d | |
| 291 | 0x00020006 0x00000046 | |
| 292 | 0x00020007 0x00000050 | |
| 293 | 0x00020008 0x00000059 | |
| 294 | ||
| 295 | 0x00030000 0x00000002 | |
| 296 | 0x00030001 0x0000000d | |
| 297 | 0x00030002 0x00000019 | |
| 298 | 0x00030003 0x00000024>; | |
| 299 | #thermal-sensor-cells = <1>; | |
| 300 | }; | |
| 301 | ||
| 302 | thermal-zones { | |
| 303 | cpu_thermal: cpu-thermal { | |
| 304 | polling-delay-passive = <1000>; | |
| 305 | polling-delay = <5000>; | |
| 306 | ||
| 307 | thermal-sensors = <&tmu 0>; | |
| 308 | ||
| 309 | trips { | |
| 310 | cpu_alert: cpu-alert { | |
| 311 | temperature = <85000>; | |
| 312 | hysteresis = <2000>; | |
| 313 | type = "passive"; | |
| 314 | }; | |
| 315 | cpu_crit: cpu-crit { | |
| 316 | temperature = <95000>; | |
| 317 | hysteresis = <2000>; | |
| 318 | type = "critical"; | |
| 319 | }; | |
| 320 | }; | |
| 321 | ||
| 322 | cooling-maps { | |
| 323 | map0 { | |
| 324 | trip = <&cpu_alert>; | |
| 325 | cooling-device = | |
| 326 | <&cpu0 THERMAL_NO_LIMIT | |
| 327 | THERMAL_NO_LIMIT>; | |
| 328 | }; | |
| 329 | }; | |
| 330 | }; | |
| 331 | }; | |
| 332 | ||
| 7239280c | 333 | dspi0: dspi@2100000 { |
| c47d6e38 | 334 | compatible = "fsl,ls1021a-v1.0-dspi"; |
| 7239280c JL |
335 | #address-cells = <1>; |
| 336 | #size-cells = <0>; | |
| 337 | reg = <0x0 0x2100000 0x0 0x10000>; | |
| 338 | interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; | |
| 339 | clock-names = "dspi"; | |
| b6f5e701 | 340 | clocks = <&clockgen 4 1>; |
| 5b9f967c | 341 | spi-num-chipselects = <6>; |
| 7239280c JL |
342 | big-endian; |
| 343 | status = "disabled"; | |
| 344 | }; | |
| 345 | ||
| 346 | dspi1: dspi@2110000 { | |
| c47d6e38 | 347 | compatible = "fsl,ls1021a-v1.0-dspi"; |
| 7239280c JL |
348 | #address-cells = <1>; |
| 349 | #size-cells = <0>; | |
| 350 | reg = <0x0 0x2110000 0x0 0x10000>; | |
| 351 | interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; | |
| 352 | clock-names = "dspi"; | |
| b6f5e701 | 353 | clocks = <&clockgen 4 1>; |
| 5b9f967c | 354 | spi-num-chipselects = <6>; |
| 7239280c JL |
355 | big-endian; |
| 356 | status = "disabled"; | |
| 357 | }; | |
| 358 | ||
| 359 | i2c0: i2c@2180000 { | |
| 360 | compatible = "fsl,vf610-i2c"; | |
| 361 | #address-cells = <1>; | |
| 362 | #size-cells = <0>; | |
| 363 | reg = <0x0 0x2180000 0x0 0x10000>; | |
| 364 | interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>; | |
| 365 | clock-names = "i2c"; | |
| b6f5e701 | 366 | clocks = <&clockgen 4 1>; |
| 7239280c JL |
367 | status = "disabled"; |
| 368 | }; | |
| 369 | ||
| 370 | i2c1: i2c@2190000 { | |
| 371 | compatible = "fsl,vf610-i2c"; | |
| 372 | #address-cells = <1>; | |
| 373 | #size-cells = <0>; | |
| 374 | reg = <0x0 0x2190000 0x0 0x10000>; | |
| 375 | interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; | |
| 376 | clock-names = "i2c"; | |
| b6f5e701 | 377 | clocks = <&clockgen 4 1>; |
| 7239280c JL |
378 | status = "disabled"; |
| 379 | }; | |
| 380 | ||
| 381 | i2c2: i2c@21a0000 { | |
| 382 | compatible = "fsl,vf610-i2c"; | |
| 383 | #address-cells = <1>; | |
| 384 | #size-cells = <0>; | |
| 385 | reg = <0x0 0x21a0000 0x0 0x10000>; | |
| 386 | interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; | |
| 387 | clock-names = "i2c"; | |
| b6f5e701 | 388 | clocks = <&clockgen 4 1>; |
| 7239280c JL |
389 | status = "disabled"; |
| 390 | }; | |
| 391 | ||
| 392 | uart0: serial@21c0500 { | |
| 393 | compatible = "fsl,16550-FIFO64", "ns16550a"; | |
| 394 | reg = <0x0 0x21c0500 0x0 0x100>; | |
| 395 | interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; | |
| 396 | clock-frequency = <0>; | |
| 397 | fifo-size = <15>; | |
| 398 | status = "disabled"; | |
| 399 | }; | |
| 400 | ||
| 401 | uart1: serial@21c0600 { | |
| 402 | compatible = "fsl,16550-FIFO64", "ns16550a"; | |
| 403 | reg = <0x0 0x21c0600 0x0 0x100>; | |
| 404 | interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; | |
| 405 | clock-frequency = <0>; | |
| 406 | fifo-size = <15>; | |
| 407 | status = "disabled"; | |
| 408 | }; | |
| 409 | ||
| 410 | uart2: serial@21d0500 { | |
| 411 | compatible = "fsl,16550-FIFO64", "ns16550a"; | |
| 412 | reg = <0x0 0x21d0500 0x0 0x100>; | |
| 413 | interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; | |
| 414 | clock-frequency = <0>; | |
| 415 | fifo-size = <15>; | |
| 416 | status = "disabled"; | |
| 417 | }; | |
| 418 | ||
| 419 | uart3: serial@21d0600 { | |
| 420 | compatible = "fsl,16550-FIFO64", "ns16550a"; | |
| 421 | reg = <0x0 0x21d0600 0x0 0x100>; | |
| 422 | interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; | |
| 423 | clock-frequency = <0>; | |
| 424 | fifo-size = <15>; | |
| 425 | status = "disabled"; | |
| 426 | }; | |
| 427 | ||
| c54dd442 LG |
428 | gpio0: gpio@2300000 { |
| 429 | compatible = "fsl,ls1021a-gpio", "fsl,qoriq-gpio"; | |
| 430 | reg = <0x0 0x2300000 0x0 0x10000>; | |
| 431 | interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; | |
| 432 | gpio-controller; | |
| 433 | #gpio-cells = <2>; | |
| 434 | interrupt-controller; | |
| 435 | #interrupt-cells = <2>; | |
| 436 | }; | |
| 437 | ||
| 438 | gpio1: gpio@2310000 { | |
| 439 | compatible = "fsl,ls1021a-gpio", "fsl,qoriq-gpio"; | |
| 440 | reg = <0x0 0x2310000 0x0 0x10000>; | |
| 441 | interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; | |
| 442 | gpio-controller; | |
| 443 | #gpio-cells = <2>; | |
| 444 | interrupt-controller; | |
| 445 | #interrupt-cells = <2>; | |
| 446 | }; | |
| 447 | ||
| 448 | gpio2: gpio@2320000 { | |
| 449 | compatible = "fsl,ls1021a-gpio", "fsl,qoriq-gpio"; | |
| 450 | reg = <0x0 0x2320000 0x0 0x10000>; | |
| 451 | interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; | |
| 452 | gpio-controller; | |
| 453 | #gpio-cells = <2>; | |
| 454 | interrupt-controller; | |
| 455 | #interrupt-cells = <2>; | |
| 456 | }; | |
| 457 | ||
| 458 | gpio3: gpio@2330000 { | |
| 459 | compatible = "fsl,ls1021a-gpio", "fsl,qoriq-gpio"; | |
| 460 | reg = <0x0 0x2330000 0x0 0x10000>; | |
| 461 | interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; | |
| 462 | gpio-controller; | |
| 463 | #gpio-cells = <2>; | |
| 464 | interrupt-controller; | |
| 465 | #interrupt-cells = <2>; | |
| 466 | }; | |
| 467 | ||
| 7239280c JL |
468 | lpuart0: serial@2950000 { |
| 469 | compatible = "fsl,ls1021a-lpuart"; | |
| 470 | reg = <0x0 0x2950000 0x0 0x1000>; | |
| 471 | interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; | |
| 472 | clocks = <&sysclk>; | |
| 473 | clock-names = "ipg"; | |
| 474 | status = "disabled"; | |
| 475 | }; | |
| 476 | ||
| 477 | lpuart1: serial@2960000 { | |
| 478 | compatible = "fsl,ls1021a-lpuart"; | |
| 479 | reg = <0x0 0x2960000 0x0 0x1000>; | |
| 480 | interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; | |
| b6f5e701 | 481 | clocks = <&clockgen 4 1>; |
| 7239280c JL |
482 | clock-names = "ipg"; |
| 483 | status = "disabled"; | |
| 484 | }; | |
| 485 | ||
| 486 | lpuart2: serial@2970000 { | |
| 487 | compatible = "fsl,ls1021a-lpuart"; | |
| 488 | reg = <0x0 0x2970000 0x0 0x1000>; | |
| 489 | interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; | |
| b6f5e701 | 490 | clocks = <&clockgen 4 1>; |
| 7239280c JL |
491 | clock-names = "ipg"; |
| 492 | status = "disabled"; | |
| 493 | }; | |
| 494 | ||
| 495 | lpuart3: serial@2980000 { | |
| 496 | compatible = "fsl,ls1021a-lpuart"; | |
| 497 | reg = <0x0 0x2980000 0x0 0x1000>; | |
| 498 | interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; | |
| b6f5e701 | 499 | clocks = <&clockgen 4 1>; |
| 7239280c JL |
500 | clock-names = "ipg"; |
| 501 | status = "disabled"; | |
| 502 | }; | |
| 503 | ||
| 504 | lpuart4: serial@2990000 { | |
| 505 | compatible = "fsl,ls1021a-lpuart"; | |
| 506 | reg = <0x0 0x2990000 0x0 0x1000>; | |
| 507 | interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; | |
| b6f5e701 | 508 | clocks = <&clockgen 4 1>; |
| 7239280c JL |
509 | clock-names = "ipg"; |
| 510 | status = "disabled"; | |
| 511 | }; | |
| 512 | ||
| 513 | lpuart5: serial@29a0000 { | |
| 514 | compatible = "fsl,ls1021a-lpuart"; | |
| 515 | reg = <0x0 0x29a0000 0x0 0x1000>; | |
| 516 | interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; | |
| b6f5e701 | 517 | clocks = <&clockgen 4 1>; |
| 7239280c JL |
518 | clock-names = "ipg"; |
| 519 | status = "disabled"; | |
| 520 | }; | |
| 521 | ||
| 522 | wdog0: watchdog@2ad0000 { | |
| 523 | compatible = "fsl,imx21-wdt"; | |
| 524 | reg = <0x0 0x2ad0000 0x0 0x10000>; | |
| 525 | interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; | |
| b6f5e701 | 526 | clocks = <&clockgen 4 1>; |
| 7239280c JL |
527 | clock-names = "wdog-en"; |
| 528 | big-endian; | |
| 529 | }; | |
| 530 | ||
| 531 | sai1: sai@2b50000 { | |
| 50897cb6 | 532 | #sound-dai-cells = <0>; |
| 7239280c JL |
533 | compatible = "fsl,vf610-sai"; |
| 534 | reg = <0x0 0x2b50000 0x0 0x10000>; | |
| 535 | interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>; | |
| b6f5e701 YT |
536 | clocks = <&clockgen 4 1>, <&clockgen 4 1>, |
| 537 | <&clockgen 4 1>, <&clockgen 4 1>; | |
| 50897cb6 | 538 | clock-names = "bus", "mclk1", "mclk2", "mclk3"; |
| 7239280c JL |
539 | dma-names = "tx", "rx"; |
| 540 | dmas = <&edma0 1 47>, | |
| 541 | <&edma0 1 46>; | |
| 7239280c JL |
542 | status = "disabled"; |
| 543 | }; | |
| 544 | ||
| 545 | sai2: sai@2b60000 { | |
| 50897cb6 | 546 | #sound-dai-cells = <0>; |
| 7239280c JL |
547 | compatible = "fsl,vf610-sai"; |
| 548 | reg = <0x0 0x2b60000 0x0 0x10000>; | |
| 549 | interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; | |
| b6f5e701 YT |
550 | clocks = <&clockgen 4 1>, <&clockgen 4 1>, |
| 551 | <&clockgen 4 1>, <&clockgen 4 1>; | |
| 50897cb6 | 552 | clock-names = "bus", "mclk1", "mclk2", "mclk3"; |
| 7239280c JL |
553 | dma-names = "tx", "rx"; |
| 554 | dmas = <&edma0 1 45>, | |
| 555 | <&edma0 1 44>; | |
| 7239280c JL |
556 | status = "disabled"; |
| 557 | }; | |
| 558 | ||
| 559 | edma0: edma@2c00000 { | |
| 560 | #dma-cells = <2>; | |
| 561 | compatible = "fsl,vf610-edma"; | |
| 562 | reg = <0x0 0x2c00000 0x0 0x10000>, | |
| 563 | <0x0 0x2c10000 0x0 0x10000>, | |
| 564 | <0x0 0x2c20000 0x0 0x10000>; | |
| 565 | interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, | |
| 566 | <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; | |
| 567 | interrupt-names = "edma-tx", "edma-err"; | |
| 568 | dma-channels = <32>; | |
| 569 | big-endian; | |
| 570 | clock-names = "dmamux0", "dmamux1"; | |
| b6f5e701 YT |
571 | clocks = <&clockgen 4 1>, |
| 572 | <&clockgen 4 1>; | |
| 7239280c JL |
573 | }; |
| 574 | ||
| ab0087df MY |
575 | dcu: dcu@2ce0000 { |
| 576 | compatible = "fsl,ls1021a-dcu"; | |
| 577 | reg = <0x0 0x2ce0000 0x0 0x10000>; | |
| 578 | interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>; | |
| b6f5e701 YT |
579 | clocks = <&clockgen 4 0>, |
| 580 | <&clockgen 4 0>; | |
| 5d01e99e | 581 | clock-names = "dcu", "pix"; |
| ab0087df MY |
582 | big-endian; |
| 583 | status = "disabled"; | |
| 584 | }; | |
| 585 | ||
| 7239280c JL |
586 | mdio0: mdio@2d24000 { |
| 587 | compatible = "gianfar"; | |
| 588 | device_type = "mdio"; | |
| 589 | #address-cells = <1>; | |
| 590 | #size-cells = <0>; | |
| 55711961 EH |
591 | reg = <0x0 0x2d24000 0x0 0x4000>, |
| 592 | <0x0 0x2d10030 0x0 0x4>; | |
| 7239280c JL |
593 | }; |
| 594 | ||
| 3db66fdc YL |
595 | ptp_clock@2d10e00 { |
| 596 | compatible = "fsl,etsec-ptp"; | |
| 597 | reg = <0x0 0x2d10e00 0x0 0xb0>; | |
| 598 | interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; | |
| 599 | fsl,tclk-period = <5>; | |
| 600 | fsl,tmr-prsc = <2>; | |
| 601 | fsl,tmr-add = <0xaaaaaaab>; | |
| bdba5017 | 602 | fsl,tmr-fiper1 = <999999995>; |
| 3db66fdc YL |
603 | fsl,tmr-fiper2 = <99990>; |
| 604 | fsl,max-adj = <499999999>; | |
| 605 | }; | |
| 606 | ||
| d69cb5d7 CM |
607 | enet0: ethernet@2d10000 { |
| 608 | compatible = "fsl,etsec2"; | |
| 609 | device_type = "network"; | |
| 610 | #address-cells = <2>; | |
| 611 | #size-cells = <2>; | |
| 612 | interrupt-parent = <&gic>; | |
| 613 | model = "eTSEC"; | |
| 614 | fsl,magic-packet; | |
| 615 | ranges; | |
| 70b5ea97 | 616 | dma-coherent; |
| d69cb5d7 CM |
617 | |
| 618 | queue-group@2d10000 { | |
| 619 | #address-cells = <2>; | |
| 620 | #size-cells = <2>; | |
| 621 | reg = <0x0 0x2d10000 0x0 0x1000>; | |
| 622 | interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>, | |
| 623 | <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>, | |
| 624 | <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; | |
| 625 | }; | |
| 626 | ||
| 627 | queue-group@2d14000 { | |
| 628 | #address-cells = <2>; | |
| 629 | #size-cells = <2>; | |
| 630 | reg = <0x0 0x2d14000 0x0 0x1000>; | |
| 631 | interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>, | |
| 632 | <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, | |
| 633 | <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; | |
| 634 | }; | |
| 635 | }; | |
| 636 | ||
| 637 | enet1: ethernet@2d50000 { | |
| 638 | compatible = "fsl,etsec2"; | |
| 639 | device_type = "network"; | |
| 640 | #address-cells = <2>; | |
| 641 | #size-cells = <2>; | |
| 642 | interrupt-parent = <&gic>; | |
| 643 | model = "eTSEC"; | |
| 644 | ranges; | |
| 70b5ea97 | 645 | dma-coherent; |
| d69cb5d7 CM |
646 | |
| 647 | queue-group@2d50000 { | |
| 648 | #address-cells = <2>; | |
| 649 | #size-cells = <2>; | |
| 650 | reg = <0x0 0x2d50000 0x0 0x1000>; | |
| 651 | interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>, | |
| 652 | <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>, | |
| 653 | <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; | |
| 654 | }; | |
| 655 | ||
| 656 | queue-group@2d54000 { | |
| 657 | #address-cells = <2>; | |
| 658 | #size-cells = <2>; | |
| 659 | reg = <0x0 0x2d54000 0x0 0x1000>; | |
| 660 | interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>, | |
| 661 | <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>, | |
| 662 | <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; | |
| 663 | }; | |
| 664 | }; | |
| 665 | ||
| 666 | enet2: ethernet@2d90000 { | |
| 667 | compatible = "fsl,etsec2"; | |
| 668 | device_type = "network"; | |
| 669 | #address-cells = <2>; | |
| 670 | #size-cells = <2>; | |
| 671 | interrupt-parent = <&gic>; | |
| 672 | model = "eTSEC"; | |
| 673 | ranges; | |
| 70b5ea97 | 674 | dma-coherent; |
| d69cb5d7 CM |
675 | |
| 676 | queue-group@2d90000 { | |
| 677 | #address-cells = <2>; | |
| 678 | #size-cells = <2>; | |
| 679 | reg = <0x0 0x2d90000 0x0 0x1000>; | |
| 680 | interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>, | |
| 681 | <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>, | |
| 682 | <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; | |
| 683 | }; | |
| 684 | ||
| 685 | queue-group@2d94000 { | |
| 686 | #address-cells = <2>; | |
| 687 | #size-cells = <2>; | |
| 688 | reg = <0x0 0x2d94000 0x0 0x1000>; | |
| 689 | interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>, | |
| 690 | <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>, | |
| 691 | <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; | |
| 692 | }; | |
| 693 | }; | |
| 694 | ||
| 31fa7631 | 695 | usb2: usb@8600000 { |
| 7239280c JL |
696 | compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr"; |
| 697 | reg = <0x0 0x8600000 0x0 0x1000>; | |
| 698 | interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; | |
| 699 | dr_mode = "host"; | |
| 700 | phy_type = "ulpi"; | |
| 701 | }; | |
| 702 | ||
| 31fa7631 | 703 | usb3: usb3@3100000 { |
| 7239280c JL |
704 | compatible = "snps,dwc3"; |
| 705 | reg = <0x0 0x3100000 0x0 0x10000>; | |
| 706 | interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; | |
| 707 | dr_mode = "host"; | |
| 607e266c | 708 | snps,quirk-frame-length-adjustment = <0x20>; |
| 6f0808c4 | 709 | snps,dis_rxdet_inp3_quirk; |
| 7239280c | 710 | }; |
| bc7abb47 ML |
711 | |
| 712 | pcie@3400000 { | |
| 713 | compatible = "fsl,ls1021a-pcie", "snps,dw-pcie"; | |
| 714 | reg = <0x00 0x03400000 0x0 0x00010000 /* controller registers */ | |
| 715 | 0x40 0x00000000 0x0 0x00002000>; /* configuration space */ | |
| 716 | reg-names = "regs", "config"; | |
| 717 | interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */ | |
| 718 | fsl,pcie-scfg = <&scfg 0>; | |
| 719 | #address-cells = <3>; | |
| 720 | #size-cells = <2>; | |
| 721 | device_type = "pci"; | |
| 722 | num-lanes = <4>; | |
| 723 | bus-range = <0x0 0xff>; | |
| 724 | ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */ | |
| 725 | 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ | |
| df301588 | 726 | msi-parent = <&msi1>, <&msi2>; |
| bc7abb47 ML |
727 | #interrupt-cells = <1>; |
| 728 | interrupt-map-mask = <0 0 0 7>; | |
| 729 | interrupt-map = <0000 0 0 1 &gic GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, | |
| 730 | <0000 0 0 2 &gic GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, | |
| 731 | <0000 0 0 3 &gic GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>, | |
| 732 | <0000 0 0 4 &gic GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; | |
| 733 | }; | |
| 734 | ||
| 735 | pcie@3500000 { | |
| 736 | compatible = "fsl,ls1021a-pcie", "snps,dw-pcie"; | |
| 737 | reg = <0x00 0x03500000 0x0 0x00010000 /* controller registers */ | |
| 738 | 0x48 0x00000000 0x0 0x00002000>; /* configuration space */ | |
| 739 | reg-names = "regs", "config"; | |
| 740 | interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>; | |
| 741 | fsl,pcie-scfg = <&scfg 1>; | |
| 742 | #address-cells = <3>; | |
| 743 | #size-cells = <2>; | |
| 744 | device_type = "pci"; | |
| 745 | num-lanes = <4>; | |
| 746 | bus-range = <0x0 0xff>; | |
| 747 | ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */ | |
| 748 | 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ | |
| df301588 | 749 | msi-parent = <&msi1>, <&msi2>; |
| bc7abb47 ML |
750 | #interrupt-cells = <1>; |
| 751 | interrupt-map-mask = <0 0 0 7>; | |
| 752 | interrupt-map = <0000 0 0 1 &gic GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, | |
| 753 | <0000 0 0 2 &gic GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>, | |
| 754 | <0000 0 0 3 &gic GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>, | |
| 755 | <0000 0 0 4 &gic GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; | |
| 756 | }; | |
| fa2edcfb PB |
757 | |
| 758 | can0: can@2a70000 { | |
| 759 | compatible = "fsl,ls1021ar2-flexcan"; | |
| 760 | reg = <0x0 0x2a70000 0x0 0x1000>; | |
| 761 | interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>; | |
| 762 | clocks = <&clockgen 4 1>, <&clockgen 4 1>; | |
| 763 | clock-names = "ipg", "per"; | |
| 764 | big-endian; | |
| 765 | }; | |
| 766 | ||
| 767 | can1: can@2a80000 { | |
| 768 | compatible = "fsl,ls1021ar2-flexcan"; | |
| 769 | reg = <0x0 0x2a80000 0x0 0x1000>; | |
| 770 | interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; | |
| 771 | clocks = <&clockgen 4 1>, <&clockgen 4 1>; | |
| 772 | clock-names = "ipg", "per"; | |
| 773 | big-endian; | |
| 774 | }; | |
| 775 | ||
| 776 | can2: can@2a90000 { | |
| 777 | compatible = "fsl,ls1021ar2-flexcan"; | |
| 778 | reg = <0x0 0x2a90000 0x0 0x1000>; | |
| 779 | interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>; | |
| 780 | clocks = <&clockgen 4 1>, <&clockgen 4 1>; | |
| 781 | clock-names = "ipg", "per"; | |
| 782 | big-endian; | |
| 783 | }; | |
| 784 | ||
| 785 | can3: can@2aa0000 { | |
| 786 | compatible = "fsl,ls1021ar2-flexcan"; | |
| 787 | reg = <0x0 0x2aa0000 0x0 0x1000>; | |
| 788 | interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>; | |
| 789 | clocks = <&clockgen 4 1>, <&clockgen 4 1>; | |
| 790 | clock-names = "ipg", "per"; | |
| 791 | big-endian; | |
| 792 | }; | |
| 35090321 RV |
793 | |
| 794 | ocram1: sram@10000000 { | |
| 795 | compatible = "mmio-sram"; | |
| 796 | reg = <0x0 0x10000000 0x0 0x10000>; | |
| 797 | #address-cells = <1>; | |
| 798 | #size-cells = <1>; | |
| 799 | ranges = <0x0 0x0 0x10000000 0x10000>; | |
| 800 | }; | |
| 801 | ||
| 802 | ocram2: sram@10010000 { | |
| 803 | compatible = "mmio-sram"; | |
| 804 | reg = <0x0 0x10010000 0x0 0x10000>; | |
| 805 | #address-cells = <1>; | |
| 806 | #size-cells = <1>; | |
| 807 | ranges = <0x0 0x0 0x10010000 0x10000>; | |
| 808 | }; | |
| 7239280c JL |
809 | }; |
| 810 | }; |