[thirdparty/linux.git] / arch / arm / boot / dts / r8a7791-porter.dts

// SPDX-License-Identifier: GPL-2.0
/*
 * Device Tree Source for the Porter board
 *
 * Copyright (C) 2015 Cogent Embedded, Inc.
 */

/*
 * SSI-AK4642
 *
 * JP3: 2-1: AK4642
 *      2-3: ADV7511
 *
 * This command is required before playback/capture:
 *
 *	amixer set "LINEOUT Mixer DACL" on
 */

/dts-v1/;
#include "r8a7791.dtsi"
#include <dt-bindings/gpio/gpio.h>

/ {
	model = "Porter";
	compatible = "renesas,porter", "renesas,r8a7791";

	aliases {
		serial0 = &scif0;
		i2c9 = &gpioi2c2;
		i2c10 = &i2chdmi;
	};

	chosen {
		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
		stdout-path = "serial0:115200n8";
	};

	memory@40000000 {
		device_type = "memory";
		reg = <0 0x40000000 0 0x40000000>;
	};

	memory@200000000 {
		device_type = "memory";
		reg = <2 0x00000000 0 0x40000000>;
	};

	vcc_sdhi0: regulator-vcc-sdhi0 {
		compatible = "regulator-fixed";

		regulator-name = "SDHI0 Vcc";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
	};

	vccq_sdhi0: regulator-vccq-sdhi0 {
		compatible = "regulator-gpio";

		regulator-name = "SDHI0 VccQ";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <3300000>;

		gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
		gpios-states = <1>;
		states = <3300000 1>, <1800000 0>;
	};

	vcc_sdhi2: regulator-vcc-sdhi2 {
		compatible = "regulator-fixed";

		regulator-name = "SDHI2 Vcc";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
	};

	vccq_sdhi2: regulator-vccq-sdhi2 {
		compatible = "regulator-gpio";

		regulator-name = "SDHI2 VccQ";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <3300000>;

		gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
		gpios-states = <1>;
		states = <3300000 1>, <1800000 0>;
	};

	hdmi-out {
		compatible = "hdmi-connector";
		type = "a";

		port {
			hdmi_con: endpoint {
				remote-endpoint = <&adv7511_out>;
			};
		};
	};

	x3_clk: x3-clock {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <148500000>;
	};

	x16_clk: x16-clock {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <74250000>;
	};

	x14_clk: audio_clock {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <11289600>;
	};

	sound {
		compatible = "simple-audio-card";

		simple-audio-card,format = "left_j";
		simple-audio-card,bitclock-master = <&soundcodec>;
		simple-audio-card,frame-master = <&soundcodec>;

		simple-audio-card,cpu {
			sound-dai = <&rcar_sound>;
		};

		soundcodec: simple-audio-card,codec {
			sound-dai = <&ak4642>;
			clocks = <&x14_clk>;
		};
	};

	gpioi2c2: i2c-9 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "i2c-gpio";
		status = "disabled";
		scl-gpios = <&gpio2 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
		sda-gpios = <&gpio2 7 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
		i2c-gpio,delay-us = <5>;
	};

	/*
	 * A fallback to GPIO is provided for I2C2.
	 */
	i2chdmi: i2c-10 {
		compatible = "i2c-demux-pinctrl";
		i2c-parent = <&i2c2>, <&gpioi2c2>;
		i2c-bus-name = "i2c-hdmi";
		#address-cells = <1>;
		#size-cells = <0>;

		ak4642: codec@12 {
			compatible = "asahi-kasei,ak4642";
			#sound-dai-cells = <0>;
			reg = <0x12>;
		};

		composite-in@20 {
			compatible = "adi,adv7180";
			reg = <0x20>;
			remote = <&vin0>;

			port {
				adv7180: endpoint {
					bus-width = <8>;
					remote-endpoint = <&vin0ep>;
				};
			};
		};

		hdmi@39 {
			compatible = "adi,adv7511w";
			reg = <0x39>;
			interrupt-parent = <&gpio3>;
			interrupts = <29 IRQ_TYPE_LEVEL_LOW>;

			adi,input-depth = <8>;
			adi,input-colorspace = "rgb";
			adi,input-clock = "1x";

			ports {
				#address-cells = <1>;
				#size-cells = <0>;

				port@0 {
					reg = <0>;
					adv7511_in: endpoint {
						remote-endpoint = <&du_out_rgb>;
					};
				};

				port@1 {
					reg = <1>;
					adv7511_out: endpoint {
						remote-endpoint = <&hdmi_con>;
					};
				};
			};
		};
	};
};

&extal_clk {
	clock-frequency = <20000000>;
};

&pfc {
	scif0_pins: scif0 {
		groups = "scif0_data_d";
		function = "scif0";
	};

	ether_pins: ether {
		groups = "eth_link", "eth_mdio", "eth_rmii";
		function = "eth";
	};

	phy1_pins: phy1 {
		groups = "intc_irq0";
		function = "intc";
	};

	pmic_irq_pins: pmicirq {
		groups = "intc_irq2";
		function = "intc";
	};

	sdhi0_pins: sd0 {
		groups = "sdhi0_data4", "sdhi0_ctrl";
		function = "sdhi0";
	};

	sdhi2_pins: sd2 {
		groups = "sdhi2_data4", "sdhi2_ctrl";
		function = "sdhi2";
	};

	qspi_pins: qspi {
		groups = "qspi_ctrl", "qspi_data4";
		function = "qspi";
	};

	i2c2_pins: i2c2 {
		groups = "i2c2";
		function = "i2c2";
	};

	usb0_pins: usb0 {
		groups = "usb0";
		function = "usb0";
	};

	usb1_pins: usb1 {
		groups = "usb1";
		function = "usb1";
	};

	vin0_pins: vin0 {
		groups = "vin0_data8", "vin0_clk";
		function = "vin0";
	};

	can0_pins: can0 {
		groups = "can0_data";
		function = "can0";
	};

	du_pins: du {
		groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
		function = "du";
	};

	ssi_pins: sound {
		groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data";
		function = "ssi";
	};

	audio_clk_pins: audio_clk {
		groups = "audio_clk_a";
		function = "audio_clk";
	};
};

&scif0 {
	pinctrl-0 = <&scif0_pins>;
	pinctrl-names = "default";

	status = "okay";
};

&ether {
	pinctrl-0 = <&ether_pins &phy1_pins>;
	pinctrl-names = "default";

	phy-handle = <&phy1>;
	renesas,ether-link-active-low;
	status = "okay";

	phy1: ethernet-phy@1 {
		reg = <1>;
		interrupt-parent = <&irqc0>;
		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
		micrel,led-mode = <1>;
		reset-gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;
	};
};

&sdhi0 {
	pinctrl-0 = <&sdhi0_pins>;
	pinctrl-names = "default";

	vmmc-supply = <&vcc_sdhi0>;
	vqmmc-supply = <&vccq_sdhi0>;
	cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
	wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
	status = "okay";
};

&sdhi2 {
	pinctrl-0 = <&sdhi2_pins>;
	pinctrl-names = "default";

	vmmc-supply = <&vcc_sdhi2>;
	vqmmc-supply = <&vccq_sdhi2>;
	cd-gpios = <&gpio6 22 GPIO_ACTIVE_LOW>;
	status = "okay";
};

&qspi {
	pinctrl-0 = <&qspi_pins>;
	pinctrl-names = "default";

	status = "okay";

	flash@0 {
		compatible = "spansion,s25fl512s", "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <30000000>;
		spi-tx-bus-width = <4>;
		spi-rx-bus-width = <4>;
		m25p,fast-read;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "loader_prg";
				reg = <0x00000000 0x00040000>;
				read-only;
			};
			partition@40000 {
				label = "user_prg";
				reg = <0x00040000 0x00400000>;
				read-only;
			};
			partition@440000 {
				label = "flash_fs";
				reg = <0x00440000 0x03bc0000>;
			};
		};
	};
};

&i2c2 {
	pinctrl-0 = <&i2c2_pins>;
	pinctrl-names = "i2c-hdmi";

	clock-frequency = <400000>;
};

&i2c6 {
	pinctrl-names = "default";
	pinctrl-0 = <&pmic_irq_pins>;
	status = "okay";
	clock-frequency = <100000>;

	pmic@5a {
		compatible = "dlg,da9063l";
		reg = <0x5a>;
		interrupt-parent = <&irqc0>;
		interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
		interrupt-controller;

		wdt {
			compatible = "dlg,da9063-watchdog";
		};
	};

	vdd_dvfs: regulator@68 {
		compatible = "dlg,da9210";
		reg = <0x68>;
		interrupt-parent = <&irqc0>;
		interrupts = <2 IRQ_TYPE_LEVEL_LOW>;

		regulator-min-microvolt = <1000000>;
		regulator-max-microvolt = <1000000>;
		regulator-boot-on;
		regulator-always-on;
	};
};

&sata0 {
	status = "okay";
};

&cpu0 {
	cpu0-supply = <&vdd_dvfs>;
};

/* composite video input */
&vin0 {
	status = "okay";
	pinctrl-0 = <&vin0_pins>;
	pinctrl-names = "default";

	port {
		vin0ep: endpoint {
			remote-endpoint = <&adv7180>;
			bus-width = <8>;
		};
	};
};

&pci0 {
	pinctrl-0 = <&usb0_pins>;
	pinctrl-names = "default";

	status = "okay";
};

&pci1 {
	pinctrl-0 = <&usb1_pins>;
	pinctrl-names = "default";

	status = "okay";
};

&hsusb {
	pinctrl-0 = <&usb0_pins>;
	pinctrl-names = "default";

	status = "okay";
};

&usbphy {
	status = "okay";
};

&pcie_bus_clk {
	clock-frequency = <100000000>;
};

&pciec {
	status = "okay";
};

&can0 {
	pinctrl-0 = <&can0_pins>;
	pinctrl-names = "default";

	status = "okay";
};

&du {
	pinctrl-0 = <&du_pins>;
	pinctrl-names = "default";
	status = "okay";

	clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
		 <&x3_clk>, <&x16_clk>;
	clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";

	ports {
		port@0 {
			endpoint {
				remote-endpoint = <&adv7511_in>;
			};
		};
	};
};

&lvds0 {
	ports {
		port@1 {
			lvds_connector: endpoint {
			};
		};
	};
};

&rcar_sound {
	pinctrl-0 = <&ssi_pins &audio_clk_pins>;
	pinctrl-names = "default";
	status = "okay";

	/* Single DAI */
	#sound-dai-cells = <0>;

	rcar_sound,dai {
		dai0 {
			playback = <&ssi0>;
			capture  = <&ssi1>;
		};
	};
};

&rwdt {
	timeout-sec = <60>;
	status = "okay";
};

&ssi1 {
	shared-pin;
};
Commit	Line	Data
cdbfaf64	1	// SPDX-License-Identifier: GPL-2.0
f138e54c SS	2	/*
	3	* Device Tree Source for the Porter board
	4	*
	5	* Copyright (C) 2015 Cogent Embedded, Inc.
f138e54c SS	6	*/
f138e54c SS	7
493b4da7 SS	8	/*
	9	* SSI-AK4642
	10	*
f3b063c8 SS	11	* JP3: 2-1: AK4642
f3b063c8 SS	12	* 2-3: ADV7511
493b4da7 SS	13	*
	14	* This command is required before playback/capture:
	15	*
	16	* amixer set "LINEOUT Mixer DACL" on
	17	*/
	18
f138e54c SS	19	/dts-v1/;
f138e54c SS	20	#include "r8a7791.dtsi"
b941a5cb	21	#include <dt-bindings/gpio/gpio.h>
f138e54c SS	22
	23	/ {
	24	model = "Porter";
	25	compatible = "renesas,porter", "renesas,r8a7791";
	26
	27	aliases {
	28	serial0 = &scif0;
12937bff WS	29	i2c9 = &gpioi2c2;
12937bff WS	30	i2c10 = &i2chdmi;
f138e54c SS	31	};
	32
	33	chosen {
07d2bf96	34	bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
bf204769	35	stdout-path = "serial0:115200n8";
f138e54c SS	36	};
	37
	38	memory@40000000 {
	39	device_type = "memory";
	40	reg = <0 0x40000000 0 0x40000000>;
	41	};
	42
	43	memory@200000000 {
	44	device_type = "memory";
	45	reg = <2 0x00000000 0 0x40000000>;
	46	};
b941a5cb	47
afed0c94	48	vcc_sdhi0: regulator-vcc-sdhi0 {
b941a5cb SS	49	compatible = "regulator-fixed";
	50
	51	regulator-name = "SDHI0 Vcc";
	52	regulator-min-microvolt = <3300000>;
	53	regulator-max-microvolt = <3300000>;
	54	regulator-always-on;
	55	};
	56
afed0c94	57	vccq_sdhi0: regulator-vccq-sdhi0 {
b941a5cb SS	58	compatible = "regulator-gpio";
	59
	60	regulator-name = "SDHI0 VccQ";
	61	regulator-min-microvolt = <1800000>;
	62	regulator-max-microvolt = <3300000>;
	63
	64	gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
	65	gpios-states = <1>;
8a481af1	66	states = <3300000 1>, <1800000 0>;
b941a5cb SS	67	};
b941a5cb SS	68
afed0c94	69	vcc_sdhi2: regulator-vcc-sdhi2 {
b941a5cb SS	70	compatible = "regulator-fixed";
	71
	72	regulator-name = "SDHI2 Vcc";
	73	regulator-min-microvolt = <3300000>;
	74	regulator-max-microvolt = <3300000>;
	75	regulator-always-on;
	76	};
	77
afed0c94	78	vccq_sdhi2: regulator-vccq-sdhi2 {
b941a5cb SS	79	compatible = "regulator-gpio";
	80
	81	regulator-name = "SDHI2 VccQ";
	82	regulator-min-microvolt = <1800000>;
	83	regulator-max-microvolt = <3300000>;
	84
	85	gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
	86	gpios-states = <1>;
8a481af1	87	states = <3300000 1>, <1800000 0>;
b941a5cb	88	};
c5af8a42 SS	89
	90	hdmi-out {
	91	compatible = "hdmi-connector";
	92	type = "a";
	93
	94	port {
	95	hdmi_con: endpoint {
	96	remote-endpoint = <&adv7511_out>;
	97	};
	98	};
	99	};
	100
	101	x3_clk: x3-clock {
	102	compatible = "fixed-clock";
	103	#clock-cells = <0>;
	104	clock-frequency = <148500000>;
	105	};
	106
	107	x16_clk: x16-clock {
	108	compatible = "fixed-clock";
	109	#clock-cells = <0>;
	110	clock-frequency = <74250000>;
	111	};
493b4da7	112
203f0ef8	113	x14_clk: audio_clock {
493b4da7 SS	114	compatible = "fixed-clock";
	115	#clock-cells = <0>;
	116	clock-frequency = <11289600>;
493b4da7 SS	117	};
	118
	119	sound {
	120	compatible = "simple-audio-card";
	121
	122	simple-audio-card,format = "left_j";
	123	simple-audio-card,bitclock-master = <&soundcodec>;
	124	simple-audio-card,frame-master = <&soundcodec>;
	125
	126	simple-audio-card,cpu {
	127	sound-dai = <&rcar_sound>;
	128	};
	129
	130	soundcodec: simple-audio-card,codec {
	131	sound-dai = <&ak4642>;
	132	clocks = <&x14_clk>;
	133	};
	134	};
12937bff WS	135
	136	gpioi2c2: i2c-9 {
	137	#address-cells = <1>;
	138	#size-cells = <0>;
	139	compatible = "i2c-gpio";
	140	status = "disabled";
	141	scl-gpios = <&gpio2 6 (GPIO_ACTIVE_HIGH \| GPIO_OPEN_DRAIN)>;
	142	sda-gpios = <&gpio2 7 (GPIO_ACTIVE_HIGH \| GPIO_OPEN_DRAIN)>;
	143	i2c-gpio,delay-us = <5>;
	144	};
	145
	146	/*
	147	* A fallback to GPIO is provided for I2C2.
	148	*/
	149	i2chdmi: i2c-10 {
	150	compatible = "i2c-demux-pinctrl";
	151	i2c-parent = <&i2c2>, <&gpioi2c2>;
	152	i2c-bus-name = "i2c-hdmi";
	153	#address-cells = <1>;
	154	#size-cells = <0>;
	155
	156	ak4642: codec@12 {
	157	compatible = "asahi-kasei,ak4642";
	158	#sound-dai-cells = <0>;
	159	reg = <0x12>;
	160	};
	161
	162	composite-in@20 {
	163	compatible = "adi,adv7180";
	164	reg = <0x20>;
	165	remote = <&vin0>;
	166
	167	port {
	168	adv7180: endpoint {
	169	bus-width = <8>;
	170	remote-endpoint = <&vin0ep>;
	171	};
	172	};
	173	};
	174
	175	hdmi@39 {
	176	compatible = "adi,adv7511w";
	177	reg = <0x39>;
	178	interrupt-parent = <&gpio3>;
	179	interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
	180
	181	adi,input-depth = <8>;
	182	adi,input-colorspace = "rgb";
	183	adi,input-clock = "1x";
12937bff WS	184
	185	ports {
	186	#address-cells = <1>;
	187	#size-cells = <0>;
	188
	189	port@0 {
	190	reg = <0>;
	191	adv7511_in: endpoint {
	192	remote-endpoint = <&du_out_rgb>;
	193	};
	194	};
	195
	196	port@1 {
	197	reg = <1>;
	198	adv7511_out: endpoint {
	199	remote-endpoint = <&hdmi_con>;
	200	};
	201	};
	202	};
	203	};
	204	};
f138e54c SS	205	};
	206
	207	&extal_clk {
	208	clock-frequency = <20000000>;
	209	};
	210
	211	&pfc {
a1cd3c55	212	scif0_pins: scif0 {
b2abb296 SH	213	groups = "scif0_data_d";
b2abb296 SH	214	function = "scif0";
f138e54c	215	};
0877098d SS	216
0877098d SS	217	ether_pins: ether {
b2abb296 SH	218	groups = "eth_link", "eth_mdio", "eth_rmii";
b2abb296 SH	219	function = "eth";
0877098d SS	220	};
	221
	222	phy1_pins: phy1 {
b2abb296 SH	223	groups = "intc_irq0";
b2abb296 SH	224	function = "intc";
0877098d	225	};
b941a5cb	226
185555ff MV	227	pmic_irq_pins: pmicirq {
	228	groups = "intc_irq2";
	229	function = "intc";
	230	};
	231
b941a5cb	232	sdhi0_pins: sd0 {
b2abb296 SH	233	groups = "sdhi0_data4", "sdhi0_ctrl";
b2abb296 SH	234	function = "sdhi0";
b941a5cb SS	235	};
	236
	237	sdhi2_pins: sd2 {
b2abb296 SH	238	groups = "sdhi2_data4", "sdhi2_ctrl";
b2abb296 SH	239	function = "sdhi2";
b941a5cb	240	};
d6b94039	241
2d3e1701	242	qspi_pins: qspi {
b2abb296 SH	243	groups = "qspi_ctrl", "qspi_data4";
b2abb296 SH	244	function = "qspi";
2685a2ce SS	245	};
2685a2ce SS	246
d6b94039	247	i2c2_pins: i2c2 {
b2abb296 SH	248	groups = "i2c2";
b2abb296 SH	249	function = "i2c2";
d6b94039	250	};
778f2e7a	251
99f7445e	252	usb0_pins: usb0 {
b2abb296 SH	253	groups = "usb0";
b2abb296 SH	254	function = "usb0";
99f7445e SS	255	};
	256
	257	usb1_pins: usb1 {
b2abb296 SH	258	groups = "usb1";
b2abb296 SH	259	function = "usb1";
99f7445e SS	260	};
99f7445e SS	261
778f2e7a	262	vin0_pins: vin0 {
b2abb296 SH	263	groups = "vin0_data8", "vin0_clk";
b2abb296 SH	264	function = "vin0";
778f2e7a	265	};
0768fbad SS	266
0768fbad SS	267	can0_pins: can0 {
b2abb296 SH	268	groups = "can0_data";
b2abb296 SH	269	function = "can0";
0768fbad	270	};
c5af8a42 SS	271
c5af8a42 SS	272	du_pins: du {
b2abb296 SH	273	groups = "du_rgb888", "du_sync", "du_disp", "du_clk_out_0";
b2abb296 SH	274	function = "du";
c5af8a42	275	};
493b4da7 SS	276
493b4da7 SS	277	ssi_pins: sound {
b2abb296 SH	278	groups = "ssi0129_ctrl", "ssi0_data", "ssi1_data";
b2abb296 SH	279	function = "ssi";
493b4da7 SS	280	};
	281
	282	audio_clk_pins: audio_clk {
b2abb296 SH	283	groups = "audio_clk_a";
b2abb296 SH	284	function = "audio_clk";
493b4da7	285	};
f138e54c SS	286	};
	287
	288	&scif0 {
	289	pinctrl-0 = <&scif0_pins>;
	290	pinctrl-names = "default";
	291
	292	status = "okay";
	293	};
0877098d SS	294
	295	&ether {
	296	pinctrl-0 = <&ether_pins &phy1_pins>;
	297	pinctrl-names = "default";
	298
	299	phy-handle = <&phy1>;
	300	renesas,ether-link-active-low;
d8fc2305	301	status = "okay";
0877098d SS	302
	303	phy1: ethernet-phy@1 {
	304	reg = <1>;
	305	interrupt-parent = <&irqc0>;
	306	interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
	307	micrel,led-mode = <1>;
516f6894	308	reset-gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;
0877098d SS	309	};
0877098d SS	310	};
b941a5cb SS	311
	312	&sdhi0 {
	313	pinctrl-0 = <&sdhi0_pins>;
	314	pinctrl-names = "default";
	315
	316	vmmc-supply = <&vcc_sdhi0>;
	317	vqmmc-supply = <&vccq_sdhi0>;
	318	cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
	319	wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
	320	status = "okay";
	321	};
	322
	323	&sdhi2 {
	324	pinctrl-0 = <&sdhi2_pins>;
	325	pinctrl-names = "default";
	326
	327	vmmc-supply = <&vcc_sdhi2>;
	328	vqmmc-supply = <&vccq_sdhi2>;
	329	cd-gpios = <&gpio6 22 GPIO_ACTIVE_LOW>;
	330	status = "okay";
	331	};
efbb05c2	332
2685a2ce SS	333	&qspi {
	334	pinctrl-0 = <&qspi_pins>;
	335	pinctrl-names = "default";
	336
	337	status = "okay";
	338
	339	flash@0 {
2685a2ce SS	340	compatible = "spansion,s25fl512s", "jedec,spi-nor";
	341	reg = <0>;
	342	spi-max-frequency = <30000000>;
	343	spi-tx-bus-width = <4>;
	344	spi-rx-bus-width = <4>;
	345	m25p,fast-read;
	346
26fac0ee	347	partitions {
947ef628	348	compatible = "fixed-partitions";
26fac0ee GU	349	#address-cells = <1>;
	350	#size-cells = <1>;
	351
	352	partition@0 {
	353	label = "loader_prg";
	354	reg = <0x00000000 0x00040000>;
	355	read-only;
	356	};
	357	partition@40000 {
	358	label = "user_prg";
	359	reg = <0x00040000 0x00400000>;
	360	read-only;
	361	};
	362	partition@440000 {
	363	label = "flash_fs";
	364	reg = <0x00440000 0x03bc0000>;
	365	};
2685a2ce SS	366	};
	367	};
	368	};
	369
d6b94039 SS	370	&i2c2 {
d6b94039 SS	371	pinctrl-0 = <&i2c2_pins>;
12937bff	372	pinctrl-names = "i2c-hdmi";
d6b94039	373
d6b94039 SS	374	clock-frequency = <400000>;
	375	};
	376
5058a96c	377	&i2c6 {
185555ff MV	378	pinctrl-names = "default";
185555ff MV	379	pinctrl-0 = <&pmic_irq_pins>;
5058a96c MV	380	status = "okay";
	381	clock-frequency = <100000>;
	382
	383	pmic@5a {
	384	compatible = "dlg,da9063l";
	385	reg = <0x5a>;
	386	interrupt-parent = <&irqc0>;
	387	interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
	388	interrupt-controller;
	389
	390	wdt {
	391	compatible = "dlg,da9063-watchdog";
	392	};
	393	};
	394
	395	vdd_dvfs: regulator@68 {
	396	compatible = "dlg,da9210";
	397	reg = <0x68>;
	398	interrupt-parent = <&irqc0>;
	399	interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
	400
	401	regulator-min-microvolt = <1000000>;
	402	regulator-max-microvolt = <1000000>;
	403	regulator-boot-on;
	404	regulator-always-on;
	405	};
	406	};
	407
efbb05c2 SS	408	&sata0 {
	409	status = "okay";
	410	};
778f2e7a	411
5058a96c MV	412	&cpu0 {
	413	cpu0-supply = <&vdd_dvfs>;
	414	};
	415
778f2e7a SS	416	/* composite video input */
778f2e7a SS	417	&vin0 {
d8fc2305	418	status = "okay";
778f2e7a SS	419	pinctrl-0 = <&vin0_pins>;
	420	pinctrl-names = "default";
	421
	422	port {
778f2e7a SS	423	vin0ep: endpoint {
	424	remote-endpoint = <&adv7180>;
	425	bus-width = <8>;
	426	};
	427	};
	428	};
f9953c5e	429
99f7445e SS	430	&pci0 {
	431	pinctrl-0 = <&usb0_pins>;
	432	pinctrl-names = "default";
	433
	434	status = "okay";
	435	};
	436
	437	&pci1 {
	438	pinctrl-0 = <&usb1_pins>;
	439	pinctrl-names = "default";
	440
	441	status = "okay";
	442	};
	443
c794f6a0 SS	444	&hsusb {
	445	pinctrl-0 = <&usb0_pins>;
	446	pinctrl-names = "default";
	447
	448	status = "okay";
c794f6a0 SS	449	};
c794f6a0 SS	450
99f7445e SS	451	&usbphy {
	452	status = "okay";
	453	};
	454
f9953c5e	455	&pcie_bus_clk {
ac6908b3	456	clock-frequency = <100000000>;
f9953c5e SS	457	};
	458
	459	&pciec {
	460	status = "okay";
	461	};
0768fbad SS	462
	463	&can0 {
	464	pinctrl-0 = <&can0_pins>;
	465	pinctrl-names = "default";
	466
	467	status = "okay";
	468	};
c5af8a42 SS	469
	470	&du {
	471	pinctrl-0 = <&du_pins>;
	472	pinctrl-names = "default";
	473	status = "okay";
	474
e5c3f470	475	clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
c5af8a42	476	<&x3_clk>, <&x16_clk>;
e5c3f470	477	clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
c5af8a42 SS	478
c5af8a42 SS	479	ports {
d4b78db6	480	port@0 {
c5af8a42 SS	481	endpoint {
	482	remote-endpoint = <&adv7511_in>;
	483	};
	484	};
	485	};
	486	};
493b4da7	487
e5c3f470	488	&lvds0 {
e5c3f470 LP	489	ports {
	490	port@1 {
	491	lvds_connector: endpoint {
	492	};
	493	};
	494	};
	495	};
	496
493b4da7 SS	497	&rcar_sound {
	498	pinctrl-0 = <&ssi_pins &audio_clk_pins>;
	499	pinctrl-names = "default";
	500	status = "okay";
	501
	502	/* Single DAI */
	503	#sound-dai-cells = <0>;
	504
	505	rcar_sound,dai {
	506	dai0 {
	507	playback = <&ssi0>;
	508	capture = <&ssi1>;
	509	};
	510	};
	511	};
	512
389f6f8b GU	513	&rwdt {
	514	timeout-sec = <60>;
	515	status = "okay";
	516	};
	517
493b4da7 SS	518	&ssi1 {
	519	shared-pin;
	520	};