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98250e8e JS |
1 | /* |
2 | * (C) Copyright 2002 | |
3 | * Lineo, Inc. <www.lineo.com> | |
4 | * Bernhard Kuhn <bkuhn@lineo.com> | |
5 | * | |
6 | * (C) Copyright 2002 | |
7 | * Sysgo Real-Time Solutions, GmbH <www.elinos.com> | |
8 | * Marius Groeger <mgroeger@sysgo.de> | |
9 | * | |
10 | * (C) Copyright 2002 | |
11 | * Sysgo Real-Time Solutions, GmbH <www.elinos.com> | |
12 | * Alex Zuepke <azu@sysgo.de> | |
13 | * | |
14 | * See file CREDITS for list of people who contributed to this | |
15 | * project. | |
16 | * | |
17 | * This program is free software; you can redistribute it and/or | |
18 | * modify it under the terms of the GNU General Public License as | |
19 | * published by the Free Software Foundation; either version 2 of | |
20 | * the License, or (at your option) any later version. | |
21 | * | |
22 | * This program is distributed in the hope that it will be useful, | |
23 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
24 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
25 | * GNU General Public License for more details. | |
26 | * | |
27 | * You should have received a copy of the GNU General Public License | |
28 | * along with this program; if not, write to the Free Software | |
29 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
30 | * MA 02111-1307 USA | |
31 | */ | |
32 | ||
33 | #include <common.h> | |
34 | ||
80733994 | 35 | #include <asm/io.h> |
a429db7e | 36 | #include <asm/arch/hardware.h> |
98250e8e JS |
37 | #include <asm/arch/at91_tc.h> |
38 | #include <asm/arch/at91_pmc.h> | |
39 | ||
a429db7e AB |
40 | DECLARE_GLOBAL_DATA_PTR; |
41 | ||
98250e8e JS |
42 | /* the number of clocks per CONFIG_SYS_HZ */ |
43 | #define TIMER_LOAD_VAL (CONFIG_SYS_HZ_CLOCK/CONFIG_SYS_HZ) | |
44 | ||
98250e8e JS |
45 | int timer_init(void) |
46 | { | |
80733994 JS |
47 | at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC; |
48 | at91_pmc_t *pmc = (at91_pmc_t *) ATMEL_BASE_PMC; | |
98250e8e JS |
49 | |
50 | /* enables TC1.0 clock */ | |
80733994 | 51 | writel(1 << ATMEL_ID_TC0, &pmc->pcer); /* enable clock */ |
98250e8e JS |
52 | |
53 | writel(0, &tc->bcr); | |
54 | writel(AT91_TC_BMR_TC0XC0S_NONE | AT91_TC_BMR_TC1XC1S_NONE | | |
55 | AT91_TC_BMR_TC2XC2S_NONE , &tc->bmr); | |
56 | ||
57 | writel(AT91_TC_CCR_CLKDIS, &tc->tc[0].ccr); | |
58 | /* set to MCLK/2 and restart the timer | |
59 | when the value in TC_RC is reached */ | |
60 | writel(AT91_TC_CMR_TCCLKS_CLOCK1 | AT91_TC_CMR_CPCTRG, &tc->tc[0].cmr); | |
61 | ||
62 | writel(0xFFFFFFFF, &tc->tc[0].idr); /* disable interupts */ | |
63 | writel(TIMER_LOAD_VAL, &tc->tc[0].rc); | |
64 | ||
65 | writel(AT91_TC_CCR_SWTRG | AT91_TC_CCR_CLKEN, &tc->tc[0].ccr); | |
a429db7e AB |
66 | gd->lastinc = 0; |
67 | gd->tbl = 0; | |
98250e8e JS |
68 | |
69 | return 0; | |
70 | } | |
71 | ||
72 | /* | |
73 | * timer without interrupts | |
74 | */ | |
75 | ||
76 | void reset_timer(void) | |
77 | { | |
78 | reset_timer_masked(); | |
79 | } | |
80 | ||
81 | ulong get_timer(ulong base) | |
82 | { | |
83 | return get_timer_masked() - base; | |
84 | } | |
85 | ||
98250e8e JS |
86 | void __udelay(unsigned long usec) |
87 | { | |
88 | udelay_masked(usec); | |
89 | } | |
90 | ||
91 | void reset_timer_masked(void) | |
92 | { | |
93 | /* reset time */ | |
80733994 | 94 | at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC; |
a429db7e AB |
95 | gd->lastinc = readl(&tc->tc[0].cv) & 0x0000ffff; |
96 | gd->tbl = 0; | |
98250e8e JS |
97 | } |
98 | ||
99 | ulong get_timer_raw(void) | |
100 | { | |
80733994 | 101 | at91_tc_t *tc = (at91_tc_t *) ATMEL_BASE_TC; |
98250e8e JS |
102 | u32 now; |
103 | ||
104 | now = readl(&tc->tc[0].cv) & 0x0000ffff; | |
105 | ||
a429db7e | 106 | if (now >= gd->lastinc) { |
98250e8e | 107 | /* normal mode */ |
a429db7e | 108 | gd->tbl += now - gd->lastinc; |
98250e8e JS |
109 | } else { |
110 | /* we have an overflow ... */ | |
a429db7e | 111 | gd->tbl += now + TIMER_LOAD_VAL - gd->lastinc; |
98250e8e | 112 | } |
a429db7e | 113 | gd->lastinc = now; |
98250e8e | 114 | |
a429db7e | 115 | return gd->tbl; |
98250e8e JS |
116 | } |
117 | ||
118 | ulong get_timer_masked(void) | |
119 | { | |
120 | return get_timer_raw()/TIMER_LOAD_VAL; | |
121 | } | |
122 | ||
123 | void udelay_masked(unsigned long usec) | |
124 | { | |
125 | u32 tmo; | |
126 | u32 endtime; | |
127 | signed long diff; | |
128 | ||
129 | tmo = CONFIG_SYS_HZ_CLOCK / 1000; | |
130 | tmo *= usec; | |
131 | tmo /= 1000; | |
132 | ||
133 | endtime = get_timer_raw() + tmo; | |
134 | ||
135 | do { | |
136 | u32 now = get_timer_raw(); | |
137 | diff = endtime - now; | |
138 | } while (diff >= 0); | |
139 | } | |
140 | ||
141 | /* | |
142 | * This function is derived from PowerPC code (read timebase as long long). | |
143 | * On ARM it just returns the timer value. | |
144 | */ | |
145 | unsigned long long get_ticks(void) | |
146 | { | |
147 | return get_timer(0); | |
148 | } | |
149 | ||
150 | /* | |
151 | * This function is derived from PowerPC code (timebase clock frequency). | |
152 | * On ARM it returns the number of timer ticks per second. | |
153 | */ | |
154 | ulong get_tbclk(void) | |
155 | { | |
156 | return CONFIG_SYS_HZ; | |
157 | } |