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[thirdparty/u-boot.git] / arch / arm / cpu / arm920t / ks8695 / timer.c
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1/*
2 * (C) Copyright 2004-2005, Greg Ungerer <greg.ungerer@opengear.com>
3 *
1a459660 4 * SPDX-License-Identifier: GPL-2.0+
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5 */
6
7#include <common.h>
8#include <asm/arch/platform.h>
9
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10/*
11 * Initial timer set constants. Nothing complicated, just set for a 1ms
12 * tick.
13 */
14#define TIMER_INTERVAL (TICKS_PER_uSEC * mSEC_1)
15#define TIMER_COUNT (TIMER_INTERVAL / 2)
16#define TIMER_PULSE TIMER_COUNT
17
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18/*
19 * Handy KS8695 register access functions.
20 */
21#define ks8695_read(a) *((volatile ulong *) (KS8695_IO_BASE + (a)))
22#define ks8695_write(a,v) *((volatile ulong *) (KS8695_IO_BASE + (a))) = (v)
23
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24ulong timer_ticks;
25
b54384e3 26int timer_init (void)
3a574cbe 27{
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28 /* Set the hadware timer for 1ms */
29 ks8695_write(KS8695_TIMER1, TIMER_COUNT);
30 ks8695_write(KS8695_TIMER1_PCOUNT, TIMER_PULSE);
31 ks8695_write(KS8695_TIMER_CTRL, 0x2);
32 timer_ticks = 0;
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33
34 return 0;
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35}
36
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37ulong get_timer_masked(void)
38{
39 /* Check for timer wrap */
40 if (ks8695_read(KS8695_INT_STATUS) & KS8695_INTMASK_TIMERINT1) {
41 /* Clear interrupt condition */
42 ks8695_write(KS8695_INT_STATUS, KS8695_INTMASK_TIMERINT1);
43 timer_ticks++;
44 }
45 return timer_ticks;
46}
47
48ulong get_timer(ulong base)
49{
50 return (get_timer_masked() - base);
51}
52
3eb90bad 53void __udelay(ulong usec)
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54{
55 ulong start = get_timer_masked();
56 ulong end;
57
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58 /* Only 1ms resolution :-( */
59 end = usec / 1000;
60 while (get_timer(start) < end)
61 ;
62}
63
64void reset_cpu (ulong ignored)
65{
66 ulong tc;
67
68 /* Set timer0 to watchdog, and let it timeout */
69 tc = ks8695_read(KS8695_TIMER_CTRL) & 0x2;
70 ks8695_write(KS8695_TIMER_CTRL, tc);
71 ks8695_write(KS8695_TIMER0, ((10 << 8) | 0xff));
72 ks8695_write(KS8695_TIMER_CTRL, (tc | 0x1));
73
74 /* Should only wait here till watchdog resets */
75 for (;;)
76 ;
77}