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c74b2108 SK |
1 | /* |
2 | * Intel LXT971/LXT972 PHY Driver for TI DaVinci | |
3 | * (TMS320DM644x) based boards. | |
4 | * | |
5 | * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> | |
6 | * | |
7 | * -------------------------------------------------------- | |
8 | * | |
1a459660 | 9 | * SPDX-License-Identifier: GPL-2.0+ |
c74b2108 SK |
10 | */ |
11 | ||
12 | #include <common.h> | |
13 | #include <net.h> | |
fec61431 | 14 | #include <miiphy.h> |
c74b2108 SK |
15 | #include <lxt971a.h> |
16 | #include <asm/arch/emac_defs.h> | |
7c587d32 | 17 | #include "../../../../../drivers/net/davinci_emac.h" |
c74b2108 SK |
18 | |
19 | #ifdef CONFIG_DRIVER_TI_EMAC | |
20 | ||
21 | #ifdef CONFIG_CMD_NET | |
22 | ||
23 | int lxt972_is_phy_connected(int phy_addr) | |
24 | { | |
63676841 | 25 | u_int16_t id1, id2; |
c74b2108 | 26 | |
8ef583a0 | 27 | if (!davinci_eth_phy_read(phy_addr, MII_PHYSID1, &id1)) |
c74b2108 | 28 | return(0); |
8ef583a0 | 29 | if (!davinci_eth_phy_read(phy_addr, MII_PHYSID2, &id2)) |
c74b2108 SK |
30 | return(0); |
31 | ||
32 | if ((id1 == (0x0013)) && ((id2 & 0xfff0) == 0x78e0)) | |
33 | return(1); | |
34 | ||
35 | return(0); | |
36 | } | |
37 | ||
38 | int lxt972_get_link_speed(int phy_addr) | |
39 | { | |
63676841 HV |
40 | u_int16_t stat1, tmp; |
41 | volatile emac_regs *emac = (emac_regs *)EMAC_BASE_ADDR; | |
c74b2108 | 42 | |
fcaac589 | 43 | if (!davinci_eth_phy_read(phy_addr, PHY_LXT971_STAT2, &stat1)) |
c74b2108 SK |
44 | return(0); |
45 | ||
46 | if (!(stat1 & PHY_LXT971_STAT2_LINK)) /* link up? */ | |
47 | return(0); | |
48 | ||
fcaac589 | 49 | if (!davinci_eth_phy_read(phy_addr, PHY_LXT971_DIG_CFG, &tmp)) |
c74b2108 SK |
50 | return(0); |
51 | ||
52 | tmp |= PHY_LXT971_DIG_CFG_MII_DRIVE; | |
53 | ||
fcaac589 | 54 | davinci_eth_phy_write(phy_addr, PHY_LXT971_DIG_CFG, tmp); |
c74b2108 | 55 | /* Read back */ |
fcaac589 | 56 | if (!davinci_eth_phy_read(phy_addr, PHY_LXT971_DIG_CFG, &tmp)) |
c74b2108 SK |
57 | return(0); |
58 | ||
c74b2108 | 59 | /* Speed doesn't matter, there is no setting for it in EMAC... */ |
63676841 HV |
60 | if (stat1 & PHY_LXT971_STAT2_DUPLEX_MODE) { |
61 | /* set DM644x EMAC for Full Duplex */ | |
62 | emac->MACCONTROL = EMAC_MACCONTROL_MIIEN_ENABLE | | |
63 | EMAC_MACCONTROL_FULLDUPLEX_ENABLE; | |
c74b2108 | 64 | } else { |
63676841 HV |
65 | /*set DM644x EMAC for Half Duplex */ |
66 | emac->MACCONTROL = EMAC_MACCONTROL_MIIEN_ENABLE; | |
c74b2108 SK |
67 | } |
68 | ||
63676841 | 69 | return(1); |
c74b2108 SK |
70 | } |
71 | ||
72 | ||
73 | int lxt972_init_phy(int phy_addr) | |
74 | { | |
63676841 | 75 | int ret = 1; |
c74b2108 SK |
76 | |
77 | if (!lxt972_get_link_speed(phy_addr)) { | |
78 | /* Try another time */ | |
79 | ret = lxt972_get_link_speed(phy_addr); | |
80 | } | |
81 | ||
82 | /* Disable PHY Interrupts */ | |
fcaac589 | 83 | davinci_eth_phy_write(phy_addr, PHY_LXT971_INT_ENABLE, 0); |
c74b2108 SK |
84 | |
85 | return(ret); | |
86 | } | |
87 | ||
88 | ||
89 | int lxt972_auto_negotiate(int phy_addr) | |
90 | { | |
63676841 | 91 | u_int16_t tmp; |
c74b2108 | 92 | |
8ef583a0 | 93 | if (!davinci_eth_phy_read(phy_addr, MII_BMCR, &tmp)) |
c74b2108 SK |
94 | return(0); |
95 | ||
96 | /* Restart Auto_negotiation */ | |
8ef583a0 MF |
97 | tmp |= BMCR_ANRESTART; |
98 | davinci_eth_phy_write(phy_addr, MII_BMCR, tmp); | |
c74b2108 SK |
99 | |
100 | /*check AutoNegotiate complete */ | |
101 | udelay (10000); | |
8ef583a0 | 102 | if (!davinci_eth_phy_read(phy_addr, MII_BMSR, &tmp)) |
c74b2108 SK |
103 | return(0); |
104 | ||
8ef583a0 | 105 | if (!(tmp & BMSR_ANEGCOMPLETE)) |
c74b2108 SK |
106 | return(0); |
107 | ||
108 | return (lxt972_get_link_speed(phy_addr)); | |
109 | } | |
110 | ||
111 | #endif /* CONFIG_CMD_NET */ | |
112 | ||
113 | #endif /* CONFIG_DRIVER_ETHER */ |