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arch:exynos: boot mode: add get_boot_mode(), code cleanup
[people/ms/u-boot.git] / arch / arm / cpu / armv7 / exynos / spl_boot.c
CommitLineData
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1/*
2 * Copyright (C) 2012 Samsung Electronics
3 *
1a459660 4 * SPDX-License-Identifier: GPL-2.0+
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5 */
6
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7#include <common.h>
8#include <config.h>
81e35203 9
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10#include <asm/arch/clock.h>
11#include <asm/arch/clk.h>
643be9c0 12#include <asm/arch/dmc.h>
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13#include <asm/arch/periph.h>
14#include <asm/arch/pinmux.h>
643be9c0 15#include <asm/arch/power.h>
493c073f 16#include <asm/arch/spl.h>
347e45d7 17#include <asm/arch/spi.h>
c748be0d 18
643be9c0 19#include "common_setup.h"
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20#include "clock_init.h"
21
643be9c0 22DECLARE_GLOBAL_DATA_PTR;
643be9c0 23
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24/* Index into irom ptr table */
25enum index {
26 MMC_INDEX,
27 EMMC44_INDEX,
28 EMMC44_END_INDEX,
29 SPI_INDEX,
30 USB_INDEX,
31};
32
33/* IROM Function Pointers Table */
34u32 irom_ptr_table[] = {
35 [MMC_INDEX] = 0x02020030, /* iROM Function Pointer-SDMMC boot */
36 [EMMC44_INDEX] = 0x02020044, /* iROM Function Pointer-EMMC4.4 boot*/
37 [EMMC44_END_INDEX] = 0x02020048,/* iROM Function Pointer
38 -EMMC4.4 end boot operation */
39 [SPI_INDEX] = 0x02020058, /* iROM Function Pointer-SPI boot */
40 [USB_INDEX] = 0x02020070, /* iROM Function Pointer-USB boot*/
41 };
42
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43void *get_irom_func(int index)
44{
45 return (void *)*(u32 *)irom_ptr_table[index];
46}
70656c79 47
643be9c0 48#ifdef CONFIG_USB_BOOTING
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49/*
50 * Set/clear program flow prediction and return the previous state.
51 */
52static int config_branch_prediction(int set_cr_z)
53{
54 unsigned int cr;
55
56 /* System Control Register: 11th bit Z Branch prediction enable */
57 cr = get_cr();
58 set_cr(set_cr_z ? cr | CR_Z : cr & ~CR_Z);
59
60 return cr & CR_Z;
61}
643be9c0 62#endif
7a533773 63
d8fa31a7 64#ifdef CONFIG_SPI_BOOTING
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65static void spi_rx_tx(struct exynos_spi *regs, int todo,
66 void *dinp, void const *doutp, int i)
67{
68 uint *rxp = (uint *)(dinp + (i * (32 * 1024)));
69 int rx_lvl, tx_lvl;
70 uint out_bytes, in_bytes;
71
72 out_bytes = todo;
73 in_bytes = todo;
74 setbits_le32(&regs->ch_cfg, SPI_CH_RST);
75 clrbits_le32(&regs->ch_cfg, SPI_CH_RST);
76 writel(((todo * 8) / 32) | SPI_PACKET_CNT_EN, &regs->pkt_cnt);
77
78 while (in_bytes) {
79 uint32_t spi_sts;
80 int temp;
81
82 spi_sts = readl(&regs->spi_sts);
83 rx_lvl = ((spi_sts >> 15) & 0x7f);
84 tx_lvl = ((spi_sts >> 6) & 0x7f);
85 while (tx_lvl < 32 && out_bytes) {
86 temp = 0xffffffff;
87 writel(temp, &regs->tx_data);
88 out_bytes -= 4;
89 tx_lvl += 4;
90 }
91 while (rx_lvl >= 4 && in_bytes) {
92 temp = readl(&regs->rx_data);
93 if (rxp)
94 *rxp++ = temp;
95 in_bytes -= 4;
96 rx_lvl -= 4;
97 }
98 }
99}
100
101/*
102 * Copy uboot from spi flash to RAM
103 *
104 * @parma uboot_size size of u-boot to copy
105 * @param uboot_addr address in u-boot to copy
106 */
107static void exynos_spi_copy(unsigned int uboot_size, unsigned int uboot_addr)
108{
109 int upto, todo;
110 int i, timeout = 100;
111 struct exynos_spi *regs = (struct exynos_spi *)CONFIG_ENV_SPI_BASE;
112
113 set_spi_clk(PERIPH_ID_SPI1, 50000000); /* set spi clock to 50Mhz */
114 /* set the spi1 GPIO */
115 exynos_pinmux_config(PERIPH_ID_SPI1, PINMUX_FLAG_NONE);
116
117 /* set pktcnt and enable it */
118 writel(4 | SPI_PACKET_CNT_EN, &regs->pkt_cnt);
119 /* set FB_CLK_SEL */
120 writel(SPI_FB_DELAY_180, &regs->fb_clk);
121 /* set CH_WIDTH and BUS_WIDTH as word */
122 setbits_le32(&regs->mode_cfg, SPI_MODE_CH_WIDTH_WORD |
123 SPI_MODE_BUS_WIDTH_WORD);
124 clrbits_le32(&regs->ch_cfg, SPI_CH_CPOL_L); /* CPOL: active high */
125
126 /* clear rx and tx channel if set priveously */
127 clrbits_le32(&regs->ch_cfg, SPI_RX_CH_ON | SPI_TX_CH_ON);
128
129 setbits_le32(&regs->swap_cfg, SPI_RX_SWAP_EN |
130 SPI_RX_BYTE_SWAP |
131 SPI_RX_HWORD_SWAP);
132
133 /* do a soft reset */
134 setbits_le32(&regs->ch_cfg, SPI_CH_RST);
135 clrbits_le32(&regs->ch_cfg, SPI_CH_RST);
136
137 /* now set rx and tx channel ON */
138 setbits_le32(&regs->ch_cfg, SPI_RX_CH_ON | SPI_TX_CH_ON | SPI_CH_HS_EN);
139 clrbits_le32(&regs->cs_reg, SPI_SLAVE_SIG_INACT); /* CS low */
140
141 /* Send read instruction (0x3h) followed by a 24 bit addr */
142 writel((SF_READ_DATA_CMD << 24) | SPI_FLASH_UBOOT_POS, &regs->tx_data);
143
144 /* waiting for TX done */
145 while (!(readl(&regs->spi_sts) & SPI_ST_TX_DONE)) {
146 if (!timeout) {
147 debug("SPI TIMEOUT\n");
148 break;
149 }
150 timeout--;
151 }
152
153 for (upto = 0, i = 0; upto < uboot_size; upto += todo, i++) {
154 todo = min(uboot_size - upto, (1 << 15));
155 spi_rx_tx(regs, todo, (void *)(uboot_addr),
156 (void *)(SPI_FLASH_UBOOT_POS), i);
157 }
158
159 setbits_le32(&regs->cs_reg, SPI_SLAVE_SIG_INACT);/* make the CS high */
160
161 /*
162 * Let put controller mode to BYTE as
163 * SPI driver does not support WORD mode yet
164 */
165 clrbits_le32(&regs->mode_cfg, SPI_MODE_CH_WIDTH_WORD |
166 SPI_MODE_BUS_WIDTH_WORD);
167 writel(0, &regs->swap_cfg);
168
169 /*
170 * Flush spi tx, rx fifos and reset the SPI controller
171 * and clear rx/tx channel
172 */
173 clrsetbits_le32(&regs->ch_cfg, SPI_CH_HS_EN, SPI_CH_RST);
174 clrbits_le32(&regs->ch_cfg, SPI_CH_RST);
175 clrbits_le32(&regs->ch_cfg, SPI_TX_CH_ON | SPI_RX_CH_ON);
176}
d8fa31a7 177#endif
347e45d7 178
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179/*
180* Copy U-boot from mmc to RAM:
181* COPY_BL2_FNPTR_ADDR: Address in iRAM, which Contains
182* Pointer to API (Data transfer from mmc to ram)
183*/
184void copy_uboot_to_ram(void)
185{
4fb4d55a 186 unsigned int bootmode = BOOT_MODE_OM;
c748be0d 187
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188 u32 (*copy_bl2)(u32 offset, u32 nblock, u32 dst) = NULL;
189 u32 offset = 0, size = 0;
d8fa31a7 190#ifdef CONFIG_SPI_BOOTING
347e45d7 191 struct spl_machine_param *param = spl_get_machine_params();
d8fa31a7 192#endif
643be9c0 193#ifdef CONFIG_SUPPORT_EMMC_BOOT
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194 u32 (*copy_bl2_from_emmc)(u32 nblock, u32 dst);
195 void (*end_bootop_from_emmc)(void);
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196#endif
197#ifdef CONFIG_USB_BOOTING
c748be0d 198 u32 (*usb_copy)(void);
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199 int is_cr_z_set;
200 unsigned int sec_boot_check;
7a533773 201
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202 /* Read iRAM location to check for secondary USB boot mode */
203 sec_boot_check = readl(EXYNOS_IRAM_SECONDARY_BASE);
204 if (sec_boot_check == EXYNOS_USB_SECONDARY_BOOT)
205 bootmode = BOOT_MODE_USB;
643be9c0 206#endif
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207
208 if (bootmode == BOOT_MODE_OM)
4fb4d55a 209 bootmode = get_boot_mode();
81e35203 210
7a533773 211 switch (bootmode) {
643be9c0 212#ifdef CONFIG_SPI_BOOTING
7a533773 213 case BOOT_MODE_SERIAL:
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214 /* Customised function to copy u-boot from SF */
215 exynos_spi_copy(param->uboot_size, CONFIG_SYS_TEXT_BASE);
7a533773 216 break;
643be9c0 217#endif
4fb4d55a 218 case BOOT_MODE_SD:
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219 offset = BL2_START_OFFSET;
220 size = BL2_SIZE_BLOC_COUNT;
c748be0d 221 copy_bl2 = get_irom_func(MMC_INDEX);
c748be0d 222 break;
643be9c0 223#ifdef CONFIG_SUPPORT_EMMC_BOOT
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224 case BOOT_MODE_EMMC:
225 /* Set the FSYS1 clock divisor value for EMMC boot */
226 emmc_boot_clk_div_set();
227
228 copy_bl2_from_emmc = get_irom_func(EMMC44_INDEX);
229 end_bootop_from_emmc = get_irom_func(EMMC44_END_INDEX);
230
231 copy_bl2_from_emmc(BL2_SIZE_BLOC_COUNT, CONFIG_SYS_TEXT_BASE);
232 end_bootop_from_emmc();
7a533773 233 break;
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234#endif
235#ifdef CONFIG_USB_BOOTING
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236 case BOOT_MODE_USB:
237 /*
238 * iROM needs program flow prediction to be disabled
239 * before copy from USB device to RAM
240 */
241 is_cr_z_set = config_branch_prediction(0);
c748be0d 242 usb_copy = get_irom_func(USB_INDEX);
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243 usb_copy();
244 config_branch_prediction(is_cr_z_set);
245 break;
643be9c0 246#endif
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247 default:
248 break;
249 }
643be9c0
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250
251 if (copy_bl2)
252 copy_bl2(offset, size, CONFIG_SYS_TEXT_BASE);
253}
254
255void memzero(void *s, size_t n)
256{
257 char *ptr = s;
258 size_t i;
259
260 for (i = 0; i < n; i++)
261 *ptr++ = '\0';
262}
263
264/**
265 * Set up the U-Boot global_data pointer
266 *
267 * This sets the address of the global data, and sets up basic values.
268 *
269 * @param gdp Value to give to gd
270 */
271static void setup_global_data(gd_t *gdp)
272{
273 gd = gdp;
274 memzero((void *)gd, sizeof(gd_t));
275 gd->flags |= GD_FLG_RELOC;
276 gd->baudrate = CONFIG_BAUDRATE;
277 gd->have_console = 1;
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278}
279
280void board_init_f(unsigned long bootflag)
281{
643be9c0 282 __aligned(8) gd_t local_gd;
81e35203 283 __attribute__((noreturn)) void (*uboot)(void);
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284
285 setup_global_data(&local_gd);
286
287 if (do_lowlevel_init())
288 power_exit_wakeup();
289
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290 copy_uboot_to_ram();
291
292 /* Jump to U-Boot image */
293 uboot = (void *)CONFIG_SYS_TEXT_BASE;
294 (*uboot)();
295 /* Never returns Here */
296}
297
298/* Place Holders */
299void board_init_r(gd_t *id, ulong dest_addr)
300{
301 /* Function attribute is no-return */
302 /* This Function never executes */
303 while (1)
304 ;
305}
81e35203 306void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3) {}