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23608e23 JL |
1 | /* |
2 | * (C) Copyright 2007 | |
3 | * Sascha Hauer, Pengutronix | |
4 | * | |
5 | * (C) Copyright 2009 Freescale Semiconductor, Inc. | |
6 | * | |
7 | * See file CREDITS for list of people who contributed to this | |
8 | * project. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or | |
11 | * modify it under the terms of the GNU General Public License as | |
12 | * published by the Free Software Foundation; either version 2 of | |
13 | * the License, or (at your option) any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
23 | * MA 02111-1307 USA | |
24 | */ | |
25 | ||
26 | #include <common.h> | |
27 | #include <asm/errno.h> | |
28 | #include <asm/io.h> | |
29 | #include <asm/arch/imx-regs.h> | |
30 | #include <asm/arch/clock.h> | |
31 | #include <asm/arch/sys_proto.h> | |
32 | ||
33 | u32 get_cpu_rev(void) | |
34 | { | |
35 | int system_rev = 0x61000 | CHIP_REV_1_0; | |
36 | ||
37 | return system_rev; | |
38 | } | |
39 | ||
40 | #ifdef CONFIG_ARCH_CPU_INIT | |
41 | void init_aips(void) | |
42 | { | |
f2f77458 JL |
43 | struct aipstz_regs *aips1, *aips2; |
44 | ||
45 | aips1 = (struct aipstz_regs *)AIPS1_BASE_ADDR; | |
46 | aips2 = (struct aipstz_regs *)AIPS2_BASE_ADDR; | |
23608e23 JL |
47 | |
48 | /* | |
49 | * Set all MPROTx to be non-bufferable, trusted for R/W, | |
50 | * not forced to user-mode. | |
51 | */ | |
f2f77458 JL |
52 | writel(0x77777777, &aips1->mprot0); |
53 | writel(0x77777777, &aips1->mprot1); | |
54 | writel(0x77777777, &aips2->mprot0); | |
55 | writel(0x77777777, &aips2->mprot1); | |
23608e23 | 56 | |
f2f77458 JL |
57 | /* |
58 | * Set all OPACRx to be non-bufferable, not require | |
59 | * supervisor privilege level for access,allow for | |
60 | * write access and untrusted master access. | |
61 | */ | |
62 | writel(0x00000000, &aips1->opacr0); | |
63 | writel(0x00000000, &aips1->opacr1); | |
64 | writel(0x00000000, &aips1->opacr2); | |
65 | writel(0x00000000, &aips1->opacr3); | |
66 | writel(0x00000000, &aips1->opacr4); | |
67 | writel(0x00000000, &aips2->opacr0); | |
68 | writel(0x00000000, &aips2->opacr1); | |
69 | writel(0x00000000, &aips2->opacr2); | |
70 | writel(0x00000000, &aips2->opacr3); | |
71 | writel(0x00000000, &aips2->opacr4); | |
23608e23 JL |
72 | } |
73 | ||
74 | int arch_cpu_init(void) | |
75 | { | |
76 | init_aips(); | |
77 | ||
78 | return 0; | |
79 | } | |
80 | #endif | |
81 | ||
82 | #if defined(CONFIG_FEC_MXC) | |
be252b65 | 83 | void imx_get_mac_from_fuse(int dev_id, unsigned char *mac) |
23608e23 JL |
84 | { |
85 | struct iim_regs *iim = (struct iim_regs *)IMX_IIM_BASE; | |
86 | struct fuse_bank *bank = &iim->bank[4]; | |
87 | struct fuse_bank4_regs *fuse = | |
88 | (struct fuse_bank4_regs *)bank->fuse_regs; | |
89 | ||
bd2e27c0 JL |
90 | u32 value = readl(&fuse->mac_addr_high); |
91 | mac[0] = (value >> 8); | |
92 | mac[1] = value ; | |
23608e23 | 93 | |
bd2e27c0 JL |
94 | value = readl(&fuse->mac_addr_low); |
95 | mac[2] = value >> 24 ; | |
96 | mac[3] = value >> 16 ; | |
97 | mac[4] = value >> 8 ; | |
98 | mac[5] = value ; | |
23608e23 JL |
99 | |
100 | } | |
101 | #endif |