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ARM: OMAP: Fix handling of errata i727
[people/ms/u-boot.git] / arch / arm / cpu / armv7 / omap-common / hwinit-common.c
CommitLineData
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1/*
2 *
508a58fa 3 * Common functions for OMAP4/5 based boards
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4 *
5 * (C) Copyright 2010
6 * Texas Instruments, <www.ti.com>
7 *
8 * Author :
9 * Aneesh V <aneesh@ti.com>
10 * Steve Sakoman <steve@sakoman.com>
11 *
1a459660 12 * SPDX-License-Identifier: GPL-2.0+
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13 */
14#include <common.h>
47f7bcae 15#include <spl.h>
d34efc76 16#include <asm/arch/sys_proto.h>
1ace4022 17#include <linux/sizes.h>
bb772a59 18#include <asm/emif.h>
01b753ff 19#include <asm/omap_common.h>
d4d986ee 20#include <linux/compiler.h>
de63ac27
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21#include <asm/system.h>
22
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23DECLARE_GLOBAL_DATA_PTR;
24
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25void do_set_mux(u32 base, struct pad_conf_entry const *array, int size)
26{
27 int i;
28 struct pad_conf_entry *pad = (struct pad_conf_entry *) array;
29
30 for (i = 0; i < size; i++, pad++)
31 writew(pad->val, base + pad->offset);
32}
33
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34static void set_mux_conf_regs(void)
35{
508a58fa 36 switch (omap_hw_init_context()) {
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37 case OMAP_INIT_CONTEXT_SPL:
38 set_muxconf_regs_essential();
39 break;
40 case OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL:
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41 break;
42 case OMAP_INIT_CONTEXT_UBOOT_FROM_NOR:
43 case OMAP_INIT_CONTEXT_UBOOT_AFTER_CH:
44 set_muxconf_regs_essential();
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45 break;
46 }
47}
48
508a58fa 49u32 cortex_rev(void)
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50{
51
52 unsigned int rev;
53
54 /* Read Main ID Register (MIDR) */
55 asm ("mrc p15, 0, %0, c0, c0, 0" : "=r" (rev));
56
57 return rev;
58}
59
0ac6db26 60static void omap_rev_string(void)
ad577c8a 61{
508a58fa 62 u32 omap_rev = omap_revision();
de62688b 63 u32 soc_variant = (omap_rev & 0xF0000000) >> 28;
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64 u32 omap_variant = (omap_rev & 0xFFFF0000) >> 16;
65 u32 major_rev = (omap_rev & 0x00000F00) >> 8;
66 u32 minor_rev = (omap_rev & 0x000000F0) >> 4;
ad577c8a 67
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68 if (soc_variant)
69 printf("OMAP");
70 else
71 printf("DRA");
72 printf("%x ES%x.%x\n", omap_variant, major_rev,
73 minor_rev);
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74}
75
78f455c0 76#ifdef CONFIG_SPL_BUILD
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77void spl_display_print(void)
78{
79 omap_rev_string();
80}
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81#endif
82
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83void __weak srcomp_enable(void)
84{
85}
86
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87#ifdef CONFIG_ARCH_CPU_INIT
88/*
89 * SOC specific cpu init
90 */
91int arch_cpu_init(void)
92{
93 save_omap_boot_params();
94 return 0;
95}
96#endif /* CONFIG_ARCH_CPU_INIT */
97
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98/*
99 * Routine: s_init
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100 * Description: Does early system init of watchdog, muxing, andclocks
101 * Watchdog disable is done always. For the rest what gets done
102 * depends on the boot mode in which this function is executed
103 * 1. s_init of SPL running from SRAM
104 * 2. s_init of U-Boot running from FLASH
105 * 3. s_init of U-Boot loaded to SDRAM by SPL
106 * 4. s_init of U-Boot loaded to SDRAM by ROM code using the
107 * Configuration Header feature
108 * Please have a look at the respective functions to see what gets
109 * done in each of these cases
110 * This function is called with SRAM stack.
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111 */
112void s_init(void)
113{
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114 /*
115 * Save the boot parameters passed from romcode.
116 * We cannot delay the saving further than this,
117 * to prevent overwrites.
118 */
119#ifdef CONFIG_SPL_BUILD
120 save_omap_boot_params();
121#endif
508a58fa 122 init_omap_revision();
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123 hw_data_init();
124
38f25b12 125#ifdef CONFIG_SPL_BUILD
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126 if (warm_reset() &&
127 (is_omap44xx() || (omap_revision() == OMAP5430_ES1_0)))
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128 force_emif_self_refresh();
129#endif
d34efc76 130 watchdog_init();
469ec1e3 131 set_mux_conf_regs();
bcae7211 132#ifdef CONFIG_SPL_BUILD
d4d986ee 133 srcomp_enable();
63ffcfcb 134 setup_clocks_for_console();
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135
136 gd = &gdata;
137
bcae7211 138 preloader_console_init();
4ecfcfaa 139 do_io_settings();
bcae7211 140#endif
3776801d 141 prcm_init();
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142#ifdef CONFIG_SPL_BUILD
143 /* For regular u-boot sdram_init() is called from dram_init() */
144 sdram_init();
145#endif
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146}
147
148/*
149 * Routine: wait_for_command_complete
150 * Description: Wait for posting to finish on watchdog
151 */
152void wait_for_command_complete(struct watchdog *wd_base)
153{
154 int pending = 1;
155 do {
156 pending = readl(&wd_base->wwps);
157 } while (pending);
158}
159
160/*
161 * Routine: watchdog_init
162 * Description: Shut down watch dogs
163 */
164void watchdog_init(void)
165{
166 struct watchdog *wd2_base = (struct watchdog *)WDT2_BASE;
167
168 writel(WD_UNLOCK1, &wd2_base->wspr);
169 wait_for_command_complete(wd2_base);
170 writel(WD_UNLOCK2, &wd2_base->wspr);
171}
172
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173
174/*
175 * This function finds the SDRAM size available in the system
176 * based on DMM section configurations
177 * This is needed because the size of memory installed may be
178 * different on different versions of the board
179 */
508a58fa 180u32 omap_sdram_size(void)
7ca3f9c5 181{
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182 u32 section, i, valid;
183 u64 sdram_start = 0, sdram_end = 0, addr,
d7630da6 184 size, total_size = 0, trap_size = 0, trap_start = 0;
bb772a59 185
7ca3f9c5 186 for (i = 0; i < 4; i++) {
bb772a59 187 section = __raw_readl(DMM_BASE + i*4);
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188 valid = (section & EMIF_SDRC_ADDRSPC_MASK) >>
189 (EMIF_SDRC_ADDRSPC_SHIFT);
bb772a59 190 addr = section & EMIF_SYS_ADDR_MASK;
e06e914d 191
7ca3f9c5 192 /* See if the address is valid */
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193 if ((addr >= TI_ARMV7_DRAM_ADDR_SPACE_START) &&
194 (addr < TI_ARMV7_DRAM_ADDR_SPACE_END)) {
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195 size = ((section & EMIF_SYS_SIZE_MASK) >>
196 EMIF_SYS_SIZE_SHIFT);
197 size = 1 << size;
198 size *= SZ_16M;
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199
200 if (valid != DMM_SDRC_ADDR_SPC_INVALID) {
201 if (!sdram_start || (addr < sdram_start))
202 sdram_start = addr;
203 if (!sdram_end || ((addr + size) > sdram_end))
204 sdram_end = addr + size;
205 } else {
206 trap_size = size;
d7630da6 207 trap_start = addr;
e06e914d 208 }
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209 }
210 }
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211
212 if ((trap_start >= sdram_start) && (trap_start < sdram_end))
213 total_size = (sdram_end - sdram_start) - (trap_size);
214 else
215 total_size = sdram_end - sdram_start;
bb772a59 216
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217 return total_size;
218}
219
220
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221/*
222 * Routine: dram_init
223 * Description: sets uboots idea of sdram size
224 */
225int dram_init(void)
226{
2ae610f0 227 sdram_init();
508a58fa 228 gd->ram_size = omap_sdram_size();
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229 return 0;
230}
231
232/*
233 * Print board information
234 */
235int checkboard(void)
236{
237 puts(sysinfo.board_string);
238 return 0;
239}
240
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241/*
242 * get_device_type(): tell if GP/HS/EMU/TST
243 */
244u32 get_device_type(void)
8b457fa8 245{
c43c8339 246 return (readl((*ctrl)->control_status) &
c1fa3c37 247 (DEVICE_TYPE_MASK)) >> DEVICE_TYPE_SHIFT;
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248}
249
365475e6 250#if defined(CONFIG_DISPLAY_CPUINFO)
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251/*
252 * Print CPU information
253 */
254int print_cpuinfo(void)
8b457fa8 255{
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256 puts("CPU : ");
257 omap_rev_string();
13d4f9bd 258
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259 return 0;
260}
365475e6 261#endif