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6860b4a1 JZ |
1 | /* |
2 | * Copyright (c) 2011 The Chromium OS Authors. | |
3 | * (C) Copyright 2010,2011 NVIDIA Corporation <www.nvidia.com> | |
4 | * | |
5 | * See file CREDITS for list of people who contributed to this | |
6 | * project. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation; either version 2 of | |
11 | * the License, or (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | * MA 02111-1307 USA | |
22 | */ | |
23 | ||
24 | #include <common.h> | |
25 | #include <tps6586x.h> | |
26 | #include <asm/io.h> | |
27 | #include <asm/arch/ap20.h> | |
00a2749d | 28 | #include <asm/arch/tegra20.h> |
6860b4a1 JZ |
29 | #include <asm/arch/tegra_i2c.h> |
30 | #include <asm/arch/sys_proto.h> | |
31 | ||
32 | #define VDD_CORE_NOMINAL_T25 0x17 /* 1.3v */ | |
33 | #define VDD_CPU_NOMINAL_T25 0x10 /* 1.125v */ | |
34 | ||
35 | #define VDD_CORE_NOMINAL_T20 0x16 /* 1.275v */ | |
36 | #define VDD_CPU_NOMINAL_T20 0x0f /* 1.1v */ | |
37 | ||
38 | #define VDD_RELATION 0x02 /* 50mv */ | |
39 | #define VDD_TRANSITION_STEP 0x06 /* 150mv */ | |
40 | #define VDD_TRANSITION_RATE 0x06 /* 3.52mv/us */ | |
41 | ||
42 | int pmu_set_nominal(void) | |
43 | { | |
44 | int core, cpu, bus; | |
45 | ||
46 | /* by default, the table has been filled with T25 settings */ | |
47 | switch (tegra_get_chip_type()) { | |
48 | case TEGRA_SOC_T20: | |
49 | core = VDD_CORE_NOMINAL_T20; | |
50 | cpu = VDD_CPU_NOMINAL_T20; | |
51 | break; | |
52 | case TEGRA_SOC_T25: | |
53 | core = VDD_CORE_NOMINAL_T25; | |
54 | cpu = VDD_CPU_NOMINAL_T25; | |
55 | break; | |
56 | default: | |
57 | debug("%s: Unknown chip type\n", __func__); | |
58 | return -1; | |
59 | } | |
60 | ||
61 | bus = tegra_i2c_get_dvc_bus_num(); | |
62 | if (bus == -1) { | |
63 | debug("%s: Cannot find DVC I2C bus\n", __func__); | |
64 | return -1; | |
65 | } | |
66 | tps6586x_init(bus); | |
67 | tps6586x_set_pwm_mode(TPS6586X_PWM_SM1); | |
68 | return tps6586x_adjust_sm0_sm1(core, cpu, VDD_TRANSITION_STEP, | |
69 | VDD_TRANSITION_RATE, VDD_RELATION); | |
70 | } |