[people/ms/u-boot.git] / arch / arm / cpu / armv7 / zynq / ddrc.c

/*
 * Copyright (C) 2012 - 2013 Michal Simek <monstr@monstr.eu>
 * Copyright (C) 2012 - 2013 Xilinx, Inc. All rights reserved.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#include <common.h>
#include <asm/io.h>
#include <asm/arch/sys_proto.h>
#include <asm/arch/hardware.h>

DECLARE_GLOBAL_DATA_PTR;

/* Control regsiter bitfield definitions */
#define ZYNQ_DDRC_CTRLREG_BUSWIDTH_MASK		0xC
#define ZYNQ_DDRC_CTRLREG_BUSWIDTH_SHIFT	2
#define ZYNQ_DDRC_CTRLREG_BUSWIDTH_16BIT	1

/* ECC scrub regsiter definitions */
#define ZYNQ_DDRC_ECC_SCRUBREG_ECC_MODE_MASK	0x7
#define ZYNQ_DDRC_ECC_SCRUBREG_ECCMODE_SECDED	0x4

void zynq_ddrc_init(void)
{
	u32 width, ecctype;

	width = readl(&ddrc_base->ddrc_ctrl);
	width = (width & ZYNQ_DDRC_CTRLREG_BUSWIDTH_MASK) >>
					ZYNQ_DDRC_CTRLREG_BUSWIDTH_SHIFT;
	ecctype = (readl(&ddrc_base->ecc_scrub) &
		ZYNQ_DDRC_ECC_SCRUBREG_ECC_MODE_MASK);

	/* ECC is enabled when memory is in 16bit mode and it is enabled */
	if ((ecctype == ZYNQ_DDRC_ECC_SCRUBREG_ECCMODE_SECDED) &&
	    (width == ZYNQ_DDRC_CTRLREG_BUSWIDTH_16BIT)) {
		puts("ECC enabled ");
		/*
		 * Clear the first 1MB because it is not initialized from
		 * first stage bootloader. To get ECC to work all memory has
		 * been initialized by writing any value.
		 */
		/* cppcheck-suppress nullPointer */
		memset((void *)0, 0, 1 * 1024 * 1024);
	} else {
		puts("ECC disabled ");
	}
}
Commit	Line	Data
148ba55c MS	1	/*
	2	* Copyright (C) 2012 - 2013 Michal Simek <monstr@monstr.eu>
	3	* Copyright (C) 2012 - 2013 Xilinx, Inc. All rights reserved.
	4	*
	5	* SPDX-License-Identifier: GPL-2.0+
	6	*/
	7
	8	#include <common.h>
	9	#include <asm/io.h>
	10	#include <asm/arch/sys_proto.h>
	11	#include <asm/arch/hardware.h>
	12
	13	DECLARE_GLOBAL_DATA_PTR;
	14
	15	/* Control regsiter bitfield definitions */
	16	#define ZYNQ_DDRC_CTRLREG_BUSWIDTH_MASK 0xC
	17	#define ZYNQ_DDRC_CTRLREG_BUSWIDTH_SHIFT 2
	18	#define ZYNQ_DDRC_CTRLREG_BUSWIDTH_16BIT 1
	19
	20	/* ECC scrub regsiter definitions */
	21	#define ZYNQ_DDRC_ECC_SCRUBREG_ECC_MODE_MASK 0x7
	22	#define ZYNQ_DDRC_ECC_SCRUBREG_ECCMODE_SECDED 0x4
	23
	24	void zynq_ddrc_init(void)
	25	{
	26	u32 width, ecctype;
	27
	28	width = readl(&ddrc_base->ddrc_ctrl);
	29	width = (width & ZYNQ_DDRC_CTRLREG_BUSWIDTH_MASK) >>
	30	ZYNQ_DDRC_CTRLREG_BUSWIDTH_SHIFT;
	31	ecctype = (readl(&ddrc_base->ecc_scrub) &
	32	ZYNQ_DDRC_ECC_SCRUBREG_ECC_MODE_MASK);
	33
	34	/* ECC is enabled when memory is in 16bit mode and it is enabled */
	35	if ((ecctype == ZYNQ_DDRC_ECC_SCRUBREG_ECCMODE_SECDED) &&
	36	(width == ZYNQ_DDRC_CTRLREG_BUSWIDTH_16BIT)) {
03606ff4	37	puts("ECC enabled ");
148ba55c MS	38	/*
	39	* Clear the first 1MB because it is not initialized from
	40	* first stage bootloader. To get ECC to work all memory has
	41	* been initialized by writing any value.
	42	*/
0060517a	43	/* cppcheck-suppress nullPointer */
ec963865	44	memset((void )0, 0, 1 1024 * 1024);
148ba55c	45	} else {
03606ff4	46	puts("ECC disabled ");
148ba55c	47	}
148ba55c	48	}