]> git.ipfire.org Git - people/ms/u-boot.git/blame - arch/arm/cpu/ixp/cpu.c
arm: Move cpu/$CPU to arch/arm/cpu/$CPU
[people/ms/u-boot.git] / arch / arm / cpu / ixp / cpu.c
CommitLineData
2d5b561e
WD
1/*
2 * (C) Copyright 2002
3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
5 *
6 * (C) Copyright 2002
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Alex Zuepke <azu@sysgo.de>
9 *
10 * See file CREDITS for list of people who contributed to this
11 * project.
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 * MA 02111-1307 USA
27 */
28
29/*
30 * CPU specific code
31 */
32
33#include <common.h>
34#include <command.h>
cc94074e 35#include <netdev.h>
2d5b561e 36#include <asm/arch/ixp425.h>
677e62f4 37#include <asm/system.h>
2d5b561e 38
ba94a1bb
WD
39ulong loops_per_jiffy;
40
b3acb6cd
JCPV
41static void cache_flush(void);
42
ba94a1bb
WD
43#if defined(CONFIG_DISPLAY_CPUINFO)
44int print_cpuinfo (void)
45{
46 unsigned long id;
47 int speed = 0;
48
49 asm ("mrc p15, 0, %0, c0, c0, 0":"=r" (id));
50
51 puts("CPU: Intel IXP425 at ");
52 switch ((id & 0x000003f0) >> 4) {
53 case 0x1c:
54 loops_per_jiffy = 887467;
55 speed = 533;
56 break;
57
58 case 0x1d:
59 loops_per_jiffy = 666016;
60 speed = 400;
61 break;
62
63 case 0x1f:
64 loops_per_jiffy = 442901;
65 speed = 266;
66 break;
67 }
68
69 if (speed)
70 printf("%d MHz\n", speed);
71 else
72 puts("unknown revision\n");
73
74 return 0;
75}
76#endif /* CONFIG_DISPLAY_CPUINFO */
77
2d5b561e
WD
78int cleanup_before_linux (void)
79{
80 /*
81 * this function is called just before we call linux
82 * it prepares the processor for linux
83 *
84 * just disable everything that can disturb booting linux
85 */
86
2d5b561e
WD
87 disable_interrupts ();
88
89 /* turn off I-cache */
b3acb6cd
JCPV
90 icache_disable();
91 dcache_disable();
2d5b561e
WD
92
93 /* flush I-cache */
b3acb6cd 94 cache_flush();
2d5b561e 95
b3acb6cd 96 return 0;
2d5b561e
WD
97}
98
b3acb6cd
JCPV
99/* flush I/D-cache */
100static void cache_flush (void)
677e62f4 101{
b3acb6cd 102 unsigned long i = 0;
2d5b561e 103
b3acb6cd 104 asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i));
2d5b561e
WD
105}
106
107/* FIXME */
a1191902 108/*
2d5b561e
WD
109void pci_init(void)
110{
111 return;
112}
a1191902 113*/
ba94a1bb
WD
114
115#ifdef CONFIG_BOOTCOUNT_LIMIT
116
117void bootcount_store (ulong a)
118{
6d0f6bcf 119 volatile ulong *save_addr = (volatile ulong *)(CONFIG_SYS_BOOTCOUNT_ADDR);
ba94a1bb
WD
120
121 save_addr[0] = a;
122 save_addr[1] = BOOTCOUNT_MAGIC;
123}
124
125ulong bootcount_load (void)
126{
6d0f6bcf 127 volatile ulong *save_addr = (volatile ulong *)(CONFIG_SYS_BOOTCOUNT_ADDR);
ba94a1bb
WD
128
129 if (save_addr[1] != BOOTCOUNT_MAGIC)
130 return 0;
131 else
132 return save_addr[0];
133}
134
135#endif /* CONFIG_BOOTCOUNT_LIMIT */
cc94074e
BW
136
137int cpu_eth_init(bd_t *bis)
138{
139#ifdef CONFIG_IXP4XX_NPE
140 npe_initialize(bis);
141#endif
142 return 0;
143}