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3f82b1d3 TW |
1 | /* |
2 | * (C) Copyright 2010,2011 | |
3 | * NVIDIA Corporation <www.nvidia.com> | |
4 | * | |
5 | * (C) Copyright 2008 | |
6 | * Texas Instruments | |
7 | * | |
8 | * Richard Woodruff <r-woodruff2@ti.com> | |
9 | * Syed Moahmmed Khasim <khasim@ti.com> | |
10 | * | |
11 | * (C) Copyright 2002 | |
12 | * Sysgo Real-Time Solutions, GmbH <www.elinos.com> | |
13 | * Marius Groeger <mgroeger@sysgo.de> | |
14 | * Alex Zuepke <azu@sysgo.de> | |
15 | * | |
16 | * (C) Copyright 2002 | |
17 | * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de> | |
18 | * | |
1a459660 | 19 | * SPDX-License-Identifier: GPL-2.0+ |
3f82b1d3 TW |
20 | */ |
21 | ||
22 | #include <common.h> | |
23 | #include <asm/io.h> | |
150c2493 TW |
24 | #include <asm/arch/tegra.h> |
25 | #include <asm/arch-tegra/timer.h> | |
3f82b1d3 TW |
26 | |
27 | DECLARE_GLOBAL_DATA_PTR; | |
28 | ||
3f82b1d3 | 29 | /* counter runs at 1MHz */ |
39d3416f | 30 | #define TIMER_CLK 1000000 |
3f82b1d3 TW |
31 | #define TIMER_LOAD_VAL 0xffffffff |
32 | ||
33 | /* timer without interrupts */ | |
3f82b1d3 TW |
34 | ulong get_timer(ulong base) |
35 | { | |
36 | return get_timer_masked() - base; | |
37 | } | |
38 | ||
3f82b1d3 TW |
39 | /* delay x useconds */ |
40 | void __udelay(unsigned long usec) | |
41 | { | |
42 | long tmo = usec * (TIMER_CLK / 1000) / 1000; | |
39d3416f | 43 | unsigned long now, last = timer_get_us(); |
3f82b1d3 TW |
44 | |
45 | while (tmo > 0) { | |
39d3416f | 46 | now = timer_get_us(); |
3f82b1d3 TW |
47 | if (last > now) /* count up timer overflow */ |
48 | tmo -= TIMER_LOAD_VAL - last + now; | |
49 | else | |
50 | tmo -= now - last; | |
51 | last = now; | |
52 | } | |
53 | } | |
54 | ||
3f82b1d3 TW |
55 | ulong get_timer_masked(void) |
56 | { | |
57 | ulong now; | |
58 | ||
59 | /* current tick value */ | |
39d3416f | 60 | now = timer_get_us() / (TIMER_CLK / CONFIG_SYS_HZ); |
3f82b1d3 | 61 | |
582601da | 62 | if (now >= gd->arch.lastinc) /* normal mode (non roll) */ |
3f82b1d3 | 63 | /* move stamp forward with absolute diff ticks */ |
582601da | 64 | gd->arch.tbl += (now - gd->arch.lastinc); |
3f82b1d3 | 65 | else /* we have rollover of incrementer */ |
66ee6923 | 66 | gd->arch.tbl += ((TIMER_LOAD_VAL / (TIMER_CLK / CONFIG_SYS_HZ)) |
582601da SG |
67 | - gd->arch.lastinc) + now; |
68 | gd->arch.lastinc = now; | |
66ee6923 | 69 | return gd->arch.tbl; |
3f82b1d3 TW |
70 | } |
71 | ||
72 | /* | |
73 | * This function is derived from PowerPC code (read timebase as long long). | |
74 | * On ARM it just returns the timer value. | |
75 | */ | |
76 | unsigned long long get_ticks(void) | |
77 | { | |
78 | return get_timer(0); | |
79 | } | |
80 | ||
81 | /* | |
82 | * This function is derived from PowerPC code (timebase clock frequency). | |
83 | * On ARM it returns the number of timer ticks per second. | |
84 | */ | |
85 | ulong get_tbclk(void) | |
86 | { | |
87 | return CONFIG_SYS_HZ; | |
88 | } | |
39d3416f SG |
89 | |
90 | unsigned long timer_get_us(void) | |
91 | { | |
92 | struct timerus *timer_base = (struct timerus *)NV_PA_TMRUS_BASE; | |
93 | ||
94 | return readl(&timer_base->cntr_1us); | |
95 | } |