[people/ms/u-boot.git] / arch / arm / dts / dra71-evm.dts

/*
 * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include "dra72-evm-common.dtsi"
#include "dra72x-mmc-iodelay.dtsi"
#include <dt-bindings/net/ti-dp83867.h>

/ {
	compatible = "ti,dra718-evm", "ti,dra718", "ti,dra722", "ti,dra72", "ti,dra7";
	model = "TI DRA718 EVM";

	memory {
		device_type = "memory";
		reg = <0x0 0x80000000 0x0 0x80000000>; /* 2GB */
	};

	vpo_sd_1v8_3v3: gpio-regulator-TPS74801 {
		compatible = "regulator-gpio";

		regulator-name = "vddshv8";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <3000000>;
		regulator-boot-on;
		vin-supply = <&evm_5v0>;

		gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>;
		states = <1800000 0x0
			  3000000 0x1>;
	};

	evm_1v8_sw: fixedregulator-evm_1v8 {
		compatible = "regulator-fixed";
		regulator-name = "evm_1v8";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		vin-supply = <&lp8732_buck0_reg>;
		regulator-always-on;
		regulator-boot-on;
	};

	poweroff: gpio-poweroff {
		compatible = "gpio-poweroff";
		gpios = <&gpio7 30 GPIO_ACTIVE_HIGH>;
		input;
	};
};

&i2c1 {
	status = "okay";
	clock-frequency = <400000>;

	lp8733: lp8733@60 {
		compatible = "ti,lp8733";
		reg = <0x60>;

		buck0-in-supply =<&vsys_3v3>;
		buck1-in-supply =<&vsys_3v3>;
		ldo0-in-supply =<&evm_5v0>;
		ldo1-in-supply =<&evm_5v0>;

		lp8733_regulators: regulators {
			lp8733_buck0_reg: buck0 {
				/* FB_B0 -> LP8733-BUCK1 - VPO_S1_AVS - VDD_CORE_AVS (core, mpu, gpu) */
				regulator-name = "lp8733-buck0";
				regulator-min-microvolt = <850000>;
				regulator-max-microvolt = <1250000>;
				regulator-always-on;
				regulator-boot-on;
			};

			lp8733_buck1_reg: buck1 {
				/* FB_B1 -> LP8733-BUCK2 - VPO_S2_AVS - VDD_DSP_AVS (DSP/eve/iva) */
				regulator-name = "lp8733-buck1";
				regulator-min-microvolt = <850000>;
				regulator-max-microvolt = <1250000>;
				regulator-boot-on;
				regulator-always-on;
			};

			lp8733_ldo0_reg: ldo0 {
				/* LDO0 -> LP8733-LDO1 - VPO_L1_3V3 - VDDSHV8 (optional) */
				regulator-name = "lp8733-ldo0";
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
			};

			lp8733_ldo1_reg: ldo1 {
				/* LDO1 -> LP8733-LDO2 - VPO_L2_3V3 - VDDA_USB3V3 */
				regulator-name = "lp8733-ldo1";
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
				regulator-boot-on;
			};
		};
	};

	lp8732: lp8732@61 {
		compatible = "ti,lp8732";
		reg = <0x61>;

		buck0-in-supply =<&vsys_3v3>;
		buck1-in-supply =<&vsys_3v3>;
		ldo0-in-supply =<&vsys_3v3>;
		ldo1-in-supply =<&vsys_3v3>;

		lp8732_regulators: regulators {
			lp8732_buck0_reg: buck0 {
				/* FB_B0 -> LP8732-BUCK1 - VPO_S3_1V8 - VDDS_1V8 */
				regulator-name = "lp8732-buck0";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-always-on;
				regulator-boot-on;
			};

			lp8732_buck1_reg: buck1 {
				/* FB_B1 -> LP8732-BUCK2 - VPO_S4_DDR - VDD_DDR_1V35 */
				regulator-name = "lp8732-buck1";
				regulator-min-microvolt = <1350000>;
				regulator-max-microvolt = <1350000>;
				regulator-boot-on;
				regulator-always-on;
			};

			lp8732_ldo0_reg: ldo0 {
				/* LDO0 -> LP8732-LDO1 - VPO_L3_1V8 - VDA_1V8_PLL */
				regulator-name = "lp8732-ldo0";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-boot-on;
				regulator-always-on;
			};

			lp8732_ldo1_reg: ldo1 {
				/* LDO1 -> LP8732-LDO2 - VPO_L4_1V8 - VDA_1V8_PHY */
				regulator-name = "lp8732-ldo1";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-always-on;
				regulator-boot-on;
			};
		};
	};
};

&pcf_lcd {
	interrupt-parent = <&gpio7>;
	interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
};

&pcf_gpio_21 {
	interrupt-parent = <&gpio7>;
	interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
};

&pcf_hdmi {
	p0 {
		/*
		 * PM_OEn to High: Disable routing I2C3 to PM_I2C
		 * With this PM_SEL(p3) should not matter
		 */
		gpio-hog;
		gpios = <0 GPIO_ACTIVE_LOW>;
		output-high;
		line-name = "pm_oe_n";
	};
};

&mmc1 {
	pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
	pinctrl-0 = <&mmc1_pins_default>;
	pinctrl-1 = <&mmc1_pins_hs>;
	pinctrl-2 = <&mmc1_pins_sdr12>;
	pinctrl-3 = <&mmc1_pins_sdr25>;
	pinctrl-4 = <&mmc1_pins_sdr50>;
	pinctrl-5 = <&mmc1_pins_ddr50_rev20 &mmc1_iodelay_ddr50_conf>;
	pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev20_conf>;
	vqmmc-supply = <&vpo_sd_1v8_3v3>;
};

&mmc2 {
	pinctrl-names = "default", "hs", "ddr_1_8v", "hs200_1_8v";
	pinctrl-0 = <&mmc2_pins_default>;
	pinctrl-1 = <&mmc2_pins_hs>;
	pinctrl-2 = <&mmc2_pins_ddr_rev20 &mmc2_iodelay_ddr_conf>;
	pinctrl-3 = <&mmc2_pins_hs200 &mmc2_iodelay_hs200_rev20_conf>;
	vmmc-supply = <&evm_1v8_sw>;
};

&mac {
	mode-gpios = <&pcf_gpio_21 4 GPIO_ACTIVE_LOW>,
		     <&pcf_hdmi 9 GPIO_ACTIVE_LOW>,	/* P11 */
		     <&pcf_hdmi 10 GPIO_ACTIVE_LOW>;	/* P12 */
	dual_emac;
};

&cpsw_emac0 {
	phy_id = <&davinci_mdio>, <2>;
	phy-mode = "rgmii-id";
	dual_emac_res_vlan = <1>;
};

&cpsw_emac1 {
	phy_id = <&davinci_mdio>, <3>;
	phy-mode = "rgmii-id";
	dual_emac_res_vlan = <2>;
};

&davinci_mdio {
	dp83867_0: ethernet-phy@2 {
		reg = <2>;
		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
		ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
		ti,min-output-impedance;
		ti,dp83867-rxctrl-strap-quirk;
	};

	dp83867_1: ethernet-phy@3 {
		reg = <3>;
		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
		ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
		ti,min-output-impedance;
		ti,dp83867-rxctrl-strap-quirk;
	};
};

/* No Sata on this device */
&sata_phy {
	status = "disabled";
};

&sata {
	status = "disabled";
};

/* No RTC on this device */
&rtc {
	status = "disabled";
};

&usb2_phy1 {
	phy-supply = <&lp8733_ldo1_reg>;
};

&usb2_phy2 {
	phy-supply = <&lp8733_ldo1_reg>;
};

&dss {
	/* Supplied by VDA_1V8_PLL */
	vdda_video-supply = <&lp8732_ldo0_reg>;
};

&hdmi {
	/* Supplied by VDA_1V8_PHY */
	vdda_video-supply = <&lp8732_ldo1_reg>;
};
Commit	Line	Data
40de70fb LV	1	/*
	2	* Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License version 2 as
	6	* published by the Free Software Foundation.
	7	*/
	8
	9	#include "dra72-evm-common.dtsi"
4ddaa6ce	10	#include "dra72x-mmc-iodelay.dtsi"
40de70fb LV	11	#include <dt-bindings/net/ti-dp83867.h>
	12
	13	/ {
	14	compatible = "ti,dra718-evm", "ti,dra718", "ti,dra722", "ti,dra72", "ti,dra7";
	15	model = "TI DRA718 EVM";
	16
	17	memory {
	18	device_type = "memory";
	19	reg = <0x0 0x80000000 0x0 0x80000000>; /* 2GB */
	20	};
	21
	22	vpo_sd_1v8_3v3: gpio-regulator-TPS74801 {
	23	compatible = "regulator-gpio";
	24
	25	regulator-name = "vddshv8";
	26	regulator-min-microvolt = <1800000>;
	27	regulator-max-microvolt = <3000000>;
	28	regulator-boot-on;
	29	vin-supply = <&evm_5v0>;
	30
	31	gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>;
	32	states = <1800000 0x0
	33	3000000 0x1>;
	34	};
	35
4ddaa6ce LV	36	evm_1v8_sw: fixedregulator-evm_1v8 {
	37	compatible = "regulator-fixed";
	38	regulator-name = "evm_1v8";
	39	regulator-min-microvolt = <1800000>;
	40	regulator-max-microvolt = <1800000>;
	41	vin-supply = <&lp8732_buck0_reg>;
	42	regulator-always-on;
	43	regulator-boot-on;
	44	};
	45
40de70fb LV	46	poweroff: gpio-poweroff {
	47	compatible = "gpio-poweroff";
	48	gpios = <&gpio7 30 GPIO_ACTIVE_HIGH>;
	49	input;
	50	};
	51	};
	52
	53	&i2c1 {
	54	status = "okay";
	55	clock-frequency = <400000>;
	56
	57	lp8733: lp8733@60 {
	58	compatible = "ti,lp8733";
	59	reg = <0x60>;
	60
	61	buck0-in-supply =<&vsys_3v3>;
	62	buck1-in-supply =<&vsys_3v3>;
	63	ldo0-in-supply =<&evm_5v0>;
	64	ldo1-in-supply =<&evm_5v0>;
	65
	66	lp8733_regulators: regulators {
	67	lp8733_buck0_reg: buck0 {
	68	/* FB_B0 -> LP8733-BUCK1 - VPO_S1_AVS - VDD_CORE_AVS (core, mpu, gpu) */
	69	regulator-name = "lp8733-buck0";
	70	regulator-min-microvolt = <850000>;
	71	regulator-max-microvolt = <1250000>;
	72	regulator-always-on;
	73	regulator-boot-on;
	74	};
	75
	76	lp8733_buck1_reg: buck1 {
	77	/* FB_B1 -> LP8733-BUCK2 - VPO_S2_AVS - VDD_DSP_AVS (DSP/eve/iva) */
	78	regulator-name = "lp8733-buck1";
	79	regulator-min-microvolt = <850000>;
	80	regulator-max-microvolt = <1250000>;
	81	regulator-boot-on;
	82	regulator-always-on;
	83	};
	84
	85	lp8733_ldo0_reg: ldo0 {
	86	/* LDO0 -> LP8733-LDO1 - VPO_L1_3V3 - VDDSHV8 (optional) */
	87	regulator-name = "lp8733-ldo0";
	88	regulator-min-microvolt = <3300000>;
	89	regulator-max-microvolt = <3300000>;
	90	};
	91
	92	lp8733_ldo1_reg: ldo1 {
	93	/* LDO1 -> LP8733-LDO2 - VPO_L2_3V3 - VDDA_USB3V3 */
	94	regulator-name = "lp8733-ldo1";
	95	regulator-min-microvolt = <3300000>;
	96	regulator-max-microvolt = <3300000>;
	97	regulator-always-on;
	98	regulator-boot-on;
	99	};
	100	};
	101	};
	102
	103	lp8732: lp8732@61 {
	104	compatible = "ti,lp8732";
	105	reg = <0x61>;
	106
	107	buck0-in-supply =<&vsys_3v3>;
	108	buck1-in-supply =<&vsys_3v3>;
	109	ldo0-in-supply =<&vsys_3v3>;
110	ldo1-in-supply =<&vsys_3v3>;
111
112	lp8732_regulators: regulators {
113	lp8732_buck0_reg: buck0 {
114	/* FB_B0 -> LP8732-BUCK1 - VPO_S3_1V8 - VDDS_1V8 */
115	regulator-name = "lp8732-buck0";
116	regulator-min-microvolt = <1800000>;
117	regulator-max-microvolt = <1800000>;
118	regulator-always-on;
119	regulator-boot-on;
120	};
121
122	lp8732_buck1_reg: buck1 {
123	/* FB_B1 -> LP8732-BUCK2 - VPO_S4_DDR - VDD_DDR_1V35 */
124	regulator-name = "lp8732-buck1";
125	regulator-min-microvolt = <1350000>;
126	regulator-max-microvolt = <1350000>;
127	regulator-boot-on;
128	regulator-always-on;
129	};
130
131	lp8732_ldo0_reg: ldo0 {
132	/* LDO0 -> LP8732-LDO1 - VPO_L3_1V8 - VDA_1V8_PLL */
133	regulator-name = "lp8732-ldo0";
134	regulator-min-microvolt = <1800000>;
135	regulator-max-microvolt = <1800000>;
136	regulator-boot-on;
137	regulator-always-on;
138	};
139
140	lp8732_ldo1_reg: ldo1 {
141	/* LDO1 -> LP8732-LDO2 - VPO_L4_1V8 - VDA_1V8_PHY */
142	regulator-name = "lp8732-ldo1";
143	regulator-min-microvolt = <1800000>;
144	regulator-max-microvolt = <1800000>;
145	regulator-always-on;
146	regulator-boot-on;
147	};
148	};
149	};
150	};
151
4ddaa6ce LV	152	&pcf_lcd {
	153	interrupt-parent = <&gpio7>;
	154	interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
	155	};
	156
40de70fb LV	157	&pcf_gpio_21 {
	158	interrupt-parent = <&gpio7>;
	159	interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
	160	};
	161
	162	&pcf_hdmi {
	163	p0 {
	164	/*
	165	* PM_OEn to High: Disable routing I2C3 to PM_I2C
	166	* With this PM_SEL(p3) should not matter
	167	*/
	168	gpio-hog;
	169	gpios = <0 GPIO_ACTIVE_LOW>;
	170	output-high;
	171	line-name = "pm_oe_n";
	172	};
	173	};
	174
	175	&mmc1 {
4ddaa6ce LV	176	pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
	177	pinctrl-0 = <&mmc1_pins_default>;
	178	pinctrl-1 = <&mmc1_pins_hs>;
	179	pinctrl-2 = <&mmc1_pins_sdr12>;
	180	pinctrl-3 = <&mmc1_pins_sdr25>;
	181	pinctrl-4 = <&mmc1_pins_sdr50>;
	182	pinctrl-5 = <&mmc1_pins_ddr50_rev20 &mmc1_iodelay_ddr50_conf>;
	183	pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev20_conf>;
	184	vqmmc-supply = <&vpo_sd_1v8_3v3>;
	185	};
	186
	187	&mmc2 {
	188	pinctrl-names = "default", "hs", "ddr_1_8v", "hs200_1_8v";
	189	pinctrl-0 = <&mmc2_pins_default>;
	190	pinctrl-1 = <&mmc2_pins_hs>;
	191	pinctrl-2 = <&mmc2_pins_ddr_rev20 &mmc2_iodelay_ddr_conf>;
	192	pinctrl-3 = <&mmc2_pins_hs200 &mmc2_iodelay_hs200_rev20_conf>;
	193	vmmc-supply = <&evm_1v8_sw>;
40de70fb LV	194	};
	195
	196	&mac {
	197	mode-gpios = <&pcf_gpio_21 4 GPIO_ACTIVE_LOW>,
	198	<&pcf_hdmi 9 GPIO_ACTIVE_LOW>, /* P11 */
	199	<&pcf_hdmi 10 GPIO_ACTIVE_LOW>; /* P12 */
	200	dual_emac;
	201	};
	202
	203	&cpsw_emac0 {
4ddaa6ce	204	phy_id = <&davinci_mdio>, <2>;
40de70fb LV	205	phy-mode = "rgmii-id";
	206	dual_emac_res_vlan = <1>;
	207	};
	208
	209	&cpsw_emac1 {
4ddaa6ce	210	phy_id = <&davinci_mdio>, <3>;
40de70fb LV	211	phy-mode = "rgmii-id";
	212	dual_emac_res_vlan = <2>;
	213	};
	214
	215	&davinci_mdio {
	216	dp83867_0: ethernet-phy@2 {
	217	reg = <2>;
	218	ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
	219	ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
	220	ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
4ddaa6ce LV	221	ti,min-output-impedance;
4ddaa6ce LV	222	ti,dp83867-rxctrl-strap-quirk;
40de70fb LV	223	};
	224
	225	dp83867_1: ethernet-phy@3 {
	226	reg = <3>;
	227	ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
	228	ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
	229	ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
4ddaa6ce LV	230	ti,min-output-impedance;
4ddaa6ce LV	231	ti,dp83867-rxctrl-strap-quirk;
40de70fb LV	232	};
	233	};
	234
	235	/* No Sata on this device */
	236	&sata_phy {
	237	status = "disabled";
	238	};
	239
	240	&sata {
	241	status = "disabled";
	242	};
	243
	244	/* No RTC on this device */
	245	&rtc {
	246	status = "disabled";
	247	};
	248
	249	&usb2_phy1 {
	250	phy-supply = <&lp8733_ldo1_reg>;
	251	};
	252
	253	&usb2_phy2 {
	254	phy-supply = <&lp8733_ldo1_reg>;
	255	};
	256
	257	&dss {
	258	/* Supplied by VDA_1V8_PLL */
	259	vdda_video-supply = <&lp8732_ldo0_reg>;
	260	};
	261
	262	&hdmi {
	263	/* Supplied by VDA_1V8_PHY */
	264	vdda_video-supply = <&lp8732_ldo1_reg>;
	265	};