[people/ms/u-boot.git] / arch / arm / dts / exynos5.dtsi

/*
 * Copyright (c) 2013 The Chromium OS Authors
 * SAMSUNG EXYNOS5 SoC device tree source
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#include "skeleton.dtsi"
#include <dt-bindings/gpio/gpio.h>

/ {
	compatible = "samsung,exynos5";

	combiner: interrupt-controller@10440000 {
		compatible = "samsung,exynos4210-combiner";
		#interrupt-cells = <2>;
		interrupt-controller;
		samsung,combiner-nr = <32>;
		reg = <0x10440000 0x1000>;
		interrupts =	<0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
				<0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
				<0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
				<0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
				<0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
				<0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
				<0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
				<0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
	};

	gic: interrupt-controller@10481000 {
		compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
		#interrupt-cells = <3>;
		interrupt-controller;
		reg =	<0x10481000 0x1000>,
			<0x10482000 0x1000>,
			<0x10484000 0x2000>,
			<0x10486000 0x2000>;
		interrupts = <1 9 0xf04>;
	};

	sromc@12250000 {
		compatible = "samsung,exynos-sromc";
		reg = <0x12250000 0x20>;
		#address-cells = <1>;
		#size-cells = <0>;
	};

	combiner: interrupt-controller@10440000 {
		compatible = "samsung,exynos4210-combiner";
		#interrupt-cells = <2>;
		interrupt-controller;
		samsung,combiner-nr = <32>;
		reg = <0x10440000 0x1000>;
		interrupts =	<0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
				<0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
				<0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
				<0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
				<0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
				<0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
				<0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
				<0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
	};

	gic: interrupt-controller@10481000 {
		compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
		#interrupt-cells = <3>;
		interrupt-controller;
		reg =	<0x10481000 0x1000>,
			<0x10482000 0x1000>,
			<0x10484000 0x2000>,
			<0x10486000 0x2000>;
		interrupts = <1 9 0xf04>;
	};

	i2c@12c60000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,s3c2440-i2c";
		reg = <0x12C60000 0x100>;
		interrupts = <0 56 0>;
	};

	i2c@12c70000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,s3c2440-i2c";
		reg = <0x12C70000 0x100>;
		interrupts = <0 57 0>;
	};

	i2c@12c80000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,s3c2440-i2c";
		reg = <0x12C80000 0x100>;
		interrupts = <0 58 0>;
	};

	i2c@12c90000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,s3c2440-i2c";
		reg = <0x12C90000 0x100>;
		interrupts = <0 59 0>;
	};

	spi@12d20000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,exynos-spi";
		reg = <0x12d20000 0x30>;
		interrupts = <0 68 0>;
	};

	spi@12d30000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,exynos-spi";
		reg = <0x12d30000 0x30>;
		interrupts = <0 69 0>;
	};

	spi@12d40000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,exynos-spi";
		reg = <0x12d40000 0x30>;
		clock-frequency = <50000000>;
		interrupts = <0 70 0>;
        };

	spi@131a0000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,exynos-spi";
		reg = <0x131a0000 0x30>;
		interrupts = <0 129 0>;
	};

	spi@131b0000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,exynos-spi";
		reg = <0x131b0000 0x30>;
		interrupts = <0 130 0>;
	};

	ehci@12110000 {
		compatible = "samsung,exynos-ehci";
		reg = <0x12110000 0x100>;
		#address-cells = <1>;
		#size-cells = <1>;

		phy {
			compatible = "samsung,exynos-usb-phy";
			reg = <0x12130000 0x100>;
		};
	};

	tmu@10060000 {
		compatible = "samsung,exynos-tmu";
		reg = <0x10060000 0x10000>;
	};

	fimd@14400000 {
		compatible = "samsung,exynos-fimd";
		reg = <0x14400000 0x10000>;
		#address-cells = <1>;
		#size-cells = <1>;
	};

	dp@145b0000 {
		compatible = "samsung,exynos5-dp";
		reg = <0x145b0000 0x1000>;
		#address-cells = <1>;
		#size-cells = <1>;
	};

	xhci0: xhci@12000000 {
		compatible = "samsung,exynos5250-xhci";
		reg = <0x12000000 0x10000>;
		#address-cells = <1>;
		#size-cells = <1>;

		phy {
			compatible = "samsung,exynos5250-usb3-phy";
			reg = <0x12100000 0x100>;
		};
	};

	mmc@12200000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,exynos-dwmmc";
		reg = <0x12200000 0x1000>;
		interrupts = <0 75 0>;
	};

	mmc@12210000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,exynos-dwmmc";
		reg = <0x12210000 0x1000>;
		interrupts = <0 76 0>;
	};

	mmc@12220000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,exynos-dwmmc";
		reg = <0x12220000 0x1000>;
		interrupts = <0 77 0>;
	};

	mmc@12230000 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "samsung,exynos-dwmmc";
		reg = <0x12230000 0x1000>;
		interrupts = <0 78 0>;
	};

	serial@12C00000 {
		compatible = "samsung,exynos4210-uart";
		reg = <0x12C00000 0x100>;
		interrupts = <0 51 0>;
		id = <0>;
	};

	serial@12C10000 {
		compatible = "samsung,exynos4210-uart";
		reg = <0x12C10000 0x100>;
		interrupts = <0 52 0>;
		id = <1>;
	};

	serial@12C20000 {
		compatible = "samsung,exynos4210-uart";
		reg = <0x12C20000 0x100>;
		interrupts = <0 53 0>;
		id = <2>;
	};

	serial@12C30000 {
		compatible = "samsung,exynos4210-uart";
		reg = <0x12C30000 0x100>;
		interrupts = <0 54 0>;
		u-boot,dm-pre-reloc;
		id = <3>;
	};
};
Commit	Line	Data
e2be3369 RS	1	/*
	2	* Copyright (c) 2013 The Chromium OS Authors
	3	* SAMSUNG EXYNOS5 SoC device tree source
	4	*
	5	* SPDX-License-Identifier: GPL-2.0+
	6	*/
	7
2fdd7d9e	8	#include "skeleton.dtsi"
6f755eb6	9	#include <dt-bindings/gpio/gpio.h>
e2be3369 RS	10
	11	/ {
	12	compatible = "samsung,exynos5";
	13
dd54739d SG	14	combiner: interrupt-controller@10440000 {
	15	compatible = "samsung,exynos4210-combiner";
	16	#interrupt-cells = <2>;
	17	interrupt-controller;
	18	samsung,combiner-nr = <32>;
	19	reg = <0x10440000 0x1000>;
	20	interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
	21	<0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
	22	<0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
	23	<0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
	24	<0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
	25	<0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
	26	<0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
	27	<0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
	28	};
	29
	30	gic: interrupt-controller@10481000 {
	31	compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
	32	#interrupt-cells = <3>;
	33	interrupt-controller;
	34	reg = <0x10481000 0x1000>,
	35	<0x10482000 0x1000>,
	36	<0x10484000 0x2000>,
	37	<0x10486000 0x2000>;
	38	interrupts = <1 9 0xf04>;
	39	};
	40
e2be3369 RS	41	sromc@12250000 {
	42	compatible = "samsung,exynos-sromc";
	43	reg = <0x12250000 0x20>;
	44	#address-cells = <1>;
	45	#size-cells = <0>;
	46	};
	47
dd54739d SG	48	combiner: interrupt-controller@10440000 {
	49	compatible = "samsung,exynos4210-combiner";
	50	#interrupt-cells = <2>;
	51	interrupt-controller;
	52	samsung,combiner-nr = <32>;
	53	reg = <0x10440000 0x1000>;
	54	interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
	55	<0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
	56	<0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
	57	<0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
	58	<0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
	59	<0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
	60	<0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
	61	<0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
	62	};
	63
	64	gic: interrupt-controller@10481000 {
	65	compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
	66	#interrupt-cells = <3>;
	67	interrupt-controller;
	68	reg = <0x10481000 0x1000>,
	69	<0x10482000 0x1000>,
	70	<0x10484000 0x2000>,
	71	<0x10486000 0x2000>;
	72	interrupts = <1 9 0xf04>;
	73	};
	74
e2be3369 RS	75	i2c@12c60000 {
	76	#address-cells = <1>;
	77	#size-cells = <0>;
	78	compatible = "samsung,s3c2440-i2c";
	79	reg = <0x12C60000 0x100>;
	80	interrupts = <0 56 0>;
	81	};
	82
	83	i2c@12c70000 {
	84	#address-cells = <1>;
	85	#size-cells = <0>;
	86	compatible = "samsung,s3c2440-i2c";
	87	reg = <0x12C70000 0x100>;
	88	interrupts = <0 57 0>;
	89	};
	90
	91	i2c@12c80000 {
	92	#address-cells = <1>;
	93	#size-cells = <0>;
	94	compatible = "samsung,s3c2440-i2c";
	95	reg = <0x12C80000 0x100>;
	96	interrupts = <0 58 0>;
	97	};
	98
	99	i2c@12c90000 {
	100	#address-cells = <1>;
	101	#size-cells = <0>;
	102	compatible = "samsung,s3c2440-i2c";
	103	reg = <0x12C90000 0x100>;
	104	interrupts = <0 59 0>;
	105	};
	106
	107	spi@12d20000 {
	108	#address-cells = <1>;
	109	#size-cells = <0>;
	110	compatible = "samsung,exynos-spi";
	111	reg = <0x12d20000 0x30>;
	112	interrupts = <0 68 0>;
	113	};
	114
	115	spi@12d30000 {
	116	#address-cells = <1>;
	117	#size-cells = <0>;
	118	compatible = "samsung,exynos-spi";
	119	reg = <0x12d30000 0x30>;
	120	interrupts = <0 69 0>;
	121	};
	122
	123	spi@12d40000 {
	124	#address-cells = <1>;
	125	#size-cells = <0>;
	126	compatible = "samsung,exynos-spi";
	127	reg = <0x12d40000 0x30>;
	128	clock-frequency = <50000000>;
	129	interrupts = <0 70 0>;
	130	};
	131
	132	spi@131a0000 {
	133	#address-cells = <1>;
	134	#size-cells = <0>;
	135	compatible = "samsung,exynos-spi";
	136	reg = <0x131a0000 0x30>;
	137	interrupts = <0 129 0>;
	138	};
139
140	spi@131b0000 {
141	#address-cells = <1>;
142	#size-cells = <0>;
143	compatible = "samsung,exynos-spi";
144	reg = <0x131b0000 0x30>;
145	interrupts = <0 130 0>;
146	};
147
148	ehci@12110000 {
149	compatible = "samsung,exynos-ehci";
150	reg = <0x12110000 0x100>;
151	#address-cells = <1>;
152	#size-cells = <1>;
153
154	phy {
155	compatible = "samsung,exynos-usb-phy";
156	reg = <0x12130000 0x100>;
157	};
158	};
159
160	tmu@10060000 {
161	compatible = "samsung,exynos-tmu";
162	reg = <0x10060000 0x10000>;
163	};
164
165	fimd@14400000 {
166	compatible = "samsung,exynos-fimd";
167	reg = <0x14400000 0x10000>;
168	#address-cells = <1>;
169	#size-cells = <1>;
170	};
171
172	dp@145b0000 {
173	compatible = "samsung,exynos5-dp";
174	reg = <0x145b0000 0x1000>;
175	#address-cells = <1>;
176	#size-cells = <1>;
177	};
178
179	xhci0: xhci@12000000 {
180	compatible = "samsung,exynos5250-xhci";
181	reg = <0x12000000 0x10000>;
182	#address-cells = <1>;
183	#size-cells = <1>;
184
185	phy {
186	compatible = "samsung,exynos5250-usb3-phy";
187	reg = <0x12100000 0x100>;
188	};
189	};
190
191	mmc@12200000 {
192	#address-cells = <1>;
193	#size-cells = <0>;
7d3ca0f8	194	compatible = "samsung,exynos-dwmmc";
e2be3369 RS	195	reg = <0x12200000 0x1000>;
	196	interrupts = <0 75 0>;
	197	};
	198
	199	mmc@12210000 {
	200	#address-cells = <1>;
	201	#size-cells = <0>;
7d3ca0f8	202	compatible = "samsung,exynos-dwmmc";
e2be3369 RS	203	reg = <0x12210000 0x1000>;
	204	interrupts = <0 76 0>;
	205	};
	206
	207	mmc@12220000 {
	208	#address-cells = <1>;
	209	#size-cells = <0>;
7d3ca0f8	210	compatible = "samsung,exynos-dwmmc";
e2be3369 RS	211	reg = <0x12220000 0x1000>;
	212	interrupts = <0 77 0>;
	213	};
	214
	215	mmc@12230000 {
	216	#address-cells = <1>;
	217	#size-cells = <0>;
7d3ca0f8	218	compatible = "samsung,exynos-dwmmc";
e2be3369 RS	219	reg = <0x12230000 0x1000>;
	220	interrupts = <0 78 0>;
	221	};
	222
	223	serial@12C00000 {
	224	compatible = "samsung,exynos4210-uart";
	225	reg = <0x12C00000 0x100>;
	226	interrupts = <0 51 0>;
	227	id = <0>;
	228	};
	229
	230	serial@12C10000 {
	231	compatible = "samsung,exynos4210-uart";
	232	reg = <0x12C10000 0x100>;
	233	interrupts = <0 52 0>;
	234	id = <1>;
	235	};
	236
	237	serial@12C20000 {
	238	compatible = "samsung,exynos4210-uart";
	239	reg = <0x12C20000 0x100>;
	240	interrupts = <0 53 0>;
	241	id = <2>;
	242	};
	243
	244	serial@12C30000 {
	245	compatible = "samsung,exynos4210-uart";
	246	reg = <0x12C30000 0x100>;
	247	interrupts = <0 54 0>;
9208fffe	248	u-boot,dm-pre-reloc;
e2be3369 RS	249	id = <3>;
e2be3369 RS	250	};
e2be3369	251	};