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e2be3369 RS |
1 | /* |
2 | * Copyright (c) 2013 The Chromium OS Authors | |
3 | * SAMSUNG EXYNOS5 SoC device tree source | |
4 | * | |
5 | * SPDX-License-Identifier: GPL-2.0+ | |
6 | */ | |
7 | ||
2fdd7d9e | 8 | #include "skeleton.dtsi" |
6f755eb6 | 9 | #include <dt-bindings/gpio/gpio.h> |
e2be3369 RS |
10 | |
11 | / { | |
12 | compatible = "samsung,exynos5"; | |
13 | ||
dd54739d SG |
14 | combiner: interrupt-controller@10440000 { |
15 | compatible = "samsung,exynos4210-combiner"; | |
16 | #interrupt-cells = <2>; | |
17 | interrupt-controller; | |
18 | samsung,combiner-nr = <32>; | |
19 | reg = <0x10440000 0x1000>; | |
20 | interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>, | |
21 | <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>, | |
22 | <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>, | |
23 | <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>, | |
24 | <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>, | |
25 | <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>, | |
26 | <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>, | |
27 | <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>; | |
28 | }; | |
29 | ||
30 | gic: interrupt-controller@10481000 { | |
31 | compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; | |
32 | #interrupt-cells = <3>; | |
33 | interrupt-controller; | |
34 | reg = <0x10481000 0x1000>, | |
35 | <0x10482000 0x1000>, | |
36 | <0x10484000 0x2000>, | |
37 | <0x10486000 0x2000>; | |
38 | interrupts = <1 9 0xf04>; | |
39 | }; | |
40 | ||
e2be3369 RS |
41 | sromc@12250000 { |
42 | compatible = "samsung,exynos-sromc"; | |
43 | reg = <0x12250000 0x20>; | |
44 | #address-cells = <1>; | |
45 | #size-cells = <0>; | |
46 | }; | |
47 | ||
dd54739d SG |
48 | combiner: interrupt-controller@10440000 { |
49 | compatible = "samsung,exynos4210-combiner"; | |
50 | #interrupt-cells = <2>; | |
51 | interrupt-controller; | |
52 | samsung,combiner-nr = <32>; | |
53 | reg = <0x10440000 0x1000>; | |
54 | interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>, | |
55 | <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>, | |
56 | <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>, | |
57 | <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>, | |
58 | <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>, | |
59 | <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>, | |
60 | <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>, | |
61 | <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>; | |
62 | }; | |
63 | ||
64 | gic: interrupt-controller@10481000 { | |
65 | compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic"; | |
66 | #interrupt-cells = <3>; | |
67 | interrupt-controller; | |
68 | reg = <0x10481000 0x1000>, | |
69 | <0x10482000 0x1000>, | |
70 | <0x10484000 0x2000>, | |
71 | <0x10486000 0x2000>; | |
72 | interrupts = <1 9 0xf04>; | |
73 | }; | |
74 | ||
f1ac35b7 | 75 | i2c_0: i2c@12C60000 { |
e2be3369 RS |
76 | compatible = "samsung,s3c2440-i2c"; |
77 | reg = <0x12C60000 0x100>; | |
78 | interrupts = <0 56 0>; | |
e2be3369 RS |
79 | #address-cells = <1>; |
80 | #size-cells = <0>; | |
f1ac35b7 SG |
81 | }; |
82 | ||
83 | i2c_1: i2c@12C70000 { | |
e2be3369 RS |
84 | compatible = "samsung,s3c2440-i2c"; |
85 | reg = <0x12C70000 0x100>; | |
86 | interrupts = <0 57 0>; | |
e2be3369 RS |
87 | #address-cells = <1>; |
88 | #size-cells = <0>; | |
f1ac35b7 SG |
89 | }; |
90 | ||
91 | i2c_2: i2c@12C80000 { | |
e2be3369 RS |
92 | compatible = "samsung,s3c2440-i2c"; |
93 | reg = <0x12C80000 0x100>; | |
94 | interrupts = <0 58 0>; | |
e2be3369 RS |
95 | #address-cells = <1>; |
96 | #size-cells = <0>; | |
f1ac35b7 SG |
97 | }; |
98 | ||
99 | i2c_3: i2c@12C90000 { | |
e2be3369 RS |
100 | compatible = "samsung,s3c2440-i2c"; |
101 | reg = <0x12C90000 0x100>; | |
102 | interrupts = <0 59 0>; | |
f1ac35b7 SG |
103 | #address-cells = <1>; |
104 | #size-cells = <0>; | |
e2be3369 RS |
105 | }; |
106 | ||
f1ac35b7 | 107 | spi_0: spi@12d20000 { |
e2be3369 RS |
108 | #address-cells = <1>; |
109 | #size-cells = <0>; | |
110 | compatible = "samsung,exynos-spi"; | |
111 | reg = <0x12d20000 0x30>; | |
112 | interrupts = <0 68 0>; | |
113 | }; | |
114 | ||
f1ac35b7 | 115 | spi_1: spi@12d30000 { |
e2be3369 RS |
116 | #address-cells = <1>; |
117 | #size-cells = <0>; | |
118 | compatible = "samsung,exynos-spi"; | |
119 | reg = <0x12d30000 0x30>; | |
120 | interrupts = <0 69 0>; | |
121 | }; | |
122 | ||
f1ac35b7 | 123 | spi_2: spi@12d40000 { |
e2be3369 RS |
124 | #address-cells = <1>; |
125 | #size-cells = <0>; | |
126 | compatible = "samsung,exynos-spi"; | |
127 | reg = <0x12d40000 0x30>; | |
128 | clock-frequency = <50000000>; | |
129 | interrupts = <0 70 0>; | |
130 | }; | |
131 | ||
f1ac35b7 | 132 | spi_3: spi@131a0000 { |
e2be3369 RS |
133 | #address-cells = <1>; |
134 | #size-cells = <0>; | |
135 | compatible = "samsung,exynos-spi"; | |
136 | reg = <0x131a0000 0x30>; | |
137 | interrupts = <0 129 0>; | |
138 | }; | |
139 | ||
f1ac35b7 | 140 | spi_4: spi@131b0000 { |
e2be3369 RS |
141 | #address-cells = <1>; |
142 | #size-cells = <0>; | |
143 | compatible = "samsung,exynos-spi"; | |
144 | reg = <0x131b0000 0x30>; | |
145 | interrupts = <0 130 0>; | |
146 | }; | |
147 | ||
148 | ehci@12110000 { | |
149 | compatible = "samsung,exynos-ehci"; | |
150 | reg = <0x12110000 0x100>; | |
151 | #address-cells = <1>; | |
152 | #size-cells = <1>; | |
153 | ||
154 | phy { | |
155 | compatible = "samsung,exynos-usb-phy"; | |
156 | reg = <0x12130000 0x100>; | |
157 | }; | |
158 | }; | |
159 | ||
160 | tmu@10060000 { | |
161 | compatible = "samsung,exynos-tmu"; | |
162 | reg = <0x10060000 0x10000>; | |
163 | }; | |
164 | ||
165 | fimd@14400000 { | |
f948f5de | 166 | u-boot,dm-pre-reloc; |
e2be3369 RS |
167 | compatible = "samsung,exynos-fimd"; |
168 | reg = <0x14400000 0x10000>; | |
169 | #address-cells = <1>; | |
170 | #size-cells = <1>; | |
171 | }; | |
172 | ||
f948f5de | 173 | dp: dp@145b0000 { |
e2be3369 RS |
174 | compatible = "samsung,exynos5-dp"; |
175 | reg = <0x145b0000 0x1000>; | |
176 | #address-cells = <1>; | |
177 | #size-cells = <1>; | |
178 | }; | |
179 | ||
180 | xhci0: xhci@12000000 { | |
181 | compatible = "samsung,exynos5250-xhci"; | |
182 | reg = <0x12000000 0x10000>; | |
183 | #address-cells = <1>; | |
184 | #size-cells = <1>; | |
185 | ||
186 | phy { | |
187 | compatible = "samsung,exynos5250-usb3-phy"; | |
188 | reg = <0x12100000 0x100>; | |
189 | }; | |
190 | }; | |
191 | ||
192 | mmc@12200000 { | |
193 | #address-cells = <1>; | |
194 | #size-cells = <0>; | |
7d3ca0f8 | 195 | compatible = "samsung,exynos-dwmmc"; |
e2be3369 RS |
196 | reg = <0x12200000 0x1000>; |
197 | interrupts = <0 75 0>; | |
198 | }; | |
199 | ||
200 | mmc@12210000 { | |
201 | #address-cells = <1>; | |
202 | #size-cells = <0>; | |
7d3ca0f8 | 203 | compatible = "samsung,exynos-dwmmc"; |
e2be3369 RS |
204 | reg = <0x12210000 0x1000>; |
205 | interrupts = <0 76 0>; | |
206 | }; | |
207 | ||
208 | mmc@12220000 { | |
209 | #address-cells = <1>; | |
210 | #size-cells = <0>; | |
7d3ca0f8 | 211 | compatible = "samsung,exynos-dwmmc"; |
e2be3369 RS |
212 | reg = <0x12220000 0x1000>; |
213 | interrupts = <0 77 0>; | |
214 | }; | |
215 | ||
216 | mmc@12230000 { | |
217 | #address-cells = <1>; | |
218 | #size-cells = <0>; | |
7d3ca0f8 | 219 | compatible = "samsung,exynos-dwmmc"; |
e2be3369 RS |
220 | reg = <0x12230000 0x1000>; |
221 | interrupts = <0 78 0>; | |
222 | }; | |
223 | ||
224 | serial@12C00000 { | |
225 | compatible = "samsung,exynos4210-uart"; | |
226 | reg = <0x12C00000 0x100>; | |
227 | interrupts = <0 51 0>; | |
228 | id = <0>; | |
229 | }; | |
230 | ||
231 | serial@12C10000 { | |
232 | compatible = "samsung,exynos4210-uart"; | |
233 | reg = <0x12C10000 0x100>; | |
234 | interrupts = <0 52 0>; | |
235 | id = <1>; | |
236 | }; | |
237 | ||
238 | serial@12C20000 { | |
239 | compatible = "samsung,exynos4210-uart"; | |
240 | reg = <0x12C20000 0x100>; | |
241 | interrupts = <0 53 0>; | |
242 | id = <2>; | |
243 | }; | |
244 | ||
245 | serial@12C30000 { | |
246 | compatible = "samsung,exynos4210-uart"; | |
247 | reg = <0x12C30000 0x100>; | |
248 | interrupts = <0 54 0>; | |
9208fffe | 249 | u-boot,dm-pre-reloc; |
e2be3369 RS |
250 | id = <3>; |
251 | }; | |
e2be3369 | 252 | }; |