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4ceb5c6d MW |
1 | // SPDX-License-Identifier: GPL-2.0+ |
2 | ||
3 | #include <config.h> | |
4 | ||
5 | / { | |
6 | aliases { | |
4ceb5c6d MW |
7 | i2c0 = &i2c0; |
8 | i2c1 = &i2c3; | |
9 | i2c2 = &i2c4; | |
c816dd03 MW |
10 | ethernet2 = &enetc_port2; |
11 | ethernet3 = &enetc_port3; | |
4ceb5c6d MW |
12 | }; |
13 | ||
e057760f | 14 | binman: binman { |
d8ffd938 MW |
15 | multiple-images; |
16 | }; | |
17 | }; | |
18 | ||
19 | &binman { | |
20 | u_boot_rom: u-boot-rom { | |
4ceb5c6d MW |
21 | filename = "u-boot.rom"; |
22 | pad-byte = <0xff>; | |
23 | ||
24 | u-boot-spl { | |
25 | }; | |
26 | ||
27 | fit { | |
28 | offset = <CONFIG_SPL_PAD_TO>; | |
29 | description = "FIT image with multiple configurations"; | |
554a8531 | 30 | fit,fdt-list = "of-list"; |
4ceb5c6d MW |
31 | |
32 | images { | |
33 | uboot { | |
34 | description = "U-Boot"; | |
35 | type = "firmware"; | |
36 | os = "u-boot"; | |
37 | arch = "arm"; | |
38 | compression = "none"; | |
98463903 | 39 | load = <CONFIG_TEXT_BASE>; |
4ceb5c6d MW |
40 | |
41 | u-boot-nodtb { | |
42 | }; | |
43 | }; | |
44 | ||
554a8531 MW |
45 | @fdt-SEQ { |
46 | description = "NAME"; | |
4ceb5c6d | 47 | type = "flat_dt"; |
4ceb5c6d | 48 | compression = "none"; |
4ceb5c6d MW |
49 | }; |
50 | }; | |
51 | ||
52 | configurations { | |
554a8531 | 53 | default = "@config-DEFAULT-SEQ"; |
b463010b | 54 | |
554a8531 MW |
55 | @config-SEQ { |
56 | description = "NAME"; | |
b463010b | 57 | firmware = "uboot"; |
554a8531 | 58 | fdt = "fdt-SEQ"; |
b463010b | 59 | }; |
4ceb5c6d MW |
60 | }; |
61 | }; | |
62 | }; | |
63 | }; | |
64 | ||
d8ffd938 MW |
65 | &binman { |
66 | u-boot-update { | |
67 | filename = "u-boot.update"; | |
68 | ||
69 | fit { | |
70 | description = "FIT update image"; | |
71 | ||
72 | images { | |
73 | u-boot-bin { | |
74 | description = "U-Boot"; | |
75 | type = "firmware"; | |
76 | os = "u-boot"; | |
77 | arch = "arm"; | |
78 | compression = "none"; | |
79 | load = <0>; /* unused */ | |
80 | ||
81 | blob { | |
82 | filename = "u-boot.rom"; | |
83 | }; | |
84 | }; | |
85 | }; | |
86 | }; | |
87 | }; | |
88 | }; | |
89 | ||
9b3843f8 MW |
90 | #ifdef CONFIG_SL28_ENABLE_SER0_CONSOLE |
91 | / { | |
92 | chosen { | |
93 | stdout-path = "serial2:115200n8"; | |
94 | }; | |
95 | }; | |
96 | #endif | |
97 | ||
e057760f | 98 | #ifdef CONFIG_SL28_SPL_LOADS_ATF_BL31 |
d8ffd938 | 99 | &u_boot_rom { |
e057760f MW |
100 | fit { |
101 | images { | |
102 | bl31 { | |
103 | description = "ARM Trusted Firmware (bl31)"; | |
104 | type = "firmware"; | |
105 | arch = "arm"; | |
106 | os = "arm-trusted-firmware"; | |
107 | compression = "none"; | |
108 | load = <CONFIG_SL28_BL31_ENTRY_ADDR>; | |
109 | entry = <CONFIG_SL28_BL31_ENTRY_ADDR>; | |
110 | ||
111 | blob-ext { | |
112 | filename = "bl31.bin"; | |
113 | }; | |
114 | }; | |
115 | }; | |
116 | ||
117 | configurations { | |
554a8531 | 118 | @config-SEQ { |
b463010b MW |
119 | firmware = "bl31"; |
120 | loadables = "uboot"; | |
121 | }; | |
e057760f MW |
122 | }; |
123 | }; | |
124 | }; | |
125 | #endif | |
126 | ||
4c450daf | 127 | #ifdef CONFIG_SL28_SPL_LOADS_OPTEE_BL32 |
d8ffd938 | 128 | &u_boot_rom { |
4c450daf MW |
129 | fit { |
130 | images { | |
131 | bl32 { | |
132 | description = "OP-TEE Trusted OS (bl32)"; | |
133 | type = "firmware"; | |
134 | arch = "arm"; | |
135 | os = "tee"; | |
136 | compression = "none"; | |
137 | load = <CONFIG_SL28_BL32_ENTRY_ADDR>; | |
138 | entry = <CONFIG_SL28_BL32_ENTRY_ADDR>; | |
139 | ||
140 | blob-ext { | |
141 | filename = "tee.bin"; | |
142 | }; | |
143 | }; | |
144 | }; | |
145 | ||
146 | configurations { | |
554a8531 | 147 | @config-SEQ { |
b463010b MW |
148 | loadables = "uboot", "bl32"; |
149 | }; | |
4c450daf MW |
150 | }; |
151 | }; | |
152 | }; | |
153 | #endif | |
154 | ||
4ceb5c6d | 155 | &fspi { |
8c103c33 | 156 | bootph-all; |
4ceb5c6d | 157 | flash@0 { |
8c103c33 | 158 | bootph-all; |
4ceb5c6d MW |
159 | }; |
160 | }; | |
161 | ||
162 | &dspi2 { | |
8c103c33 | 163 | bootph-all; |
4ceb5c6d MW |
164 | }; |
165 | ||
c816dd03 | 166 | &esdhc { |
8c103c33 | 167 | bootph-all; |
4ceb5c6d MW |
168 | }; |
169 | ||
170 | &esdhc1 { | |
8c103c33 | 171 | bootph-all; |
4ceb5c6d MW |
172 | }; |
173 | ||
9b3843f8 | 174 | &lpuart1 { |
8c103c33 | 175 | bootph-all; |
9b3843f8 MW |
176 | }; |
177 | ||
c816dd03 | 178 | &duart0 { |
8c103c33 | 179 | bootph-all; |
4ceb5c6d MW |
180 | }; |
181 | ||
d08011d7 MW |
182 | /* |
183 | * u-boot will enable the device in the linux device tree in place. Because | |
184 | * we are using the linux device tree, we have to enable the PCI controller | |
185 | * ourselves. | |
186 | */ | |
187 | &pcie1 { | |
188 | status = "okay"; | |
189 | }; | |
190 | ||
191 | &pcie2 { | |
192 | status = "okay"; | |
193 | }; | |
194 | ||
c7155d29 MW |
195 | &sata { |
196 | status = "okay"; | |
197 | }; | |
198 | ||
cd80d5d9 | 199 | &soc { |
8c103c33 | 200 | bootph-all; |
cd80d5d9 MW |
201 | }; |
202 | ||
4ceb5c6d | 203 | &sysclk { |
8c103c33 | 204 | bootph-all; |
4ceb5c6d | 205 | }; |