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630532f5 GQ |
1 | /* |
2 | * Device Tree Include file for Freescale Layerscape-1043A family SoC. | |
3 | * | |
4 | * Copyright (C) 2015, Freescale Semiconductor | |
5 | * | |
6 | * Mingkai Hu <Mingkai.hu@freescale.com> | |
7 | * | |
6d48d1c4 | 8 | * SPDX-License-Identifier: GPL-2.0+ X11 |
630532f5 GQ |
9 | */ |
10 | ||
630532f5 GQ |
11 | /include/ "fsl-ls1043a.dtsi" |
12 | ||
13 | / { | |
14 | model = "LS1043A QDS Board"; | |
73a5de4c QG |
15 | aliases { |
16 | spi0 = &qspi; | |
17 | spi1 = &dspi0; | |
18 | }; | |
19 | }; | |
20 | ||
21 | &dspi0 { | |
22 | bus-num = <0>; | |
23 | status = "okay"; | |
24 | ||
25 | dflash0: n25q128a { | |
26 | #address-cells = <1>; | |
27 | #size-cells = <1>; | |
28 | compatible = "spi-flash"; | |
73a5de4c | 29 | spi-max-frequency = <1000000>; /* input clock */ |
2ef846e4 QG |
30 | spi-cpol; |
31 | spi-cpha; | |
32 | reg = <0>; | |
73a5de4c QG |
33 | }; |
34 | ||
35 | dflash1: sst25wf040b { | |
36 | #address-cells = <1>; | |
37 | #size-cells = <1>; | |
38 | compatible = "spi-flash"; | |
39 | spi-max-frequency = <3500000>; | |
2ef846e4 QG |
40 | spi-cpol; |
41 | spi-cpha; | |
73a5de4c QG |
42 | reg = <1>; |
43 | }; | |
44 | ||
45 | dflash2: en25s64 { | |
46 | #address-cells = <1>; | |
47 | #size-cells = <1>; | |
48 | compatible = "spi-flash"; | |
49 | spi-max-frequency = <3500000>; | |
2ef846e4 QG |
50 | spi-cpol; |
51 | spi-cpha; | |
73a5de4c QG |
52 | reg = <2>; |
53 | }; | |
54 | }; | |
55 | ||
56 | &qspi { | |
57 | bus-num = <0>; | |
58 | status = "okay"; | |
59 | ||
60 | qflash0: s25fl128s@0 { | |
61 | #address-cells = <1>; | |
62 | #size-cells = <1>; | |
63 | compatible = "spi-flash"; | |
64 | spi-max-frequency = <20000000>; | |
65 | reg = <0>; | |
66 | }; | |
630532f5 GQ |
67 | }; |
68 | ||
69 | &i2c0 { | |
70 | status = "okay"; | |
71 | pca9547@77 { | |
72 | compatible = "philips,pca9547"; | |
73 | reg = <0x77>; | |
74 | #address-cells = <1>; | |
75 | #size-cells = <0>; | |
76 | ||
77 | i2c@0 { | |
78 | #address-cells = <1>; | |
79 | #size-cells = <0>; | |
80 | reg = <0x0>; | |
81 | ||
82 | rtc@68 { | |
83 | compatible = "dallas,ds3232"; | |
84 | reg = <0x68>; | |
85 | /* IRQ10_B */ | |
86 | interrupts = <0 150 0x4>; | |
87 | }; | |
88 | }; | |
89 | ||
90 | i2c@2 { | |
91 | #address-cells = <1>; | |
92 | #size-cells = <0>; | |
93 | reg = <0x2>; | |
94 | ||
95 | ina220@40 { | |
96 | compatible = "ti,ina220"; | |
97 | reg = <0x40>; | |
98 | shunt-resistor = <1000>; | |
99 | }; | |
100 | ||
101 | ina220@41 { | |
102 | compatible = "ti,ina220"; | |
103 | reg = <0x41>; | |
104 | shunt-resistor = <1000>; | |
105 | }; | |
106 | }; | |
107 | ||
108 | i2c@3 { | |
109 | #address-cells = <1>; | |
110 | #size-cells = <0>; | |
111 | reg = <0x3>; | |
112 | ||
113 | eeprom@56 { | |
114 | compatible = "at24,24c512"; | |
115 | reg = <0x56>; | |
116 | }; | |
117 | ||
118 | eeprom@57 { | |
119 | compatible = "at24,24c512"; | |
120 | reg = <0x57>; | |
121 | }; | |
122 | ||
123 | adt7461a@4c { | |
124 | compatible = "adt7461a"; | |
125 | reg = <0x4c>; | |
126 | }; | |
127 | }; | |
128 | }; | |
129 | }; | |
130 | ||
131 | &ifc { | |
132 | #address-cells = <2>; | |
133 | #size-cells = <1>; | |
134 | /* NOR, NAND Flashes and FPGA on board */ | |
135 | ranges = <0x0 0x0 0x0 0x60000000 0x08000000 | |
4002eab2 HZ |
136 | 0x1 0x0 0x0 0x7e800000 0x00010000 |
137 | 0x2 0x0 0x0 0x7fb00000 0x00000100>; | |
630532f5 GQ |
138 | status = "okay"; |
139 | ||
140 | nor@0,0 { | |
141 | #address-cells = <1>; | |
142 | #size-cells = <1>; | |
143 | compatible = "cfi-flash"; | |
144 | reg = <0x0 0x0 0x8000000>; | |
145 | bank-width = <2>; | |
146 | device-width = <1>; | |
147 | }; | |
148 | ||
4002eab2 | 149 | nand@1,0 { |
630532f5 GQ |
150 | compatible = "fsl,ifc-nand"; |
151 | #address-cells = <1>; | |
152 | #size-cells = <1>; | |
153 | reg = <0x1 0x0 0x10000>; | |
154 | }; | |
155 | ||
4002eab2 | 156 | fpga: board-control@2,0 { |
630532f5 GQ |
157 | #address-cells = <1>; |
158 | #size-cells = <1>; | |
159 | compatible = "simple-bus"; | |
4002eab2 | 160 | reg = <0x2 0x0 0x0000100>; |
630532f5 GQ |
161 | bank-width = <1>; |
162 | device-width = <1>; | |
4002eab2 | 163 | ranges = <0 2 0 0x100>; |
630532f5 GQ |
164 | }; |
165 | }; | |
166 | ||
167 | &duart0 { | |
168 | status = "okay"; | |
169 | }; | |
170 | ||
171 | &duart1 { | |
172 | status = "okay"; | |
173 | }; | |
2970e14f WS |
174 | |
175 | &lpuart0 { | |
176 | status = "okay"; | |
177 | }; |